Optimal Placement and Sizing of Fixed and Switched

Capacitor Banks Under Nonsinusoidal Operating Conditions

M. A. S. Masoum M. Ladjevardi E. F. Fuchs, IEEE Fellow W. M. Grady, IEEE Fellow
Department of Electrical Engineering Department of Electrical and Department of Electrical and
Iran University of Science & Technology Computer Engineering Computer Engineering
Tehran, Iran, 168440. University of Colorado The University of Texas at Austin
Boulder, Colorado, 80309-0425. Austin, Texas, 78712.

Abstract: An iterative nonlinear algorithm is generated for optimal
sizing and placement of fixed and switched capacitor banks on radial
distribution lines in the presence of linear and nonlinear loads. The
HARMFLOW algorithm and the Maximum Sensitivities Selection
(MSS) method are used to solve the constrained optimization problem
with discrete variables. To limit the burden of calculations and
improve convergence, problem is decomposed into two subproblems.
Objective functions include minimum system losses and capacitor
cost while IEEE-519 power quality limits are used as constrains.
Results are presented and analyzed for the 18 bus IEEE distorted
system. The advantage of proposed algorithm as compared to
previous works is consideration of harmonic couplings and reactions
of actual nonlinear loads in the distribution system.
Indexing Terms: Capacitor Banks, Placement, Sizing, MSS,
Harmonic Power Flow.
1- Introduction
Capacitor placement has become the most popular solution for
reducing system losses, regulating bus voltages and improving
power factor at distribution levels. The general capacitor
placement problem consists of determining the optimal
locations, types and sizes of compensation capacitors such that
maximum yearly benefit due to loss reduction against
installation cost of capacitors is achieved.
Most of the reported techniques for capacitor placement
assume sinusoidal conditions and ignore the presence of
nonlinear loads [1-7]. Some of the recent researches have
considered the presence of distorted substation voltages for
capacitor placement problem [8-11]. Unfortunately, most
presented techniques ignore some of the following problems:
• discrete sizes of commercially available capacitors with a
different cost per kVar,
• presence of current and voltage harmonics due to the
wide-spread use of energy-efficient appliances and power-
electronic devices,
• interactions and couplings between harmonic voltages and
currents caused by actual nonlinear loads,
• amplification of harmonic currents due to possible
harmonic resonance,
• additional harmonic copper and core losses.
The presented mathematical optimal methods of shunt
capacitor placement problem include analysis methods [1-2],
gradient search method [5], dynamic programming (DP)
method [3,8-9], and Maximum Sensitivities Selection (MSS)
method [11].
Application of analysis method for solving the shunt
capacitor problem with power quality constrains (e.g., voltage
THD and distortion factor) is quite difficult. The gradient
search method works well with continuos variables. However,
the shunt capacitor placement is an optimal problem of discrete
variables. Furthermore, the present of harmonic resonance
make the gradient search method very difficult to produce
global optimal results. Dynamic programming (DP) is a
suitable method of shunt capacitor placement, but it requires
long calculations.
In order to limit the heavy burden of calculation associated
with DP method, some type of sensitivity analysis could be
used to sort system buses before applying any capacitor unit.
Therefore, MSS method works quite well for capacitor
placement but it dos not have the precise accuracy of DP
technique.
This paper reformulates the capacitor placement and sizing
problem, taking into account fixed and switched capacitors as
well as potential harmonic interactions such as harmonic
losses, harmonic resonance and harmonic distortion factors.
The proposed algorithm is implemented using HARMFLOW
codes [14] and results are presented for the distorted 18-bus
IEEE system. The advantage of this algorithm as compared
with [11] is consideration of harmonic couplings and reactions
of actual nonlinear loads in the distribution system.
2- System Model at Harmonic Frequencies
For modeling distribution system at fundamental and harmonic
frequencies the formulation and notations of reference [14] are

0-7803-7519-X/02/$17.00 © 2002 IEEE

807
used. System solution is achieved by forcing total optimized independently with its own objective function. The
(fundamental and harmonic) mismatch active and reactive result of each subproblem (e.g., optimal sizes and locations of
powers as well as mismatch active and reactive fundamental C f and C s ) are used as the initial condition for the next
and harmonic currents to zero using Newton-Raphson method.
subproblem. For the first load level, initial capacitor sizes are
Define bus 1 to be the conventional swing bus, buses 2
assumed zero.
through m-1 to be the conventional linear (PQ and PV) buses,
and buses m through n as nonlinear buses (n = total number of Subproblem B
buses). We assume nonlinear load models are given either in This subproblem consists of a single problem. That is the
frequency domain (e.g., V ( h ) and I ( h ) characteristics) or in time optimal placement and sizing of capacitor banks at the last
domain (e.g., v(t) and i(t) characteristics). These models are load level ( k = LLM ). Results of subproblem A are used as
available for many nonlinear loads and systems such as the initial condition.
discharge lighting [13], power electronic devices [12],
nonlinear transformers [14], EHV and HVDC networks [15- Objective Functions
16]. The Newton-Raphson method [12] is used to compute the Voltage constrains will be taken into account by specified
correction terms, ∆U, by forcing the appropriate mismatches upper and lower bounds of rms magnitude voltage
to zero: Vimin ≤ ∑ h
Vi(, hk ) ≤ Vimax (3)
∆M = J ∆U (1) The distortion factor constraints of voltage is considered by
specifying maximum Total Harmonic Distortion (THD) of bus
for the harmonic power flow analysis, we have (L = maximum
voltages
harmonic order considered):
 ∆W   J (1) J (5 ) L J ( L)
r
o   ∆V (1) 
THD j = 100 ∑ h ≠1
V j(,hk ) V j(,1k) ≤ THD max
j , j = 1, ..., n (4)
 (5 )   (5,1)  r  Bounds of Eqs(3-4) are specified by IEEE-519 standard [17].
 ∆ I   YG YG (5,5) L YG (5, L ) H (5)   ∆V (5) 
These bounds constitute a set of functional inequality
 ∆I (7)   YG (7,1) YG (7,5) L YG (7, L ) H (7)   ∆V (7)  (2)
 =   constrains of the from
 M   M M O M M  M 
H k (Vk(1) ,..., Vk( h ) , C k ) ≤ o (5)
∆I ( L )  YG ( L,1) YG ( L ,5) L YG ( L, L ) H ( L )  ∆V ( L ) 
 (1)     Based on Eqs(3-5), the problem of shunt capacitor placement
 ∆ I  YG ( L, ) YG ( , ) L YG ( , L ) H ( )   ∆Φ 
1 15 1 1
and sizing under nonsinusoidal operating conditions can be
where subvectors and submatrices are defined in [12, 14]. expressed as
In the above formulation of harmonic power flow, we min F = Floss + Fcapacity + Fcos t
assume capacitor banks are shunt capacitors with variable  (6)
reactances and capacitor placement is possible for MC number  subject to H k ≤ o
of buses. The proposed algorithm will determine optimal where Floss is the energy loss cost, Fcapacity is the cost
number, types (e.g., fixed or switching), locations and sizes of
capacitor banks in the presence of nonlinear loads. corresponding to peak active losses (e.g., used capacity of
system), and Fcos t is the cost of fixed and switched capacitors.
3. Problem Formulation Therefore, the objective functions corresponding to
In this paper, the following assumptions are made: subproblems A and B can be defined as Eqs(7A) and (7B),
• discrete loads at LLM different levels (k = 1, 2, ...., LLM), respectively:
• two types of capacitors; fixed capacitors (Cf ) that are in
min FA = Ploss,k (Vk(1) , ..., Vk( L ) , C k )
service at all load levels and switched capacitors (Cs ) that  (7A)
 subject to H k (Vk(1) , ..., Vk( L ) , C k ) ≤ o
are switched on or off according to load levels,
• presence of linear and nonlinear load in a balanced three
phase system. min FB = Floss + Fcapacity + Fcos t
 (7B)
Under these assumptions, the problem can be decomposed into  subject to H k ≤ o
two isolated sets of subproblems. This decomposition makes LLM
solution much easier to resolve. FB = K E ∑ Tk Ploss ,k ( Vk(1) , ... , Vk( L ) , C k ) +
k =1
Set of Subproblems A
This set includes the capacitor placement problem for load (1)
k A Ploss ,LLM ( VLLM (L)
, ... , VLLM , C LLM ) + ∑K cfj C fj + K cs ∑ C sjLLM
levels k = 1, 2, ...., LLM − 1. At load level k = 1, only fixed jεMC jεMC

capacitors are considered, while the results at load levels where

k ≥ 2 consists of fixed and switched capacitors. There are Ploss, k = total system active losses at load level K
“ LLM − 1 ” subproblems in this set and each could be

808
Vk( h ) = bus voltage vector at harmonic h [11,14] due to discrete nature of capacitor cost (Table 1). Partial
(h)
L = the highest order of harmonics considered derivatives of Ploss , k are computed as follows:
−1
C k = connected (fixed, switched) capacitors at load level K  ∂Ploss
(h)
,k
  ∂P ( h ) ∂Q( h )   ∂Ploss
(h)
,k

 (h)   (h)  (h) 
K A = saving per kW for reduction in peak active losses (e.g.,
 ∂P( h )  =  ∂θ ( h ) ∂θ( h )   ∂θ( h )  (10)
K A = 120,000 $ / MWh )
 ∂Ploss , k   ∂P ∂Q( h )   ∂Ploss , k 
K E = cost per kWh (e.g., K E = 50 $ / MWh )  ∂Q( h )   ∂V ( h ) ∂V ( h )   ∂V ( h ) 
TK = duration of load level K where all right hand side entries are computed using outputs of
MC = set of possible shunt capacitor buses harmonic power flow.
K cfj = cost per unit of fixed capacitance of size C fj (Table 1) 4. Solution Methodology
The shunt capacitor placement and sizing problem in the
K cs = cost per unit capacitance of switched capacitor (e.g., presence of linear and nonlinear loads is an optimization
K cs = 0.35 $ / kVar ). problem with discrete variables (e.g., discrete values of
Total active losses at load level K can be computed using capacitors). This problem is solved using harmonic power flow
harmonic power flow outputs: algorithm and the maximum sensitivities selection (MSS)
L method as follows:
Ploss,k = ∑ Ploss
(h)
,k =
Step 1: Input system parameters (e.g., line and load
h =1 specifications, system topology, and number of load levels).
(8) Select the first load level (e.g., k = 1) and set initial capacitor
L  n n 
∑ ∑∑ Vi ,k Vj,k Yij cos(θi ,k − θ j,k − δij )
(h ) (h) (h) (h ) (h ) (h) values to all possible compensation nodes. Use zero capacitor
values for load level k = 1 and previous values for k ≥ 2 .
h =1  i=1 j=1 
Step 2: Calculate harmonic power flow (Eqs(1-2)) at load
where Vi(,kh ) and θi(,hk) are magnitude and phase of h th level k and compute the appropriate objective function (e.g.,
(h ) (h)
harmonic voltage at bus i for load level K , and Yij and δij Eq(7A) for subproblems A and Eq(7B) for subproblem B).
th Step3: Calculate sensitivities of objective function to
are magnitude and phase of h harmonic line admittance capacitances at compensation buses (Eqs(9-10)).
between buses i and j, respectively. Step 4: Select several candidate buses with maximum
sensitivities.
Table 1. The yearly cost of fixed capacitors [11] Step 5: Add one unit of capacitor to one of the candidate
buses. Calculate harmonic power flow and the related
Q j [kVar ] 300 600 900 1200 1500
objective function. Remove the newly added capacitor unit
from the corresponding candidate bus.
K cfj [$ / kVar] 0.350 0.220 0.183 0.204 0.302 Step 6: Repeat Step 5 for all candidate buses.
Step 7: Among all candidate buses, select the one with
minimum objective function and place one unit of capacitor at
Sensitivity Functions this bus. Record the corresponding system topology, F, THD,
Sensitivities of objective function (Eq(7)) to capacitance and Vrms.
values at compensation buses can be computed using partial Step 8: If the total capacitance of shunt capacitors does not
derivatives: exceed the sum of reactive loads, go to Step 3.
(h) Step 9: According to the recorded information (objective
dPloss, k L
∂Ploss
= ∑ Wh (h)
,k
(9A) functions, THD and Vrms values), select the topology with
dQ h =1 ∂Q minimum objective function that satisfies problem constrains
( j +1) ( j) (Eq(5)). This is the optimal solution at load level k . If such
dFcos t Fcos t − Fcos t
= (9B) topology does not exist (no solution at load level k ), go to
dQ j Q( j+1) − Q j Step 11.
(h) Step 10: Select the next load level. If the final load level is not
where Wh = 1 h is the weight function of harmonic h, Pk is
reached, go to Step 2.
the total system active losses at harmonic h for load level Step 11: Print the solution and stop.
( j+1)
K and Fcos t is the cost corresponding to capacitor of size Figure 1 shows the iterative algorithm for capacitor placement
Q ( j+1) . Note the application of linear interpolation in Eq(9B) and sizing which consists of solving " LLM − 1" subproblem of
type A and one subproblem of type B.

809
 Input System Parameters

subproblem A or B
Set initial capacitance=0, set initial load level; K=1

Select
Set Objective Function
F=Eq(7A), if K=LLM then F=Eq(7B)

HARMFLOW, Eqs(1-2)

Bus sorting by
Compute sensitivities, Eqs(9-10)

sensitivities
Temporary Bus Sorting
Select MC candidate buses
Set temporary counter; i=1

Temporary Change of System Topology

candidate buses
Add one capacitor unit to bus i

Compute F for
Run HARMFLOW
Temporary record of i and F

MSS method
next candidate bus no
i = MC
i=i+1
yes

Select optimal
no constrains
solution with
Change System Topology
Add one capacitor unit at the best candidate bus
Record information (topology, F, THD, Vrms)

yes
∑ QC < ∑ Q L Select optimal
solution with
constrains

no
Optimal Topology Selection
Choose topology with lowest F and constrains; Eq(6)

no No solution
topology exist?
for problem
yes
change load level
Print data and

Print solution for load level K

Select Next Load Level

K=K+1

no
K > LLM

yes

Stop

Figure 1. The proposed iterative algorithm for optimal placement and sizing of capacitor banks under nonsinusoidal operating conditions
using harmonic power flow and MSS method.

810
Convergence of the Proposed Algorithm
The burden of calculation in the algorithm of Fig.1 is much
less than the analysis and DP methods of references [1-10].
Assuming N c number of capacitor units and K c number of
compensation buses, the average number of power flow
calculations in DP algorithm is K c (K c + 1)( N c + 1) . Total
number of power flow calculations of Fig.1 is N c K c which is
much less than DP method, specially when N c is large.
Under sinusoidal operating conditions, algorithm of Fig.1
gives global optimal since power loss is an unique peak
function of capacitance of the shunt capacitors at various buses
of distribution system [11].
When capacitor banks are added under nonsinusoidal
operating conditions, harmonic resonance may occur and
increase transmission losses. With further increase of capacitor
bank value, the harmonic resonance condition diminishes. This
will not affect the proposed method in locating global optimal,
since increasing and decreasing of the objective function is not
used as the criterion for convergence [11].
5. Simulation Results
The proposed method of loss reduction by capacitor placement
in the present of voltage and current harmonics was tested on
the 23 kV, 18-bus, distorted IEEE distribution system (Fig.1).
Specifications of this system are given in reference [18-20].
Simulations results are shown in Table 2 and Fig.3 for the
following three operating conditions:
Case 1: High Harmonic Distortion –The nonlinear load
in Fig.1 is a six pulse rectifier with active and reactive powers
of 0.3 pu (3 MW) and 0.226 pu (2.26 MVAR), respectively.
Outputs of harmonic power flow show a maximum voltage
8
4 3 2 1
6 5
7
9
Six-Pulse
Converter 26
25
Figure 2. Single-line diagram of the 18-bus IEEE distorted system [18-20] used for simulation and analysis.
811
THD of 8.486% for this system. The algorithm of Fig.1 was
applied to this system for optimal placement and sizing of
capacitor banks. Results show a yearly benefit of 20360 dollars
per year (last row of Table 2) and different locations and sizes
of capacitor banks before (column 2 of Table 2) and after
(column 3 of Table 2) optimization. In addition, maximum
voltage THD is limited to 6.37% (row 19 of Table 2 and
Fig.3). For this system, optimal capacitor placement results in
considerable yearly benefit but it does not limit voltage THD
to the desired level of 5%. This is expected for rich harmonic
configurations where capacitor placement is not the primary
solution for harmonic mitigation. For such systems,
applications of passive filters, active filters or Active Power
Line Conditioners (APLC) before capacitor placement are
recommended [19-20].
Case 2: Normal Harmonic Distortion – The size of
nonlinear load is adjusted such that its active and reactive
powers are decreased to 0.12 pu and 0.166 pu, respectively.
After optimal placement and sizing of capacitor banks, voltage
THD is decreases from 5.18% to 5.0% and a yearly benefit of
11650.6 dollars is achieved (columns 4 and 5 of Table 2 and
Fig.3).
Case 3: Low Harmonic Distortion – The size of
nonlinear load is further decrease such that its active and
reactive powers are limited to 0.02 pu and 0.046 pu,
respectively. After optimal placement and sizing of capacitor
banks, voltage THD increases from 2.1% to 2.95% (which is
lower that the desired limit of 5%), total capacitance of
capacitor banks are decreased from 1.005 pu to 0.63 pu and a
yearly benefit of 12608 dollars is achieved (columns 6 and 7 of
Table 2 and Fig.3).
Substation Swing Bus
51
50
20
21
22
23
24
 Benefits[$/year] THD(%)
25000 10.000%
8.486% befor optimization
20350
20000 after optimization
8.000%
6.37%
15000 6.000%
12608 5.182% 5%
11650.4

10000 4.000%
2.95%
2.1%
5000 2.000%

0 0.000%
Case1 Case2 Case3 Case1 Case2 Case3

(a) (b)
Figure 3. Simulated results of Fig.2; (a) yearly benefit after optimal sizing and placement of capacitor banks, (b) maximum voltage THD
before and after optimal capacitor placement.

Table 2. Simulation results for the 18-bus, distorted IEEE distribution system (Fig.2) at different distortion levels (per unit VA = 10 MVA,
per unit V = 23 kV, swing bus voltage = 1.05 pu).

Case 1 Case 2 Case 3

Case (High Distortion) (Normal Distortion) (Low Distortion)
Number Before After Before After Before After
Optimizing Optimizing Optimizing Optimizing Optimizing Optimizing
Q2 = 0.105 Q2 = 0.030 Q2 = 0.105 Q2 = 0.120 Q2 = 0.105 Q2 = 0.090
Q3 = 0.060 Q3 = 0.090 Q3 = 0.060 Q3 = 0.060 Q3 = 0.060
Q4 = 0.060 Q4 = 0.180 Q4 = 0.060 Q4 = 0.060 Q4 = 0.060 Q4 = 0.060
Q5 = 0.180 Q5 = 0.240 Q5 = 0.180 Q5 = 0.180 Q5 = 0.180 Q5 = 0.180
Capacitor Q7 = 0.060 Q7 = 0.120 Q7 = 0.060 Q7 = 0.060 Q7 = 0.060 Q7 = 0.060
Q20= 0.060 Q20= 0.090 Q20= 0.060 Q20= 0.060 Q20= 0.060 Q20= 0.030
Bank Q21= 0.120 Q21= 0.120 Q21= 0.120 Q21= 0.120 Q21= 0.120
Q24= 0.150 Q24= 0.150 Q24= 0.150 Q24= 0.150 Q24= 0.180
Locations Q25= 0.090 Q25= 0.030 Q25= 0.090 Q25= 0.090 Q25= 0.030
Q50= 0.120 Q50= 0.120 Q50= 0.030 Q50= 0.120
Q1 = 0.090
Q8 = 0.060
Q9 = 0.030
Total Capacitor [pu] Qt = 1.005 Qt = 0.900 Qt = 1.005 Qt = 1.020 Qt = 1.005 Qt = 0.630
Minim Voltage [pu] 1.029 1.016 1.044 1.048 1.050 1.020
Maxim Voltage [pu] 1.055 1.056 1.062 1.074 1.073 1.050
Maximum THD [%] 8.486 6.370 5.182 5.000 2.100 2.950
Losses [kW] 282.93 246.43 213.69 192.81 189.91 167.32
Capacitor Cost [$] 2432.70 1959.90 2432.70 2963.40 2432.70 1754.70
Total Cost [$ / year] 157872.98 137512.00 119237.90 107587.47 105969.20 93361.15
Benefits [$ / year] 20360 11650.43 12608

812
6. Conclusions
Maximum Sensitivities Selection (MSS) is used for the
discrete optimization problem of fixed and switched shunt
capacitor placement and sizing under nonsinusoidal operating
conditions with different load levels. In order to reduce
problem complexity and improve convergence, the problem is
decomposed into several isolated subproblems. Saving due to
reduction in peak loss, saving of the energy loss cost due to
installed capacitors and cost of fixed and switched capacitors
are considered in the objective function. The power quality
limits of IEEE-519 standard are used as constrains. Based on
analysis of this paper, the following conclusions are stated:
• Compared with the local variation (DP), MSS method
requires less computational time specially when many
compensation buses for capacitor placement are
considered.
• The proposed algorithm takes into account the interaction
of harmonics and generates optimal locations and sizes of
capacitor banks under nonsinusoidal (e.g., nonlinear
loads) operating conditions.
• Different harmonic voltages and various linear and
nonlinear load levels correspond to different optimal
capacitor sizes (Table 2). Therefore, harmonic effects
should be considered in system planning as well as system
operation stages.
• Simulation results for the distorted 18-bus IEEE
distribution system show that proper placement and sizing
of capacitor banks result in considerable yearly benefit
(Fig.3) and prevent undesired harmonic resonance
conditions.
• For rich harmonic systems (Case1 of Table 2), optimal
placement of capacitor banks can not limit system THD to
standard levels of IEEE-519. For these systems,
application of passive filters, active filters or APLCs
before capacitor placement are recommended.
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