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'() ,#-./ 0-1 ,#2!, /-3/4 ,-!, ,#-./
-+& "5&!, 6(% /# ! ,#2 /4 "57/#

-+& "5&!, 6(% /# ! 829 : $%&
:$ "#-/# 4# *$+" ;&-< "(=/4 ;&-!"
-!, "#-/# 4# ,(! ,#2!, /-3/4 '->, 6 $%"
#-./ "5-/4 6(% /# ! ,#2 /4 "57/#
-!, "#-/# 4# '?- ,#@ 4 -!/ " $+AB "#-/# 4# C 0-1 D
! "
#-/# 4# CD 0-1 CD
#-/# 4# 0-1 E
(F, 829 : $%& "21 6(% /# ! D
# 829 : $%& 0-1( 6(% /# ! D
(F, 829 : $%& "21 6(% /# ! ,#2 /4 "57/# :-G#
# 829 : $%& 0-1( 6(% /# ! ,#2 /4 "57/# :-G#
H-<( 0$% ,#(+/4 4# /#-)I
(-F" '(%/4 "5(/4 :&!, 6-<( 0$% ,#(+/4 4#
# $ % &
D 0-1 "#-/# 4# D
D H 0-1 "#-/# 4# D H
D 0-1 "#-/# 4# D
D C 0-1 "#-/# 4# D C
D 0-1 "#-/# 4# D
'( )
4-J" ,&<- I$5K
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
I$5K 0 ! /4&()/ L&/4 '$+I "21 6$./ /4(-1

H(% ,# - "52 !,
'(
(-F" '(%/4 ,&<- I$5 < ,#$+ '(% '?/# "# 1
(-F" '(%/4 ,&<- I$5 < ,#$+ '(% (&/"$5
(-F" '(%/4 ,&<- I$5 < ,#$+ '(% (&/"$5 '()/4 6(%
(-F" '(%/4 ,&<- I$5 < ,#$+ '(% (&/"$5 6-+" '()/4 6(%
(F, 0-1 4# I$5 "5(/4 ,#$+ '(% '$+I *#(./4 '()/4 6(%
H(% 8-( '(%/4 ,&<- I$5
D$G$" I$5 G2< 8&F/4 /4(9 5- 5 44$5
D$G$" ,->A "#-/# 4# D B D M ,&<- I$5
'( /
H(% ,# - "52 !, 0-1 A(G"G,-:$5 ,&<- I$5E
4(9 5- ,&<- DE
8 $ A ' B" " $
4(9 5- ,&<- DE
-!, N$.& ,-)& /#-%/ 829 : $%& C
M2F- ,#(F/ L&/4 ,:(,* ,#( C
?/# ,-+& #7/# ,#( ,-!, /4(9 0-1( "2 /4 "2F ,&<- C
#&N$=/ '(= C
-!, "#-/# 4# :2& *$+" ;&-< ,&<- C
(-F" '(%/4 ,#&N$=/ '(= C "5(/4 ,#$+ '(% :$$A
/# #2 </4 ,&<- 5$G$"
8 $" "
(-F" '(%/4 G( G-!/#
$%/ -!A G( G-!/#
# 1 4 -/ '-!A 2!/4
4(9 5- 6(% G( G-!/#
4-J" ,&<- 6(% G( G-!/#
(-F" '(%/4 ,&<- 6(% G( G-!/# < ,#$+ '(% :$$A
/# #2 </4 ,&<- 5$G$"
$+" /(+ ,-!, /4(9 0-1( "2 /4 "2F
$ ' C D
$ ! '
-!, :(-F I-F,# 8-( '(%/4
C-( '(%/4 "#-F,# -/#O"&F $5-I ,
H(% 8-( '(%/4 D
B "
D$G$"
D$G$" *# I ! ,-+A ' $%/
I$5 5$G$" *# I ! ,-+A ' $%/ P QD R
H(% 8-( '(%/4 "-5"S&A P R
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
D$G$" H5(T/S(&" PH DR
57/# "2F "# 1 4 -/
#-/# 4# "5-F/4 "#-! O"#-/# 4# ,(./4 G&-+"
B ' E
4-J" /4(-1
4-J" DK
4-J" D H "#-N '(=
M2& 829 : $%& *# L-<N 5- /4-J"
B ' D F F
B ' D D $' D"
-!/# "#2!, ,A& *#(< ,#$+ '(% /4&<
-!/# "#2!, ,A& 8&1/4 ,-!, /4-J"
B $
8 ! G D H
B
! B D B I B J " % -K
-K 1LM51N "3L1O@ LP.LOQQ1-.&
! ' $ " % ' &
" ' A J A $ A I
-F,# /-FA "52F, " $+A "21 ,(=/4
-F,# /-FA 4 -!/ " $+A "21 ,(=/4 ;&- , I-LEUE
-F,# /-FA ;&- ,(=/4 M
H-</4 0-1 #7/#V
H-</4 ES W -!, 0 ' $)& *# $=/ #(F XW
H-</4 ESEW (!I "-J" '->, ' $=I
H-</4 ESUW M2F- ,#(F/ 6-/* "#-/# 4# W
H-</4 ESYW (!I "-J" ,-!, "#-/# 4# '->, 6 $%"W
H-</4 ESZW (!I "-J" ,-!, "#-/# 4# '->, 6 $%"W
H-</4 ES W (!I "-J" ,-!, "#-/# 4# '->, 6 $%"W
H-</4 ES W -!, 6 " :2F- ,#(F/ #$% G(+ ,# - "52 !,W
H-</4 ES W -!, "#-/# 4# G2< 8&F/4 ,#( 6(% /# ! D W
H-</4 ES[W -!, ,#2!, /-3/4 ,&<- D W
H-</4 ES KW (!I "-J" ,-!, "#-/# 4# : $./ *$+" 0 ! D W
H-</4 ES W -!, ,#2!, /-3/4 ,&<- D HW
H-</4 ES EW -!, "#-/# 4# *$+" /(+ 0 ! D HW
H-</4 ES UW -!, "#-/# 4# *$+" /(+ 0 ! D HW
H-</4 ES YW -!, ,#2!, /-3/4 ,&<- D W
H-</4 ES ZW -!, "#-/# 4# *$+" /(+ 0 ! D CW
H-</4 ES W -!, ,#2!, /-3/4 ,&<- D CW
H-</4 ES W -!, "#-/# 4# *$+" /(+ 0 ! D W
H-</4 ES W -!, ,#2!, /-3/4 ,&<- D W
H-</4 ES [W -!, 6 " :2F- ,#(F/ "@ :$% 6(% ,# - "52 !,W
H-</4 ESEKW M2F- ,#(F/ "&F ,#( 6(% 8-( '(%/4W
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
H-</4 ESE W -!, "#-/# 4# ,&<- I$5 W

H-</4 ESEEW -!, "#-/# 4# ,&<- I$5EW
H-</4 ESEUW -!, 6 " :2F- ,#(F/ L&/4 ,#&N$=/ '(= C W
H-</4 ESEYW -!, 6 " ' $)& *# $=/ C W
H-</4 ESEZW -!, 6 " :2F- ,#(F/ L&/4 ,#&N$=/ '(= C W
H-</4 ESE W -!, "#-/# 4# 8&1/4 ,#( ,#&N$=/ '(= C W
H-</4 ESE W -!, "#-/# 4# 8&1/4 ,#( 6(% G( G-!/#W
H-</4 ESE W -!, "#-/# 4# 8&1/4 ,#( 6(% "-F( ' $%/ -!A ,#&-=/W
H-</4 ESE[W #(F/ ,-!, "#-F,# -/# 0-1 "&FW
H-</4 ESUKW #(F/ ,-!, "#-F,# -/# 0-1 "&FW
H-</4 ESU W #(F/ ,-!, "#-F,# -/# 0-1 "&FW
H-</4 ESUEW -! "5? ,&<- ,-!, "#-/# 4# *# 6? 5$G$"W
H-</4 ESUUW -! "5? ,&<- ,-!, "#-/# 4# *# 6? 5$G$" P" $+A "&F,RW
H-</4 ESUYW -!, "#-/# 4# ,&<- QC W
H-</4 ESUZW -!, "-1 /4&N$./ ,&<- I-F,# 4 9 5(+ W
7/# ES W '() ,#-./ #(F X W
7/# ESEW '() *#(+ X W
7/# ESUW '() ,#-./
7/# ESYW '() 6(% /# ! ,#2 /4 "57/# 0-1 /4-3/ L$+AW
7/# ESZW '() :$ "#-/# 4# W
7/# ES W -!, "52 1/4 # FA /-FA 4 -! "5? ,#( W
7/# ES W ?- ,#@ "52F, " $+AO4 -!/ " $+AW
7/# ES W # 829 : $%& *#(+ 0-1( 6(% /# ! ,#2 /4 "57/# \:-G#W
7/# ES[W '() I-F,# ,#-./ D UVD KW
7/# ES KW '() I-F,# ,#-./ D YO K W
7/# ES W '() I-F,# ,#-./ D ZW
7/# ES EW '() I-F,# ,-!, ,#-./ DHUVDHKW
7/# ES UW '() I-F,# ,-!, ,#-./ DH VDHYW
7/# ES YW '() I-F,# ,-!, ,#-./ D VDHZ 0-1 D EVDHKW
7/# ES ZW '() I-F,# ,-!, ,#-./ D YVDHUW
7/# ES W '() I-F,# ,-!, ,#-./ D CW
7/# ES W '() I-F,# ,-!, ,#-./ D W
7/# ES W '() *#(+ ,&<- " I$5K 0-1 6(% ,# - "52 !, 0 ! QC W
7/# ES [W -</ '() "# 1 4 -/ L&/4 '$+I ,&<- (&/"$5 W
7/# ESEKW '() *#(+ ,&<- I$5 W
7/# ESE W '() *#(+ ,&<- I$5EW
7/# ESEEW '() *#(+ ,&<- I$5EW
7/# ESEUW '() I-F,# ,&<- /4(9 0-1( C W
7/# ESEYW #& *N1 ,#&N$=/ '(= C W
7/# ESEZW ->A "#-/# 4# *$+" ;&-< # $%& ,#@/# A#-< 0-1 "5-! W
7/# ESE W -!, * $=& #(-F" '(%/4 ,&<- 6(% G( G-!/#W
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
7/# ESE W -!, * $=& #(-F" '(%/4 ,&<- 6(% G( G-!/#W

7/# ESE W '() I-F,# ,&<- 6(% G( G-!/#W
7/# ESE[W '() I-F,# /4(9 0-1( "2 /4 "2FW
7/# ESUKW '() *#(+ I-F,# "-F( ' $%/ -!A ,#&-=/ ,#( 6(% G( G-!/#W
7/# ESU W C-( '(%/4 8&1/4 "#-F,# -/#O"&F ,(%/4 #2 </4 ,-+& #7/# X B M #(->, W
7/# ESUEW 4(9 0-1( /#-%/ L&/4 "21 6$./ /4(-1 ,-+& #7/# X B M #(->, W
7/# ESUUW H(% 8-( '(%/4 D W
7/# ESUYW '() I-F,# 5$G$" "5(/4 ,# AW
7/# ESUYW -F,# 5$G$"W
7/# ESUZW 57/# "2F "# 1 4 -/ *# 5$G$" D ,(! /(+ W
7/# ESU W 57/# "2F "# 1 4 -/ *# 5$G$" D *#(./4 /(+ W
7/# ESU W 57/# "2F "# 1 4 -/ *# 5$G$" D *#(./4 /(+ W
7/# ESU W '() :(4 , ,&<- ,-!, /4-J"W
7/# ESU[W '() *#(+ ,&<- QC W
7/# ESYKW -!/# "#2!, ,A& 6-]/4 ,-!,# 8&1/4 /4-J"W
7/# ESY W -!, '2 1/4 4 -( " $+A 0 ! I-F,# /-FA /(+ " $+AW
7/# ESYEW '() /4&N$./ :N! I-F,# /-FA "52F, " $+A "21 ,(=/4 W
7/# ESYUW -!, '2 1/4 4 -( " $+A 0 ! I-F,# /-FA /(+ " $+A ;&- ,#&N$=/ '(= W
7/# ESYYW '() /4&N$./ :N! I-F,# /-FA /(+ " $+A "21 ,(=/4 ;&- ,#&N$=/ '(= W
7/# ESYZW '() /4&N$./ :N! I-F,# /-FA 8&1/4 ,(=/4 M W
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
W
! "# $ %& !"' &
( ( )*+, % - $ # $ $ . / $ 0 $ '
( 1 2($ !$ ! % $2 % 3 !/ $
$ 4 5 ! % ( )*+,' & -( )*+, 5 !
! % - - 6 ! -" )* ()*,,7 8 "7 ! 3 !! ( - -
2( $ % $ $9 $ $2 0 ! % ! '
()*,, (: ! " - ! % 8 "( ;<
% - $ ! = )>?+ @ $ ! % ()*,,'
( A# - 37 4 5 - 5 ! "! 7 !(
- $ - 7 " - " -" 0 ! B "
5 !'
C = )>;+ / $ $ - ! ! - 7 3 - "
- 5 - < - - 3D - @ '& " ( ! EE( A# )
$ % $8 '
C! " " $ 5 !( ! - ! - 5 ! F %
G H : I &7 (J#7 I. '''K7 - - ! $8 +)L J $5 MLN J $5'
W
O " - - 5 !( -$ - % - !7 ! - ! -
D - P
Q (: ;R)* 7 "5 ! $ - O $ $5 - '
- -S A# - " L+* " L+* N " '
- - ! 0 % H RA % $ K'
- $ ;R)* '
- - ! % % ! R ! ! : I &'
- - " I. ),R)L '
- - - -% HT ! % $ $ K'
- - % $ R % $ R(J#'
- @ $ ! % Q .'
-# (( $% $ 5 ! - ! % U 7 (7 U '
- - EE( A# < - ! R - - ) $ '
- V ! 7 5 $'
- @ $ ! % : W'
- @ $ E $ '
- @ $ ! % IC'
V 4 (: ( )*S;?XI P
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
Y! M+ '
& - ) 8 ! $ ! $8 L 8'
& !P
Z . < L,#O[ ! 3 ! '
Z . < L,, 8 '
. ! ! - ! $8 S ;N\)B] $5 '
. ! ! -5 3 I# M*;\; " '
. ! ! -5 3 EE( A# L+*\; " '
• & $,P 6 $R $; - $ - '

• & $)P 6 $R $ )* - $ - 7 - (:
! $ ! ! - ! ! 4 ! ! ! '
• & $LP 6 $R $; - ! ;< 7 $ - % $'
• O % $ 7 % $ 7 (J#'
% $ - $ ! )*< 7 % ! )L'+
% $ - $ ! )*< 7 % ! L,,
V % ! - (J# ),< '
!
• -; " F ! F I. ),< '
• -$ WA HW$ ] < A K'
• N - -% ! P
O - ! '
N -% T ES F % $ ! - % $8 '
V % ! 3 % $8 ! 3 (: - -% $ !'
- ! 3$ - - $ " ! '
" #$ #% & '
W - ! $8 E 5S % -% - ! ),,,,, '
W -5 3 EE( A# % -% - ! ),,,,,, '
W - EE( A# - ! 35 3 B, = - % $8 5 -
% '
# % $8 % ( !D L H < $ $ ($ !$ !K'
C! 5 ! ! +T % % $8 %'
-J 5 !& $ HJ.&K - 5 ! F % G $ %'
- % $8 3 '
- ! % = ! !'
- 5 !'
- ! 3$ .H < $ . !K !D L '
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
( ) " * +'
! ! #A - - 4 F P ! %7 ! ! -S REE( A#
'V -% ! LT +7+T = ! ! %' ( % -
$ ! ! ! % $ ! ! '
W ! L<) $8 " - 1 $ - B ( )*S;?X'
Program Memory Data MSSP
EEPROM 10 -bit CCP Timers
Device # Single Word SRAM I/ O USART Comparators
Bytes ( Bytes ) A/D ( ch ) ( PWM ) SPI Master 8 / 16-bit
Instructions ( Bytes ) 2
l C
PICI 6F873A 7.2K 4096 192 128 22 5 2 Yes Yes Yes 2/1 2
PIC16F874 A 7.2K 4096 192 128 33 8 2 Yes Yes Yes 2/1 2
PIC16F876A 14.3K 8192 368 256 22 5 2 Yes Yes Yes 2/1 2
PIC16F877 A 14.3K 8192 368 256 33 8 2 Yes Yes Yes 2/1 2
H-</4 ES W -!, 0 ' $)& *# $=/ #(F XW

O8 L<) $8 " - ( )*S;?XI'
< o o
_i
c\4
CL
o
40-Pin PDIF K r- c o
yOiQ
^
c o c o c v j T- o
. Q. Q. Q. iO- 0
^
MCLR/VPP
RA0 /AN0
— n1
n2
w 40 3
39 3
RB7/PGD
RB 6/ PGC
I
** »
—
X Q D W W M W O O
—- -COCOCLQ Q CLC/) O
^
C O V) C O (
»'X'X'X'.h
Nr OfOCMt
^
O O O Q Q Q Q O O O O
CHCHCHCHCHCHCHCHCHCHZ
..
- V
^—
-
RA1/AN1 3 38 3 RB 5 -
44 Pin TQFP
i w m m
-
RA 2AN2A/REF-/CVREF n4 37 RB4
RA3/ AN3/VREF+
RA4/T0CKI/C10UT
L 5
6
36 3
35
RB3/PGM
RB 2 RC 7 / RX/DT r~rr 1
mix 2
CO
-
r
T
>
- O <J> co
* ^
CO
(O
SCO U)
co co co cO 'T
33
32
NC
RCO/T10SO/T1CKI
RD4/PSP4
RA5/AN4/SS/C2QUT n7 < 34 RB 1 RD5/PSP 5 r rr 3
~
31 OSC2/ CLKO
H8 r^ - RD6/PSP6 I IT 4 30 OSC1/ CLKI
- 33 3
RE0 /RD/AN5 RBO/INT RD7/PSP7 I IT 5 PIC16F874A 29 Vss
CO
RE1/WR/ AN6 H 9 < 32 3 VDD VSS
m
6 PIC16 F877A 27 rn
VDD
RE 2/ CS/AN7
VDD 7
RE2/CS/AN7 10 31 3 Vss
- r rr
~
RBO/INT 8 26 RE 1/ WR/AN6
r-
VDD n 11 co 30 3 RD 7/PSP7 RB 1 r rr
~
9 25 RE0/RD/ AN5
Vss
OSC1/CLKI
n 12
13
Li
CO - 29
28 3
RD6/PSP6
RD 5/PSP5
RB2
RB 3/ PGM
l IT 10
I IT 11
CN
^ ^^ ^ 02 u, eo o> o cv
24
23
RA 5/ AN4 / SS/ C20UT
RA 4 /T0CKI/C10UT
OSC2/CLKO n 14
o
CL 27 3 RD4/PSP4 UMIW
RCO/T10SO/T1CKI
RC 1/T10SI/CCP2
E 15
16
26
25
3 RC7/RX/DT
RC6/TX/CK
l l l t t l t i. t
QO^^ + OQ £L O T - U
RC2/CCP1 L 17 24 3 RC5/SDO
ssSSgsSUI 6
CH CH cl 5
RC 3/SCK /SCL
RD0/PSP0
RD 1 /PSP1
L 18
n 19
20
23
22
21
3
3
RC4/SDI / SDA
RD 3/PSP3
RD2/PSP2
cr cr
^ “1
<
CNJ
Z CH
CO
<
2
CH
7/# ES W '() ,#-./ #(F X W

W
0 R
-W ! "# $%&V
( )*S;??I - B,RBB - $ - P
• -+% $ R %'
• -; " IR.'
• V ! - % $ ! !'
• - -! % - ( )*S;?MIR( )*S;?BI'
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
W ! L<L 3 - 1 4 ( )*S;??IP
V 4 ( )*S;??I
& ! . < L,#O[
H . "K (A 7 WA H(J &7 A &K
W - ! $8 S H)B< ] $5K ;N
W -5 3 H " K M*;
W -5 3 EE( A# H " K L+*
- ! ! 1 )+
- % $ % - % $ I7 W7 7 .7 E
& $ M
- 5 % $ R % $ R(J# L
/ % % # (7 : I &
/ % ! ! ( (
# 5 IR. ), ; ! 3
W - ! L
& % M+
B, (. (
BB (Q
BB &^S(
BB ^SC
H-</4 ESEW (!I "-J" '->, ' $=I
6W '() *#(+ V
O8 L<L $8 " ( )*S;??I7 ( ! - P
• N IQ: 0 I$ Q ! : '
• N - - ! $8 0S ($ !$ # $"'
• N - - 5 3 EE( A# 0 . E( A#'
• N -9 ! I# 0 I# 9 ! $'
• N ! 3 0 $ . 5 $ '
• N ! 4 '
• N ! $'
• N ! % %'
• N " F ! ! 0I. '
• N - % $ %'
,W '() ,#-./ 0-1 ,#2!, /-3/4 ,-!, ,#-./V
( ! ! " - ( B, 8 L<M'
, 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
13 Data Bus 8 PORTA
<=7 Program Counter
RAO /ANO
Flash A RA1/AN1
Program
V
Memory
V RA2/AN2/VREF-/CVREF
8 Level Stack RAM RA3/AN3/ VREF+
(13-bit) File RA4 /T0CKI/C1OUT
Registers RA 5 /AN4 /SS/ C20UT
Program
Bus
14
V
RAM Addr<1>
51 \
/ Addr MUX
PORTB
RBO /INT
RBI
Instruction reg
A A Indirect \ RB2
Direct Addr 7 RB3/ PGM
8/ Addr
/ RB4
FSR reg RB5
8
Status reg 1 RB6/PGC
RB7/PGD
PORTC
/ ll ll
RC0/T1OSO/T1CKI
3,
Power-up
Timer
\ MUX / RC 1/T10SI/CCP2
RC2/CCP 1
V RC3/SCK /SCL
Instruction . Oscillator > RC4/SDI/SDA
Decode &
Control
<J={> Start-up Timer ALU RC5/SDO
Power-on RC6/TX/CK
Reset 8
RC7/RX/DT
Timing Watchdog
Generation Timer W reg
PORTD
OSC1/CLKI Brown-out RDO / PSPO
OSC2/CLKO Reset RD 1/PSP 1
In-Circuit RD2/PSP2
Debugger RD3/PSP3
Low-Voltage RD4/PSP4
Programming RD5 /PSP5
RD6/PSP6
11
RD7/PSP7
M Kl PORTE
MCLR VDD, Vss RE0/RD/AN5
RE1 /WR/AN6
^ RE2/CS/ AN7
TimerO Timer ! Timer 2 Parallel

10- bit A /D Slave Port
.
A 7\
JL
V
II
Synchronous Voltage
Data EEPROM CCP1.2 USART Comparator
Reference
Serial Port
Device Program Flash Data Memory Data EEPROM
PIC16F874A 4K words 192 Bytes 128 Bytes

PIC16F877A 8K words 368 Bytes 256 Bytes
7/# ESEW '() *#(+ X W

- = ! - P
• A )R QN H)MKP ! 3 - 5 ! 4 ! 3 !
! '
A )P ! 3 5 ! 4 ! 3 ! ! ! ' C! 3
- &$ !! $ 5 !5 ! '
QN P ! 3 ! ! ! '
- 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
• A LR QNA H)BKP ! 3 $ 5 ! 4 ! 3$ % ! '

A LP ! 3 $ 5 ! 'N 4 ! !'
QNAP 7 ! 3$ A L7 _ !` A ) F
8 '
40- Pin PDIF

MCLR/VPP U1 40 3 RB 7/ PGD
RAO / ANO H 39 3 RB6/PGC
--
2
RA1 / AN1 O3 38 RB 5
-
RA2' AN2A^REF-/CVREF
RA3 / AN3/VREF+
"
n
4
5
37
36 3
RB4
RB 3/ PGM
RA 4 / T0CKI/C10UT 06 35 RB 2
RA 5/ AN4/SS/C20UT H 7 < 34 3 RB1
RE0/RD/AN5 H8
oo
33 3 RBO/INT
RE1/WR/ AN6 9 32 VDD
RE2/CS/AN7 «—- » H 10 5 31 Vss
VDD C 11 co 30 3 RD7/PSP7
g^
Vss 12 29 RD 6/PSP6
0SC1/CLKI n 13 28 RD5/PSP5
OSC2/CLKO n 14 27 3 RD4/PSP4
RCO/ T10SO/T1CKI n 15 26 1 RC7/RX/DT
RC 1/T10SI/CCP2 n 16 25 RC6/TX/CK
RC2/CCP1 L 17 24 3 RC5/SDO
RC3/SCK /SCL E 18 23 RC4/SDI / SDA
RDO/ PSPO L 19 22 RD 3/PSP3
RD1/PSP1 C 20 21 1 RD 2/PSP2
7/# ESUW '() ,#-./

• RT(( H)KP -L - = !P
P ! 3 $ F - %'
T((P % $8 ( 8 - ! $ ! 3 -% % $8 '
• I,RIC, HLKP -L - = !P
I,P R % '
IC,P ! 3 ! - ,'
• I)RIC)HMKP
I,P R % '
IC)P ! 3 ! - )'
• ILRICLRT ES<R T ES HBKP
ILP R % '
ICLP ! 3 ! - L'
T ES+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
IBP R % 0 ! 3$ '
&A N P ! 3 ! ! & $ ,'
)A:&P ! 3 $ - )'
• I+RICBR R LA:& H?KP
I+P R % '
ICBP ! 3 ! - B'
P ! 3 ( % '
LA:&P ! 3 $ - L'
• W,R C& HMMKP
W,P R % '
C&P ! 3 F ! 1 ! '
• W) HMBKP R % '
• WL HM+KP R % '
• WMR(/ P
WMP R % '
% -% % $8 -% % ('
• WB HM?K7 W+ HM;KP R % '
• W*R(/ HM>KP
W*P R % '
(/ P ! 3$ ! % $8 ('
• W?R(/. HB,KP
W?P R % '
(/.P ! 3$ 5 3 % $8 ('
• ,R&)A AR&) N H)+KP
,P R % '
&)A AP ! 3 5 !& $)'
&) N P ! 3 ! ! & $)'
• )R&)A R (L H)*KP
)P R % '
&)A P ! 3 5 !& $)'
(LP ! 3 % $ L7 ! 3 $ % $ L7 ! 3 $ (J#L'
• LR () H)?KP
LP R %
()P ! 3 % $ )7 ! 3 $ % $ )7 ! 3 $ (J#)
• MR NR Q H);KP
MP R % '
NP ! 3 ! % ! R ! 3$ ('
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
QP ! 3 ! % ! R ! 3$ L '
• BR . R .I HLMKP
BP R % '
. P5 3 ('
L
.IP R %5 3 '
• +R .A HLBKP
+P R % '
.AP 5 3 $ ('
• *R&XR N HL+KP
*P R % '
&XP $ " ! : I &'
NP ! ! : I &'
• ?R XR.& HL*KP
?P R % '
XP ! : I &'
.&P 5 3 ! : I &'
• .,R( (, H)>KP
.,P R % '
( (,P 5 3 % $ - ! !'
• .)R( () HL,KP
.)P R % '
( ()P 5 3 % $ - ! !'
• - .LR( (L HL)K7 .MR( (M HLLK7 .BR( (B HL?K7 .+R( (+ HL;K7 .*R( (* HL>K7
.?R( (? HM,K ! )>7 L,'
• E,R RIC+ H;KP
E,P R % '
P % $ - ! !'
IC+P ! 3 ! +'
• E)R RIC* H>KP
E)P R % '
P ! % $ - ! !'
IC*P ! 3 ! - *'
• ELR RIC? H),KP
ELP R % '
P % % $ - ! !'
IC?P ! 3 ! - ?'
• T.. H))7MLK T H)L7 M)KP - ! ( '
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
/0 R
-M - $ !( )*S;??I' W - ! $8 -5 3
$ !% "' N -5 3 EE( A# % '
-W -+& "5&!, 6(% /# ! ,#2 /4 "57/#V
( )*S;??I - ! $8 )M - D "- - ! $8 -5 ! !
;N] $5\)B H)NJ $5 b )B K'
N ( 6$ 8 ! ( - ! - $6 ,,,, " $ ! 1 - 6 Y ,,,BO'
PC< 12:0>
CALL, RETURN
A 13
RETFIE , RETLW
V
Stack Level 1
Stack Level 2
Stack Level 8
Reset Vector OOOOh
Interrupt Vector 0004h

0005h
Page 0
07FFh
0800h
Page 1
On-Chip
OFFFh
Program < 1000h
Memory
Page 2
17FFh
1800h
Page 3
1FFFh
7/# ESYW '() 6(% /# ! ,#2 /4 "57/# 0-1 /4-3/ L$+AW

6W -+& "5&!, 6(% /# ! 829 : $%&V
W -5 3 % W 3 ! ! - = ! 4 'O
() (, 0 $ ! - -* -+ 5 ! ! L<M'
# @ - $ ! 6 Y ?S H ! !
- )L; " K' - - - 6
Y % @ 5 - ! - = ! 4 ' &$ - ! -
= ! 4 - ! 5 !0 - I#' & - !
- 3 ! ! 4 '
, 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
H-</4 ESUW M2F- ,#(F/ 6-/* "#-/# 4# W

,W :$ "#-/# 4# *$+" ;&-< "(=/4 ;&-!"V
S ! - $ " $ % 4 ! - % !D S ! 4 '
File File File File
Address Address Address Address
Indirect addr.(’ >

< <
Indirect addr. ( )
00 h 80h Indirect addr. ^ 100h Indirect addr.( ) 180h
TMRO 01h OPTION REG 81h TMRO 101h OPTION REG 181h
PCL 02h PCL 82h PCL 102h PCL 182h
STATUS 03h STATUS 83h STATUS 103h STATUS 183h
FSR 04h FSR 84h FSR 104h FSR 184h
PORTA 05h TRISA 85h 105h 185h
PORTB 06 h TRISB 86h PORTB 106h TRISB 186h
PORTC 07 h TRISC 87h 107h 187h
PORTD(1) 08 h TRISD(1) 88h 108h 188h
PORTE <1> 09h TRISE(1) 89h 109h 189h
PCLATH OAh PCLATH 8Ah PCLATH 10Ah PCLATH 18 Ah
INTCON OBh INTCON 8Bh INTCON 10Bh INTCON 18Bh
PIR 1 OCh PIE1 8Ch EEDATA 10Ch EECON1 18 Ch
PIR 2 ODh PIE2 8Dh EEADR 10Dh EECON 2 18Dh
Reserved 2
TMR 1L OEh PCON 8 Eh EEDATH 10Eh
2 **
18Eh
TMR 1H
T 1CON
OFh
10 h
8 Fh
90h
EEADRH 10Fh
110h
Reserved
**
18Fh
190h
TMR 2 11 h SSPCON2 91h 111h 191h
T2CON 12h PR2 92h 112h 192h
SSPBUF 13h SSPADD 93h 113h 193h
SSPCON 14 h SSPSTAT 94h 114 h 194h
CCPR 1L 15h 95h 115 h 195h
CCPR 1 H 16 h 96h 116 h 196h
CCP1 CON 17h 97h General 117 h General 197h
Purpose Purpose
RCSTA 18 h TXSTA 98h Register 118 h Register 198h
TXREG 19 h SPBRG 99h 16 Bytes 119h 16 Bytes 199h
RCREG 1Ah 9Ah 11Ah 19 Ah
CCPR 2 L 1Bh 9Bh 11Bh 19Bh
CCPR 2H 1Ch CMCON 9Ch 11Ch 19 Ch
CCP2CON 1Dh CVRCON 9Dh 11Dh 19Dh
ADRESH 1Eh ADRESL 9 Eh 11Eh 19Eh
ADCONO 1Fh ADCON1 9 Fh 11Fh 19Fh
20h AOh 120h 1A 0h
General General General
Purpose Purpose Purpose
General Register Register Register
Purpose
Register 80 Bytes 80 Bytes 80 Bytes
96 Bytes EFh 16 Fh 1EFh

FOh 170h accesses 1FOh
accesses accesses
70h -7 Fh 70h-7Fh 70h - 7 Fh
7Fh FFh 17Fh 1FFh
Bank 0 Bank 1 Bank 2 Bank 3
7/# ESZW '() :$ "#-/# 4# W

H)K - - - 3 - ! - $6 ,'
, 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
HLK - 5 HZK !% ! "-'

H)K C 3 ! ! " ! - $ !( )*S;?*I'
HLK C 3 ! ! " '
W ! 3 ! ! _ $ ! -, $8 " $ ! ! L<B'
Value on : Details
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 BitO
POR , BOR on page :
Bank 0
00h( 3) INDF Addressing this location uses contents of FSR to address data memory (not a physical register ) 0 0 0 0 0 0 0 0 31, 150
01h TMR 0 TimerO Module Register xxxx xxxx 55, 150
02h( 3) PCL Program Counter ( PC) Least Significant Byte oooo oooo 30, 150
( 3)
03h STATUS IRP RP1 RP0 TO PD Z DC C 0001 lxxx 22, 150
04h( 3) FSR Indirect Data Memory Address Pointer xxxx xxxx 31, 150
05h PORTA PORTA Data Latch when written: PORTA pins when read - - Ox 0000 43, 150
06h PORTB PORTB Data Latch when written: PORTB pins when read xxxx xxxx 45, 150
07h PORTC PORTC Data Latch when written: PORTC pins when read xxxx xxxx 47, 150
08h( 4) PORTD PORTD Data Latch when written: PORTD pins when read xxxx xxxx 48, 150
09h( 4) PORTE RE2 RE1 RE0 - XXX 49, 150
0Ah
0Bh(3)
-
(1 3)
PCLATH
INTCON GIE PEIE TMR0IE
Write Buffer for the upper 5 bits of the Program Counter
INTE RBIE TMR0IF INTF RBIF
- - o oooo 30, 150
0000 OOOx 24, 150
OCh PIR 1 PSPIF(3) ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR 1IF oooo oooo 26, 150
ODh PIR2 CMIF EEIF BCLIF CCP2IF - o - o o -- o 28, 150
OEh TMR1L Holding Register for the Least Significant Byte of the 16-bit TMR 1 Register xxxx xxxx 60, 150
OFh TMR1H Holding Register for the Most Significant Byte of the 16-bit TMR1 Register xxxx xxxx 60, 150
10h T1CON T1CKPS1 T1CKPS0 T10SCEN T1SYNC TMR1CS TMR10N - - 0 0 oooo 57, 150
11h TMR2 Timer2 Module Register oooo oooo 62, 150
12h T2CON TOUTPS3 TOUTPS2 TOUTPS1 TOUTPSO TMR20N T2CKPS 1 T2CKPS0 - 0 0 0 oooo 61, 150
13h SSPBUF Synchronous Serial Port Receive Buffer /Transmit Register xxxx xxxx 79, 150
14h SSPCON WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 0000 0 0 0 0 82, 82,
150
15h CCPR1L Capture/ Compare/PWM Register 1 (LSB) xxxx xxxx 63, 150
16h CCPR1H Capture/Compare/ PWM Register 1 (MSB) xxxx xxxx 63, 150
17h CCP1CON CCP 1X CCP1Y CCP1M3 CCP1M2 CCP1M1 CCP1M0 - - oo oooo 64, 150
18h RCSTA SPEN RX 9 SREN CREN ADDEN FERR OERR RX9D oooo OOOx 112, 150
19h TXREG USART Transmit Data Register oooo oooo 118, 150
1Ah RCREG USART Receive Data Register oooo oooo 118, 150
1Bh CCPR2L Capture/ Compare/ PWM Register 2 (LSB) xxxx xxxx 63, 150
1Ch CCPR2H Capture/Compare/PWM Register 2 (MSB) xxxx xxxx 63, 150
1Dh CCP2CON CCP2X CCP2Y CCP2M3 CCP2M2 CCP2M1 CCP2M0 - - 0 0 0 0 0 0 64, 150
1Eh ADRESH A/D Result Register High Byte xxxx xxxx 133, 150
1Fh ADCONO ADCS1 ADCS0 CHS2 CHS1 CHS0 GO/DONE ADON 0000 0 0 - 0 127, 150
H-</4 ESYW (!I "-J" ,-!, "#-/# 4# '->, 6 $%"W

\b ! - 6 7 b ! " 7 Db ! - $6 " 7+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
HBK (A &.7 (A &E7 & . & E ! - $ !( )*S;?MIR;?*I

3 - ! - $6 ,'
H+K W -B ! EEI. O Y 5 ! ( )*S;?*IR;??I'
W ! 3 ! ! _ $ ! -) $8 " $ ! ! L<+'
Value on : Details
POR , BOR on page :
80h 3)
,
Bank 1
INDF Addressing this location uses contents of FSR to address data memory (not a physical register ) 0 0 0 0 0 0 0 0 31, 150
81h OPTION REG RBPU INTEDG TOCS TOSE PSA PS2 PS1 PSO mi nil 23, 150
82h< 3 > PCL Program Counter ( PC) Least Significant Byte oooo oooo 30, 150
83h(3) STATUS IRP RP1 RPO TO PD Z DC C 0001 lxxx 22, 150
84h< 3 > FSR Indirect Data Memory Address Pointer xxxx xxxx 31, 150
85h TRISA PORTA Data Direction Register - -li mi 43, 150
86h TRISB PORTB Data Direction Register mi nil 45, 150
87h TRISC PORTC Data Direction Register mi nil 47, 150
88h( 4) TRISD PORTD Data Direction Register mi nil 48, 151
( 4)
89h TRISE IBF OBF IBOV PSPMODE PORTE Data Direction bits oooo - 111 50, 151
8 Ah(1'3) PCLATH Write Buffer for the upper 5 bits of the Program Counter - - o oooo 30, 150
8Bh(3) INTCON GIE PEIE TMR0IE INTE RBIE TMR0IF INTF RBIF 0000 O O O x 24, 150
(2)
8Ch PIE1 PSPIE ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE oooo oooo 25, 151
8Dh PIE2 CMIE EEIE BCLIE CCP2IE - 0 - 0 0 - - 0 27, 151
8 Eh PCON POR BOR --qq 29, 151
8Fh Unimplemented
90h Unimplemented
91h SSPCON2 GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN oooo oooo 83, 151
92h PR2 Timer2 Penod Register mi nil 62, 151
93h SSPADD Synchronous Serial Port (l2C mode) Address Register oooo oooo 79, 151
94h SSPSTAT SMP CKE D/A P S R /W UA BF oooo oooo 79, 151
95h Unimplemented
96h Unimplemented
97h Unimplemented
98h TXSTA CSRC TX9 TXEN SYNC BRGH TRMT TX9D 0000 -010 111, 151
99h SPBRG Baud Rate Generator Register oooo oooo 113, 151
9Ah Unimplemented
9Bh Unimplemented
9Ch CMCON C20UT C10UT C2INV C1INV CIS CM2 CM 1 CMO 0000 0111 135, 151
9Dh CVRCON CVREN CVROE CVRR CVR 3 CVR2 CVR 1 CVRO 000 - oooo 141, 151
9Eh ADRESL A/D Result Register Low Byte xxxx xxxx 133, 151
9Fh ADCON1 ADFM ADCS2 PCFG3 PCFG2 PCFG1 PCFGO 00 -- o o o o 128, 151
H-</4 ESZW (!I "-J" ,-!, "#-/# 4# '->, 6 $%"W

W ! 3 ! ! _ $ ! -L $8 " $ ! ! L<*'
, 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
Value on: Details

POR , BOR on page :
Bank 2
100h(3) INDF Addressing this location uses contents of FSR to address data memory (not a physical register) 0 0 0 0 0 0 0 0 31, 150
101h TMR 0 TimerO Module Register xxxx xxxx 55, 150
102h(3) PCL Program Counters (PC ) Least Significant Byte oooo oooo 30, 150
103h(3) STATUS IRP RP1 RP0 TO PD Z DC C 0001 lxxx 22, 150
104h(3) FSR Indirect Data Memory Address Pointer xxxx xxxx 31, 150
105h Unimplemented
106h PORTB PORTB Data Latch when written: PORTB pins when read xxxx xxxx 45, 150
107h Unimplemented
108h Unimplemented
109h Unimplemented
10Ah(1’3> PCLATH Write Buffer for the upper 5 bits of the Program Counter - - 0 oooo 30, 150
( 3)
10Bh INTCON GIE PEIE TMR0IE INTE RBIE TMR0IF INTF RBIF 0000 OOOx 24, 150
10Ch EEDATA EEPROM Data Register Low Byte xxxx xxxx 39, 151
10Dh EEADR EEPROM Address Register Low Byte xxxx xxxx 39, 151
10Eh EEDATH EEPROM Data Register High Byte — XX xxxx 39, 151
( 5)
10Fh EEADRH EEPROM Address Register High Byte xxxx 39, 151
Bank 3
180h(3) INDF Addressing this location uses contents of FSR to address data memory (not a physical register ) oooo oooo 31, 150
181h OPTION REG RBPU INTEDG TOCS T0SE PSA PS2 PS1 PS0 mi mi 23, 150
182h(3) PCL Program Counter ( PC Least Significant Byte oooo oooo 30, 150
(3)
183h STATUS IRP RP1 RP0 TO PD Z DC C 0001 lxxx 22, 150
184h(3) FSR Indirect Data Memory Address Pointer xxxx xxxx 31, 150
185h Unimplemented
186h TRISB PORTB Data Direction Register mi nil 45, 150
187h Unimplemented
188h Unimplemented
189h Unimplemented
18Ah(1*3) PCLATH Write Buffer for the upper 5 bits of the Program Counter - - 0 oooo 30, 150
18Bh( 3) INTCON GIE PEIE TMR0IE INTE RBIE TMR0IF INTF RBIF 0000 000 X 24, 150
18Ch EECON1 EEPGD WRERR WREN WR RD x-- xOOO 34, 151
18Dh EECON2 EEPROM Control Register 2 (not a physical register) 39, 151
18Eh Reserved; maintain clear oooo oooo
18Fh Reserved; maintain clear oooo oooo
H-</4 ES W (!I "-J" ,-!, "#-/# 4# '->, 6 $%"W

8W -!, "#-/# 4# ,(! ,#2!, /-3/4 '->, 6 $%"V
C 3 ! ! - = ! 4 3 ! ! 5 ! (: 3 !
! ! " (:' C 3 ! ! " I# e '
&/&& - $ ! - IQ:7 $ ! - - -5 3 '

STATUS REGISTER ( ADDRESS 03h, 83h , 103h, 183h)
R/W-0 R/W-0 R / W- 0 R -1 R -1 R / W- x R / W- x R/W-x
IRP RP 1 RP0 TO PD Z DC C
bit 7 bitO
- = ! - $ ! ! $ ! -P
, 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
W ? P ! H5 ! 6 Y! - %K'
)b L7 M H),, <)SS K
,b ,7 ) H,, < SS K
W *<+ ' P - ! H5 ! 6 Y $ %K
)) b M H);, <)SS K
), b L H),, < )?S K
,) b ) H;, < SS K
,, b , H,, < ?S K
# @ )L; " '
W B P& < HW ! K
)b ! 7 Q J.& 4 QEE(
,b ! J.&
W M P ( ] $<5 ] H 1 ! K
)b ! 4 _ ! Q J.&
,b QEE(
W L /P f $ H ,K
)b D _ ! ,'
,b D - ,'
W ) 0 P.! $$"R H - I..JS7 I..QJ7 :WQJ7 :WJSK
H $ R K
)b !B % 6 $ '
,b !B % ! 6 $ '
W , P $$"R H - I..JS7 I..QJ7 :WQJ7 :WJSK
)b D % -% - - $ '
,b D % -% - ! 6 $ '
C % -% - $ 8 $ ! - . 8 ! P
% -% $ - , 8 _ ! )7 D $ , 8 _ ! ,'
b - 7Jb - ! 7:b 5 ! ,7
< b ! - $6 " (A 7 g)hb 6 E&7 g,hb 6 -7 \b ! - 6 '
Q ! - R! 7 ! " - 3 ! - %
$ - & $,RJ.&7 ! 1 C& ! 7& $, $ (A &W'
OPTION_ REG REGISTER ( ADDRESS 81 h , 181 h )
R/W-1 R/W-1 R/ W-1 R / W-1 R/W-1 R/W-1 R / W- 1 R/W-1
RBPU INTEDG TOCS TOSE PSA PS2 PS1 PSO
bit 7 bitO
W ? P (A &W ( < %E H % -% $ (A &WK
,, 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
)b ! % -% $ (A &W'
,b % -% $ (A &W'
W * 12304P $$ % E5! H ! 1K
)b % -% ! 1 W,R C& F '
,b % -% ! 1 W,R C& F !'
W + 2 +P &# , $ H ! ! &# ,K
)b % -% ! ! 3 IBR&, N '
,b % -% ! $ !'
W B 2 +3P &# , $ E5! H - ! &# ,K
)b % -% ! IBR&, N F '
,b % -% ! IBR&, N F !'
W M +5P ($ $I ! H ! - K
)b ! - J.&'
,b ! - & $,'
W L<, + ' + P ($ $ H $ - K
/ - $6 &Y &# , &Y J.&

,,, )PL )P)
,,) )PB )PL
,), )P; )PB
,)) )P)* )P;
),, )PML )P)*
),) )P*B )PML
)), )P)L; )P*B
))) )PL+* )P)L;
H-</4 ES W -!, 6 " :2F- ,#(F/ #$% G(+ ,# - "52 !,W
N 5 ! % $8 -% % ( HQT(K $ (A &W % -% 8%
- M $ ! ! & W ! % -% $ WM !
$ ! ( '
Q ! - ! 7 - 3 ! % -% - ! 1 -
! 1 &# , $ 7 ! 1 - " (A &W ! 1 ! W,R C&'
INTCON REGISTER ( ADDRESS OBh , 8 Bh . 10Bh , 18Bh )
R/ W-0 R/W-0 R / W- 0 R/W-0 R / W- 0 R / W- 0 R / W- 0 R/W-x
GIE PEIE TMROIE INTE RBIE TMROIF INTF RBIF
bit 7 bitO
W ? 4 3P % -% ! 1
)b % -% - ! ! 1'
,- 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
,b ! % -% - ! ! 1'
W * 3 3P % -% ! 1 !
)b % -% ! 1 '
,b ! % -% ! 1 '
W + 2* 3P % -% ! 1 &# ,
)b % -% ! 1 '
,b ! % -% ! 1 '
W B 123P % -% ! 1 ! W,R C&
)b % -% ! 1 '
,b ! % -% ! 1 '
W M 6 3P % -% ! 1 " (A &W
)b % -% ! 1 (A &W "
,b ! % -% ! 1 (A &W "
W L 2* 7P $ &# ,
)b ! &# , $ H - _ !% K'
,b ! &# , ! $ " $ '
W ) 127P - ! 1 ! W,R C&'
)b ! 1 ! W,R C& 3 "$ H - _ !% K
,b ! 1 ! W,R C& ! "$
W , 6 7P - (A &W - "
)b -F - W?P WB " $ ! -i ! !
F 3 % " _ ! )' N (A &W 3 5 -
! ! F % -% - - " _ !% '
,b - W?P WB ! - " $ ! -
Q ! - - % -% ! 1 % - ! 1 ! '
PIE1 REGISTER ( ADDRESS 8Ch )
R/W-0 R / W- 0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PSPIE < >
1
ADIE RCIE TXIE SSPIE CCP1IE TMR 2IE TMR1IE
bit 7 bitO
W ? + 3P % -% ! 1 R! % $ - ! !
)b % -% ! 1 ( ( R!
,b ! % -% ! 1 ( ( R!
W * 50 3P % -% ! 1 " IR.
)b % -% ! 1 '
,b ! % -% ! 1 '
W + 3P % -% ! 1 5 3 : I &
,. 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
)b % -% ! 1 '
,b ! % -% ! 1 '
W B 28 3P % -% ! 1 % - 5 3 : I &
)b % -% ! 1 '
,b ! % -% ! 1 '
W M ++ 3P % -% ! 1 % $ % !
)b % -% ! 1 ('
,b ! % -% ! 1 ('
W L 3P % -% ! 1 ()
)b % -% ! 1 ()'
,b ! % -% ! 1 ()'
W ) 2* 3P % -% ! 1 ! F - ! &# L - ( L
)b % -% ! 1 ! F &# L - ( L'
,b ! % -% ! 1 ! F &# L - ( L'
W , 21 3' % -% ! 1 $ &# )
)b % -% ! 1 &# ) $ '
,b ! % -% ! 1 &# ) $ '
Q ! - - - ! 1 ! '
- "-P 3 ! ! 1 ! 1 "$ % $ ! -
% -% 4 % -% ! 1 / E H C& ACc?dK' ( ! 5 !%
3 ! ! 1 ! - !% 6 - $ - % -% ! 1 '
PIR 1 REGISTER ( ADDRESS OCh )
R/W-0 R/W- 0 R -0 R -0 R / W- 0 R / W- 0 R / W- 0 R / W- 0
PSPIF(1) ADIF RCIF TXIF SSPIF CCP1IF TMR 2IF TMR 1IF
bit 7 bitO
W ? + 7P - ! 1 % $ - ! ! R!
)b ! 4 ! '
,b ! 4 ! ! "$ '
W * 50 7P - ! 1 " IR.
)b " IR. 3 '
,b " IR. '
W + 7P - ! 1 : I &
)b : I & !'
,b : I & !'
W B 28 7P - ! 1 $ " : I &
)b $ " : I & $ !'
, 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
,b $ " : I & "'

W M ++ 7' - ! 1 % $ % ! H (K
)b ! 1 ( 3 "$ % - _ !% $ - D "
$ ! $8 % ! 1 H $$ % $ K' V
$ ! - " ) P
(< $ " R 3 '
L
P $ " R 3 '
L
# $P
&$ " R 3 '
V $ ! 3 ('
V % ! 3 ('
V $ ! 3 ('
V 1 " 3 ('
V $ 3 "$ ( ! $ ! - $ @ H <
$ " P ! K'
V % 3 "$ ( ! $ ! - $ @'
,b ! - ! 1 ( "$ '
W L 7' - ! 1 ()
% $ P
)b ! 1 6% &# ) - "$ H - _ !% K'
,b ! 1 6% &# ) ! "$ '
- P
)b F - ! - ! &# ) - "$ '
,b F - ! - ! &# ) ! "$ '
W ) 2* 7P - ! 1 ! F &# L - ( L
)b &# L ! F - ( LH - _ !% K'
,b &# L ! ! F - ( L'
W , 2* 7P - ! 1 $ &# )
)b ! &# ) 3 $ '
,b ! &# ) ! $ '
j)kb
!
Q ! - - % -% ! 1 ! (L7 ! 1 ! ! $ " (7
! 1 !! EE( A# ! 1 - '
, 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
PIE 2 REGISTER ( ADDRESS 8 Dh )

U -0 R/W-0 U-0 R /W-0 R /W-0 U- 0 U-0 R / W- 0
CMIE EEIE BCLIE CCP 2IE
bit 7 bitO
W ? 5 !P g,h
W * * 3P % -% ! 1 -
)b % -% ! 1 '
,b ! % -% ! 1 '
W + 5 !P g,h
W B 33 3P % -% ! 1 !! EE( A#
)b % -% ! 1 '
,b ! % -% ! 1 '
W M 6 9 3P % -% ! 1 ! !5 @
)b % -% ! 1 '
,b ! % -% ! 1 '
W L<) 5 !P g,h
W , 3P % -% ! 1 (L
)b % -% ! 1 '
,b ! % -% ! 1 '
(E E H C& ACc*dK % % -% 8 ! 1 ! '
!
Q ! - - - ! 1 (L7 ! 1 ! !5 @ (7 ! 1 !
! EE( A# ! 1 - '
PIR 2 REGISTER ( ADDRESS ODh )
U -0 R/W-0 U-0 R/W-0 R/W-0 U- 0 U-0 R / W- 0
CMIF EEIF BCLIF CCP2IF
bit 7 bitO
W ? 5 !P g,h'
W * * 7P - ! 1 -
)b ! 3 - 3 " H - _ !% K'
,b ! 3 - ! " '
W + 5 !P g,h'
W B 33 7P - ! 1 !! EE( A#
)b !! H - _ !% K'
,b !! 4 !'
W M 6 9 7P - ! 1 ! !5 @
- 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
)b ! !5 @ 3 "$ $ ! ( % 8
L
'
,b !5 @ ! "$ ! '
W L<) 5 !P g,h
W , 7P ! 1 (L
% $ P
)b ! 1 6% &# ) "$ H - _ !% K'
,b ! 1 6% &# ) "$ '
- P
)b ! F - ! &# ) "$ H - _ !% K'
,b ! F - ! &# ) "$ '
(J#P
N ! 5 !
P - ! 1 ! 1 "$ - % -% ! - ! 4
% -%7 / E H C& ACc?dK' C! 5 !% % % 3 ! ! 1
- - % -% ! 1 '
& ! ( AC H( ] $ $ K - - % -% % - -
$ ! - $ P 0 ( ] $< H(A K7 W$ ] < HWA K7 J 5 !
HJ.&K '
PCON REGISTER ( ADDRESS 8 Eh )
U-0 U -0 U-0 U-0 U-0 U-0 R /W-0 R/ W-1
POR BOR
bit 7 bitO
W ?<L 5 !P g,h
W ) P $ ! - ( ] $<
)b $ ! "$ '
,b $ 3 " $ H% _ !% ( ] $<
" $ K'
W , P $ ! - W$ ] <
)b W$ ] < ! "$
,b W$ ] < " $ H% _ ! % W$ ] <
" $ K'
" # $ %
& ! ! $8 H( K - $ ! )M 7 ; % _ ! ( Q7 -
" - ! ' - H;P)LK 8 ! ! - ! ! - %
!D ! ( QI&O' N " "$ 8 - ! ( 3 6
- 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
- ' O8 L<* $8 " - 8 ! ! ( % ! - $6' - F5 3 -

- ( % ! - $6 !D IQQ 4 /A&A'
& '
&F - /A&A _ ! - ! ! - $6 H 99 K - ! $8
( H _ ! I..JS ( QK' N !5 !% ! % -% F - /A&A7
D ! - ! 6 $F ! D -! - -( QH @ -
! L+* " K'
PCH PCL
12 8 7
^ Instruction with
PCL as
PC
A A Destination
PCLATH<4:0> 8
5 ALU
PCLATH
PCH PCL
12 11 10 8 7 0
PC GOTO , CALL
A A
PCLATH<4:3> 11
2 Opcode <10:0>
PCLATH
7/# ES W -!, "52 1/4 # FA /-FA 4 -! "5? ,#( W
( )*+,
( )*S;??I -; ! = %7 $ ! )M 7 - ! = % ! " - !
$8 "5 3 7 $ ! = % ! 4 ! '
Y V6 ! ( ! = % IQQ 4 ! 1 "$ '
. 3 $ ! ! = % "$ - E&: E7 E&QJ 4 E&S E' &
! ( QI&O ! 6 ! "'
C! = % ! ! F 'V - - ! e ! = % ;
7 8 -> 3! ! ! - $6 3 'Q - ), 3!
! ! - $6 3 - L'
! - $ ! N- - ! = % 6 $ 4 $'N ! - -
! H(: OK 4 " H(A(K' C 3 ! D ! = % IQQ7
E&: C7 E&QJ E&S E 4 ! 1'
$W #-./ "5-/4 6(% /# ! ,#2 /4 "57/#V
( )*S;??I - - ! $8 ;N ] $5' C 3 ! IQQ /A&A Y ! %
6 Y )) % -% ! $8 _ $ !% LN ] $5 $ ! -'
- 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
N IQQ 4 /A&A 8 L 6 Y " ! ( QI&O

HBPMK' N IQQ 4 /A&A7 ! 5 !% $ _ ! $ ! 3
% $8 - 6 - ! 6 Y $ ! - ! $8 ' C $ 8
)M " ! = % $ ( ' T8 - ! ( QI&OHBPMK !
$ '
- % ! ( QI&O ! 6 "
E&: C 4 E&S Q' C! 5 ! % % 5 ! ! ( QI&O !
! $8 % 4 /A&A'
TF 5 L<) ! ! $8 _ $ ! $ !) - ! $8 '
TF 5 "! $ _ ! ! ( QI&O % ! $8 %
! 1'
ORG 0x500
RCF PCLATH ,4
RSF PCLATH ,3 ; Select page 1
;(aOOh- FFFh)
CALL SUB1 PI ;Call subroutine in
;page 1 (800h -FFFh)
ORG 0x900 ; page 1 (800h -FFFh)

SUR1 PI
;ca11ed subroutine
; page 1 (SOOh -FFFh)
RETURN ; return to
;Call subroutine
; in page 0
;(00 Oh-7FFh)
\W -!, "#-/# 4# '?- ,#@ 4 -!/ " $+AB "#-/# 4# C 0-1 DV

& C.S ! !% ! F' V6 Y - ! C.S 3 $ 6 Y
! - %' V6 Y! - % 8 - _ ! - 5 ! ! C.S' W 8
5 ! ! C.S $ " ! Y 6 ! 9 HS
! $ 0S K' N ! - % F ! C.S " 3 ,, ' N ! ! - %
! C.S7 D 3 ! !8 H 4 5 - ! $ ! - - 6
!K' # ! $8 - I# 6 $F L, <LS 5 ! 6 Y! - % $8 "
$ ! F 5 L<LP
- 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
Direct Addressing Indirect Addressing
RP1: RP0 6 From Opcode 0 IRP 7 FSR Register 0
v J V V V
Bank Select Location Select Bank Select Location Select
00 01 10 11
OOh 80h 100h 180h
<
Data
1
Memory
**
7 Fh FFh 17Fh 1FFh

Bank 0 Bank 1 Bank 2 Bank 3
7/# ES W ?- ,#@ "52F, " $+AO4 -!/ " $+AW

TF 5 L<LP
#AJQJ , L, i L, ! J
#ATJS S i 5 ! J S
CEX& Q S C.S i - C.S
C S S 7S i = !S
W&S S 7B i $ B $ !S
/A&A CEX& i " CEX&
AC& C:E
P i %
S0 ! " R
. 3 EE( A# - ! $8 S - ! $ ! D - $8
! 8 !' W - " ! % $ % $ ! !! 9 ! ' - !
6 6 Y! - % !D - ! 4 ' -* ! S 5 !
! - "P
EE AC)
EE ACL
EE.I&I
EE.I&O
EEI.
EEI. O
N ! % - -5 3 7 ! EE.I&I - ; 5 3 R!
! EEI. - 6 Y - EE( A# ! $ " 'C ( - -
- 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
EE( A# )L; " 8 6 Y _ $ ! ! ;,O SSO7 ( - - EE( A#

L+* " 8 6 Y _ $ ! ! ,,O SSO'
N ! % - - ! $8 8 ! EE.I&I EE.I&O %
- ! )* $ 3 5 3 )B R! !
EEI. EEI. O % - ! )* $ 3 6 Y )M -
! $ " 'T - ( -5 ! ! - ! $8 BN] $5 8 6 Y _ $ ! !
,,,,O ,SSSO7 - ( -5 ! ! - ! $8 ;N] $5 8 6 Y _ $ !
! ,,,,O )SSSO' C $ " - - 6 Y - 8 3 6 _ $ ! !
- '
W -5 3 EE( A# % -% ! ) " 'W - ! $8 S % -%
) ] $5 ! B ] $5' O !! - ! $8 3 ! -
$ - ! B ] $5' # " ! -5 3 EE( A# 3 ! - -$
- ! 5 3 - 0 - $ - ! '
N % - 3 8 (: - ! 5 3 - EE( A#' & "
- % - !! 7( - 4 ! ! 5 3
- ! $8 i " % -% - ! $8 ' N ( - 3 7 8
! 5 ! ! % -% $ " -5 3 4 - ! $8 '
-W #-/# 4# CD 0-1 CD V
4% ! EEI. OPEEI. - 6 6 Y L+* " - 5 3
EE( A# 4 ; ] $5 - ! $8 EE( A#'
N $ " -5 3 8 Y5 ! ! EEI. " 6 Y %'
N $ " - ! $8 85 ! ! EEI. " 6 Y %
! EEI. O 6 Y " '
6W #-/# 4# 0-1 EV
EE AC) ! $ " -' W EE(/. 5 ! -
6 $ " - ! $8 4 -5 3 'N $ 4 - EE(/. 3
% -% $ " -5 3 'N EE(/. _ ! ) 8 $ " - ! $8 '
EEC0N 1 REGISTER ( ADDRESS 18Ch )
R/W-x U-0 U -0 U -0 R/W-x R / W- 0 R / S -0 R/S-0
EEPGD WRERR WREN WR RD
bit 7 bitO
W ? 33 40P -5 3 R ! $8 EE( A#
)b $ " - ! $8
,b $ " -5 3
V g,h (A 7 " ! " $ ! !! !5 @ $ '
W *+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
)b ! ! - '
,b ! 3 '
W L : 31P % -% ! EE( A#
)b % -% ! '
,b ! ! '
W ) : P !
)b W 1 "! 'W : - _ !% - ! @ ! !'
,b D - $8 ! EE( A# 3 '
W , 0'
)b 1 " EE( A#' W 0 - _ !% - !' W 0 Y -
$ !% '
,b ! ! " EE( A#'
- 7 . J ! ! 4 - - ' - " !
- Y _ !% ' - " - _ !% - ! ! " -
! ! !'
N J EC 3 % -% ! 4 ! - 'N
J EC 6 - ' W J EC
!! 4 - 6 ! 1 4 J.& & < $ ! D - $8
! 8 !' N $ 8 ! " 8 ! 5 ! - $ J E
- ! '. 3 6 Y $ ! - ! EE.I&I EEI. ! 6 " '
W ! 1 EE S $ ! ! ( L D - $8 ! % - ! 1
" _ !% '
& ! EE ACL ! ! F' N EE ACL 3 - ! - $6 g,h' EE ACL
5 !$ ! !! 5 3 EE( A#'
,W (F, 829 : $%& "21 6(% /# ! D V
V 5 3 ) - 8 ! 5 !% ! 6 Y ! EEI. 7 -
EE(/. HEE AC)c?dK - . HEE AC)c)dK' . 3 3
$ ! ! EE.I&I 8 ' EE.I&I 3 $ 3 ! - $6 "
4 6 " ! 5 !'
- - -5 3 EE( A#P
/ 6 Y EEI. 6 Y ! - 5 ! ! -'
X - EE(/. Y - ! -5 3 EE( A#
. 1 ! '
V 5 3 ! EE( A#'
TF 5 L<MP 5 3 EE( A#
W S &I&: 7 () i
W S &I&: 7 (, i L
#ATS .I&IlEElI.. 7 J i5 $"
-- 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
#ATJS EEI. i 55$ $ 5

W S &I&: 7 (, i M
W S EE AC)7 EE(/. i % 5
i $"
W S EE AC)7 . i EE $ 5
W S &I&: 7 (, i L
#ATS EE.I&I7 J i ]bEE.I&I
8W # 829 : $%& 0-1( 6(% /# ! D V

V ! 5 3 EE( A# 8 ! 5 !% ! 6 Y ! EEI. 5 3
! EE.I&I' -% ! $8 Y 6 1 !
@ " '
^ - $8 ! 3 ! ! - ! ! F - H!
++ EE ACL7 ! II EE ACL7 - J K @ " '( -
" ! 1 D - $8 ! "'
C!
$ 7 J EC $ ! ! EE ACL % % -% ! ' "
! = 4 - !! ! @ EE( A# D - 3 ' C!
5 ! ! 3 J EC $ ! - $7 ! $ % %5 3 -5 3
EE( A#' W J EC ! - _ !% - !'
$8 ! 3 ! 8 - J EC 3 ! !
8! "' W J 3 6 4 ! ) $ J EC '
N 8! 7 J - % - ! - ! 1 !
D - $8 ! EE S ' C! 5 ! - % -% ! 1 4 $ " D -
$8 ! - ' W EE S % - _ !% '
- - ! -5 3 EE( A#P
- C - - ), ! 8 $ J - $ !
$8 ! " !'
- ! / 6 Y EEI. 6 Y ! - 5 ! ! -'
- . / 5 3 ; ! EE.I&I'
- / X - EE(/. -5 3 EE( A#'
- 0 J EC % -% !! '
- 1 ! 1 H 3 % -% ! 1 $ - -K'
- 2 & + 4 P
/ ++O ! EE ACL L - P - -
! J7 - -L ! EE ACL'
/ IIO ! EE ACL L - P - -
! J7 - -L ! EE ACL'
J '
- 3 % -% ! 1 $ - 5 ! ! 1'
-. 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
- 4 X - J EC ! % -% !! '
- 5 N 8! 7 J - - ! 1 EE S ' HEE S
% - K' C - ) ! 8% 3 $ EE S 7 4 J
- 7 - 6 "! '
BSF STATUS , RP1

BSF STATUS,RPO
BTFSC EECON1 , WR ; Wait for write
GOTO $ -1 ;to complete
BCF STATUS , RPO / Bank 2
MOVF _
DATA EE_ADDR , W ;Data Memory
MOVWF EEADR / Address to write
MOVF _ _
DATA EE DATA , W / Data Memory Value
MOVWF EEDATA / to write
BSF STATUS , RPO / Bank 3
BCF EECON1 , EEPGD / Point to DATA
/ memory
BSF EECON1 , WREN / Enable writes
BCF INTCON , GIE / Disable INTs.

MOVLW 55h
g
-o MOVWF EECON2 / Write 55h
| § MOVLW AAh
u S MOVWF
’
EECON2 / Write AAh
cr ts>
BSF EECON1 , WR / Set WR bit to
/ begin write
BSF INTCON , GIE / Enable INTs.
BCF EECON1 , WREN / Disable writes
$W (F, 829 : $%& "21 6(% /# ! ,#2 /4 "57/# :-G#V

V 5 3 -5 3 8% % 6 YL " ! EEI.
EEI. O7 HEE AC)c?dK - . HEE AC)c,dK' # @
8 - ! $8 S 35 ! 8 %
5 3 'V " jW S EE AC)7 .k 6 D '
. 3 3 - $ ! ! EE.I&I EE.I&O 8 %7 8 " -
L " ! " % 'O ! EE.I&I EE.I&O 3 5 3
% 4 5 ! ! 5 !'
TF 5 L<BP - ! $8 S
W S &I&: 7 () i
W S &I&: 7 (, i L
#ATQJ # l( A/lEElI.. i
#ATJS EEI. O i # " 9 ($ !$ I55$ $ 5
#ATQJ Q l( A/lEElI.. i
#ATJS EEI. iQ " 9 ($ !$ I55$ $ 5
W S &I&: 7 (, i M
W S EE AC)7 EE(/. i % ( A/ I# $"
- 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
W S EE AC)7 . i EE 5
i
CA(
CA( iI " $ $ $ ! $ 5 %$ !$
i# $" $ 5 5 " 9 $ W S EE AC)7 .
i
W S &I&: 7 (, i L
#ATS EE.I&I7 J i Jb Q " 9 %$ !$ EE.I&I
#ATJS .I&IQ i
#ATJ EE.I&O7 J i Jb # " 9 %$ !$ EE.I&I
#AJS .I&IO i
\W # 829 : $%& 0-1( 6(% /# ! ,#2 /4 "57/# :-G#V

W - ! $8 S Y % -% ! - ! - !! 7
- 6 - J &)PJ &, 6 8 6' W - ! $8 S %
! @ ) ! - B ] $5' # ! B ] $5 - 6 Y 5 ! 6 Y
% 6 Y 7 - EEI. c)P,d b ,,' ! - -7 - !
- ! $8 - !! - '
5 3V ! - ! $8 8 $ - % %5 3 - !
8 ' V " Y 6 Y ! EEI.
EEI. O $ - - - ! 5 3 EE.I&I EE.I&O' 6 Y 5 3
% 8 $8 ! - P
EE(/. H EE AC)c?dK'
/ ++O7 - IIO ! EE ACL'
J HEE AC)c)dK'
& ! (OIm ! - !5 3 'C Y )7 L 4 M ] $5 ! 3
! " - ] $5 $ ! - 8 % 5 ! - - ! 3
! " 5 3 $ $ ! ! EE.I&I EE.I&O' & % 5 3
- ! ! ! ! " B ] $5'
V " 5 3 - ! - ! $8 8 ! EEI.
EEI. O $ 6 $F ! $ ! B ] $5 HEEI. c)P,d b ))K' -%
- - - P
EE(/. H EE AC)c?dK'
/ ++ 7 - II EE ACL'
J HEE AC)c)dK'
C! 5 !% - ! - $8 ! D - $8 ! @ ] $5
$ ! - ! $8 7 ! ! ] $5 H,,7,)7),7))K' N ! ] $5 !
HEEI. c)P,d b ))K 8 5 3 B ] $5 3 ! 6 - 5 ! ! 3
! - ! $8 '
- 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
j k 8 F 8 %
! - R! ' C! 5 !% 4 CA( J 'N 5 3 !!
- ! 8 D - $8 ! M ] $5 ! " % - 'W F 3
! ! - ! $ ! !B 7 Y "$ $ ! 8 - 'V " !%
QEE( 3 ! ! ! 6 ! @ % !' 8! 7
F 3 % ! ! " - M _ ! EE AC)' C $8
8 - - 8 ! 3 6 "'
7 5 0 7 0
EEDATH EEDATA Four words of
Flash are erased,
then all buffers
are transferred
to Flash
automatically
First word of block
to be written
1 after this word
is written
EEADR<1:0> = oo EEADR<1:0> = oi EEADR<1:0> = 10 EEADR<1:0> = n
Buffer Register Buffer Register Buffer Register Buffer Register
i i i i
Program Memory
7/# ES W # 829 : $%& *#(+ 0-1( 6(% /# ! ,#2 /4 "57/# \:-G#W

TF 5 L<+ 3 $8 " $8 ! 5 3 B ] $5 -' V6 Y 1 %
4% ! EEI. OPEEI. 7 B ] $5 5 3 %5 ! $ " 6 Y! - %'
This write routine assumes the following :
1. A valid starting address (the least significant bits = '00')is loaded in ADDRH : ADDRL
2. The 8 bytes of data are loaded, starting at the address in DATADDR
3. ADDRH , ADDRL and DATADDR are all located in shared data memory 0x70 - 0x7f
BSF STATUS ,RP1

BCF STATUS ,RP0 Bank 2
MOVF ADDRH , W Load initial address
MOVWF EEADRH
MOVF ADDRL,W
MOVWF EEADR
MOVF DATAADDR , W Load initial data address
MOVWF FSR
LOOP MOVF INDF ,W Load first data byte into lower
MOVWF EEDATA
INCF FSR ,F Next byte
MOVF INDF , W Load second data byte into upper
MOVWF EEDATH
INCF FSR ,F
BSF STATUS ,RP0 Bank 3
BSF EECON1,EEPGD Point to program memory
BSF EECONI, WREN Enable writes
BCF INTCON ,GIE Disable interrupts (if using)
. 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
MOVLW 55h Start of required write sequence:

MOVWF EECON2 Write 55h
MOVLW AAh
o MOVWF EECON2 Write AAh
£
u 7>
BSF
NOP
EECON1,WR Set WR bit to begin write
Any instructions here are ignored as processor
halts to begin write sequence
NOP processor will stop here and wait for write complete
after write processor continues with 3 rd instruction
BCF EECON1 ,WREN Disable writes
BSF INTCON ,GIE Enable interrupts (if using)
BCF STATUS ,RP0 Bank 2
INCF EEADR , F Increment address
MOVF EEADR , W Check if lower two bits of address are '00'
ANDLW 0x03 Indicates when four words have been programmed
XORLW 0x03
BTFSC STATUS ,Z Exit if more than four words .
GOTO LOOP Continue if less than four words
4W H-<( 0$% ,#(+/4 4# /#-)IV

- 3 ! $ ! % ! ! 5 3 - EE( A# 4 -
! $8 S 'V !! 8 - e - '
N ! 8 J EC 6 - '. - 6 ! ?L 3 ! = 4
! 5 3 EE( A#'
&$8 !! J EC ! @ $ ! ! @ $ ! !
! ! 6 -% 5 D - !7 ! ! % @ 4 % '
#W (-F" '(%/4 "5(/4 :&!, 6-<( 0$% ,#(+/4 4# V
N -5 3 EE( A# - 3 8 - ! EE( A#
- 8 !' & " - $ " ! - EE( A# 8 !
% -%'
N - ! $8 EE( A# - 3 7 - ! -
! $8 - 8 ! 3 ! - '& " - $ "
! - EE( A# 8 ! % -%'
Value on Value on
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 BitO Power-on all other
Reset Resets
lOCh EEDATA EEPROM/Flash Data Register Low Byte xxxx xxxx uuuu uuuu
lODh EEADR EEPROM/Flash Address Register Low Byte xxxx xxxx uuuu uuuu
lOEh EEDATH EEPROM/ Flash Data Register High Byte xxxx xxxx --0 qOOO
lOFh EEADRH EEPROM/Flash Address Register High Byte xxxx xxxx
18Ch
18Dh
EECON1 EEPGD
EECON2 EEPROM Control Register 2 ( not a physical register)
WRERR WREN WR RD x
— x000 --0 qOOO
ODh PIR2 CMIF
EEIF BCLIF CCP2IF - o - o o - - o - o - o o -- o
8Dh PIE 2 EEIE
CMIE BCLIE CCP2IE - o - o o - - o - o - o o -- o
Legend: = =
x unknown: u unchanged, - = unimplemented , read as ‘ o ', q = value depends upon condition
Shaded cells are not used by data EEPROM or Flash program memory.
H-</4 ES W -!, "#-/# 4# G2< 8&F/4 ,#( 6(% /# ! D W
T0 # $ % &R
. 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
-W D 0-1 "#-/# 4# D V
(A &I % $ Y -* 7 ! 6 - !5 3 ! - ! & I' N
& I _ ! ) 8 (A &I % $ % & I _ ! , 8 (A &I % $ 5 3 '
V ! (A &I ! $ - - 7 ! ! !
85 3 3
% $'& !! ! M! P 0 Y 0! '. -! 5 3
)( $ ! 5 3 % $ $ Y ! ! 5 3
5 3 '
IB % - ! 3 ! 5 & $, - IBR&, N 0
- 8 $ !! $ - ! '& - (A &I &&Q
- ! 3 5 3 8 #A '
C 3 ! - (A &I % - - ! 3 ! ! 3 !
T ES - " IR. - - 'O ! @ _ !
- -R % - % % $ ! ! I. AC) R 4 ! # AC'
& ! & I - ! - ( $ ! " - ! 5 !
! 3 ! ' C! 5 !% $ _ ! - ! & I 5 " $8 -
) 5 ! - ! ! 3 ! '
Data Data Latch
Bus
D Q
VDD
WR
PORTA ~
f CK
^- Q #
P I/O pint1)
TRIS Latch *
D Q
WR
TRISA
f CK Q
Analog
Input
Mode
11
RD
TRISA
TTL
Input
Buffer
Q D
EN
RD PORTA
+
To A D Converter or Comparator
'
Note 1: I/O pins have protection diodes to VDD and Vss.
. 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
7/# ES[W '() I-F,# ,#-./ D UVD KW

CMCON<2:0> = xoi or oil
C l OUT
Data Latch
Data Bus D Q
I/O pin 1)
WR PORTA iCK^- Q 0
N *
/
TRIS Latch Vss
< D Q
WR TRISA Schmitt
iCK^ - Q Trigger
Input
Buffer
RD TRISA
< Q D
EN
ii
RD PORTA
TMRO Clock Input
Note 1: I/O pin has protection diodes to Vss only.
7/# ES KW '() I-F,# ,#-./ D YO K W

CMCON<2:0> = on or 101
C 20UT
Data Latch
Data Bus VDD
D Q
WR PORTA P
iCK^- Q 0
TRIS Latch
/ <*
D Q
N
Analog
I/O pin ^
h
lip Mode
WR TRISA
WcK^- Q VSS TTL
Input
Buffer
RD TRISA
Q D
EN
RD PORTA
A/ D Converter or SS Input
>°
7/# ES W '() I-F,# ,#-./ D ZW
^ H _ à b
I,RIC, W , &&Q RA
I)RIC) W ) &&Q RA
. 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
ILRICLRT ES<R T ES W L &&Q RA 4 T ES< 4 T ES
IMRICMRT ESa W M &&Q RA 4 T ESa
IBR&A N R )A:& W B &&Q RA 4 ! 3 !

& $, 4 ! 3$
-
I+RICBR R LA:& W + &&Q RA 4 ! 3 !
H-</4 ES[W -!, ,#2!, /-3/4 ,&<- D W

Value on
Value on :
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 BitO all other
POR , BOR
Resets
05h PORTA RA5 RA4 RA 3 RA2 RAI RAO - - Ox 0000 - -Ou 0000
85h TRISA PORTA Data Direction Register - - 11 1111 - -i i m i
9Ch CMCON C20UT C l OUT C 2INV C 1INV CIS CM2 CM1 CMO oooo 0111 oooo 0111
9Dh CVRCON CVREN CVROE CVRR CVR 3 CVR2 CVRI CVRO ooo - oooo ooo - oooo
9Fh ADC0N1 ADFM ADCS 2 PCFG3 PCFG2 PCFG1 PCFGO oo - - oooo oo - - oooo
H-</4 ES KW (!I "-J" ,-!, "#-/# 4# : $./ *$+" 0 ! D W

6W D H 0-1 "#-/# 4# D HV
(A &W % $ ; ' & ! 6 - ! & W' N & W b ) 8
(A &W % $ %7 & W b , 8 (A &W % $ '
W (A &W % - ! 3$ $ ! - = ! % $8
-% %P WMR(/#7 W*R(/ W?R(/.'
# @ (A &W - $ - 'W HA(& ACl E/c?dK b , 8
- - $ - 'N (A &W % - ! 3$ 8 3 ! 1
- = ! $ - 3 ! ! (: 6 $ - - % '
W (A &W WBP W? - $ - ! 1 " ' Y - 3 ! %
8 ! 3 8 - - - = ! ! 1' - ! 3 H W?P WBK - -
! - $6 3 3 $ ! $ - (A &W' - ! 3 $ ! $ ! -
WBP W? A - ! 1 (A &W - - ! 1 W S H C& ACc,dK'
C! 1 " - F $ $ ! - ! - !
QEE(' &$ ! ! $8 % ! 1 8 ! 5 ! - - ! 1 _ ! - - P
W " "! (A &W 3 - ! F - !'
X - W S'
V ! ! F 3 % - ! 1 W S _ ! )' N (A &W 3
5 - ! ! F % -% - - ! 1 W S'
. 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
VDD
RBPU(2)
-I Weak
P Pull-up
Data Latch
Data Bus
D Q •HXI
I/ O pin(1)
WR Port
TRIS Latch
D Q ~
TL
WR TRIS Input
Buffer
\Y/
RD TRIS
Q D
RD Port
EN
RBO/INT
RB3/PGM
Schmitt Trigger RD Port

Buffer
7/# ES EW '() I-F,# ,-!, ,#-./ DHUVDHKW

Vcc
RBPU (2 >
Weak
Pull- up
Data Latch
Data Bus
D Q
I/O pin <1 J
WR Port CK
“
^_
TRIS Latch
D Q
WR TRIS
input W
Buffer Y STY
Buffer
RD TRIS
Latch
Q D
RD Port
EN Q1
Set RBIF
Q D
From other RD Port
RB7:RB4 pins EN
— Q3
RB7:RB 6
In Serial Programming Mode
., 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
7/# ES UW '() I-F,# ,-!, ,#-./ DH VDHYW

$ - ! 1 " 5 ! - ! Y - % F - !
(A &W Y 5 ! $ - " ! 1'
$ - ! 1 ! ! F % - B - 8 $ - _ !%
5 @5 ! % -% ! % - % F '
& W n N - = !
W,R C& W , &&QR & RA 4 ! 3 ! 1' - % $8 $ - '
W) W ) &&Q RA' - % $8 $ - '
WL W L &&Q RA' - % $8 $ - '
WMR(/# W M &&Q RA 4 % $8 QT('
- % $8 $ - '
WB W B &&Q RA H ! 1 - " K' - % $8 $ - '
W+ W + &&Q RA H ! 1 - " K' - % $8 $ - '
W*R(/ W + &&QR & RA H ! 1 - " K 4 ! 3$ '
- % $8 $ - 'X ! % $8 %'
W?R(/. W + &&QR & RA H ! 1 - " K 4 ! 3$ '
- % $8 $ - '. 3 % $8 %'
H-</4 ES W -!, ,#2!, /-3/4 ,&<- D HW
Value on
Value on:
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 all other
POR , BOR
Resets
06h, 106h PORTB RB7 RB 6 RB 5 RB 4 RB 3 RB2 RB1 RBO xxxx xxxx uuuu uuuu
86h, 186h TRISB PORTB Data Direction Register mi mi ini nil
81h, 181h OPTION REG RBPU INTEDG TOCS TOSE PSA PS2 PS 1 PSO mi nil nil nil
H-</4 ES EW -!, "#-/# 4# *$+" /(+ 0 ! D HW

,W D 0-1 "#-/# 4# D V
(A & % $ ; '& ! 6 - ! & 'N & b) 8 (A &
% $ %7 & b, 8 (A & % $ '
(A % - - = ! ! ' - (A & -
&$ !! $ ! 3 '
L
N % -% 8 - (A & cBPMd - 6 8 - -
L
4 - #W: _ ! - 5 ! NE H ( &I&c*dK'
N % -% - - = ! ! T7 "- - & @ (A & '
# 6 ! ! & ) ! 3$ 7 $ ! - -
6 ! - ! & W ) ! 3 'N !
& 8 ! ! - 6 3 % -%7 - 0 Y 0 ! HW S7
.- 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
W S7 XA JSK - & F % $ - 5 !' C! 5 ! - % 6

! ! - ! % - ! & '
Port/Peripheral Select 2
**
Peripheral Data Out
Data Bus
D Q
i VDD
P
WR Port CK \_ Q
Data Latch
I/ O
D Q ind
pin
)
n
WR TRIS CfO_Q
TRIS Latch
Vss
<
RD TRIS
Peripheral
Schmitt
Trigger V
OE<3 > Q D 4
EN
RD Port
Peripheral Input
M>°
7/# ES YW '() I-F,# ,-!, ,#-./ D VDHZ 0-1 D EVDHKW
Port/ Peripheral Select< 2)
Peripheral Data Out

0
VDD
Data Bus
4- D Q
WR Port
CKVQ
Data Latch
I/ O
D Q pint1)
WR TRIS
fcK _ \ Q
TRIS Latch \
Vss
«
RD TRIS
Schmitt
Peripheral
OE<3> Q D
Trigger
Schmitt
v
Trigger
EN with
RD Port
SSP Input M> id SMBus
—l Levels
CKE
SSPSTAT<6> >
.. 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
7/# ES ZW '() I-F,# ,-!, ,#-./ D YVDHUW
Value on
Value on:
POR , BOR
Resets
07h PORTC RC7 RC6 RC 5 RC4 RC3 RC 2 RC1 RCO xxxx xxxx uuuu uuuu
87h TRISC PORTC Data Direction Register mi ini mi nil
Legend: x = unknown u = unchanged
,
H-</4 ES UW -!, "#-/# 4# *$+" /(+ 0 ! D HW

&EoC W &n N Ep: Ors CItC/
VEq#
,R&)A AR&) N W , & RA 4 ! 3 $ 5 !
& $)R ! 3 ! & $)'
)R&)A R (L W ) & RA 4 ! 3 5 !
& $)R ! 3 % $ 7 ! 3 $
% $ LR ! 3 $ (J#'
LR () W L & RA ! 3 4
% $ )R ! 3 $
% $ )R ! 3 $ (J#'
MR NR Q W M & M 3 ! - !
L
% ! ( '
BR . R .I W B & B 3 ! - 5 3 ( 4
L
5 3 R %H K'
+R .A W + & RA 4 ! 3$ 5 3 % $ %
! '
*R&XR N W * & RA 4 $ " ! : I &
4 ! ! '
?R XR.& W ? & RA 4 ! : I &
4 5 3 ! '
H-</4 ES YW -!, ,#2!, /-3/4 ,&<- D W
8W D C 0-1 "#-/# 4# D CV
(A &. % $ ; - ! 3 - &$ !! $' # @ - 8
% ! 3 4 ! 3$ '
(A &. - 6 8 % $ "- ; _ ! - %
( (#A.E H& EcBdK' &$ ! 5 " 8 - ! 3 5 ! &&Q'
P (A &. & . ! "5 ! %( L; '
. 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
Data Data Latch

Bus
D Q
WR
Ur
I/O pin D
Port
TRIS Latch
< D Q
WR
v
TRIS Schmitt
Trigger
Input
Buffer
11
RD
TRIS
Q D
EN
RD Port
H>
7/# ES W '() I-F,# ,-!, ,#-./ D CW
Value on
Value on:
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 all other
FOR , BOR
Resets
08h PORTD RD7 RD6 RD 5 RD4 RD3 RD2 RD1 RDO xxxx xxxx uuuu uuuu
88h TRISD PORTD Data Direction Register 1111 1111 mi mi
89h TRISE IBF OBF IBOV PSPMODE PORTE Data Direction Bits 0 0 0 0 - i l l 0000 - 111
H-</4 ES ZW -!, "#-/# 4# *$+" /(+ 0 ! D CW

&EoC W &n N Ep: VEq# Ors CItC/
.,R( (, W , &R&&Q ( $ RA 4 , % $ - ! !
.)R( () W ) &R&&Q ( $ RA 4 ) % $ - ! !
.LR( (L W L &R&&Q ( $ RA 4 L % $ - ! !
.MR( (M W M &R&&Q ( $ RA 4 M % $ - ! !
.BR( (B W B &R&&Q ( $ RA 4 B % $ - ! !
.+R( (+ W + &R&&Q ( $ RA 4 + % $ - ! !
.*R( (* W * &R&&Q ( $ RA 4 * % $ - ! !
.?R( (? W ? &R&&Q ( $ RA 4 ? % $ - ! !
H-</4 ES W -!, ,#2!, /-3/4 ,&<- D CW
$W D 0-1 "#-/# 4# D V
(A &E -M P E,R RIC+7 E)R RIC* ELR RIC? - 8 %
% ! 3 4 ! 3$ 'C 3 ! " - &$ !! $ ! 3 '
(A &E $ - ! 3 R % F ( (#A.E
H& EcBdK _ ! )' &$ ! " ! 5 !% 1 1 $ _ ! - & Ec,PLd %
_ ! )) 1 1 $ _ ! - - % - ! 3 ' 3 ! $ _ !
. 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
I. AC) 8 3 ! ! 3 R % ' &$ ! "7 ! 3 5 !

&&Q'
- (A &E 3 ! % - - ! 3 ! 'N ! 3
! 8 - " 3 - ! - $6 g,h'
& E 6 - ! - E7 ! " - ! 5 ! 3 ! ! 3
! ' C! 5 ! % 1 1 - 6 8 3 ! ! 3 5 !
- ! 3 ! ! 3 ! '
Value on
Value on :
POR , BOR
Resets
09h PORTE RE2 RE I REO - XXX -uuu
89h TRISE IBF OBF IBOV PSPMODE PORTE Data Direction bits oooo - in oooo - in
9Fh ADCON1 ADFM ADCS2 PCFG3 PCFG2 PCFG1 PCFGO oo - - oooo oo - - oooo
H-</4 ES W -!, "#-/# 4# *$+" /(+ 0 ! D W

Data Data Latch
Bus
WR
D Q
[>
I/O pin(1>
Port
TRIS Latch
D Q 4
'
WR
TRIS
v
Schmitt
Trigger
Input
Buffer
RD
TRIS
Q D
EN
RD Port
4
7/# ES W '() I-F,# ,-!, ,#-./ D W

&EoC W &n N Ep: VEq# Ors CItC/
E,R RIC+ W , &R&&Q RA 4 ! 3 $ !
% $ - ! ! 4 ! 3
! P
)b 8 !
,b '
E)R RIC* W ) &R&&Q RA 4 ! 3 ! $ !
% $ - ! ! 4 ! 3
! P
)b 8 !'
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
,b ! '
ELR RIC? W L &R&&Q RA 4 ! 3
% $ ! % $ - ! ! 4
! 3 ! P
)b TVN ! '
,b TVN '
H-</4 ES W -!, ,#2!, /-3/4 ,&<- D W
TRISE REGISTER ( ADDRESS 89h )

R-0 R -0 R /W-0 R /W-0 U -0 R /W- 1 RA/V-1 R/W-1
IBF OBF I BOV PSPMODE Bit 2 Bit 1 BitO
bit 7 bitO
&$ ! - % $ - ! !R - P
W ? 67P - $ ! - ! 3 "H % W 99 $ S KP
)b ] $5 3 ! (: '
,b ! - ] $5 '
W * 67P - $ ! - ! 3$ " HA % W 99 $ S KP
)b ! 3$ @ ! 3 ] $5 3! $ - -'
,b ! 3$ 3 '
W + 6 ;P % - $ ! 3 H % W 99 $ A $9 ] . KP
)b D - $8 ! " ] $5 ! 3 $ - - '
,b ! "$ $ '
W B + * 03P W % $ - ! !
)b (A &. 6 % $ - ! !'
,b (A &. 6 % $ %'
W M 5 !P g,h
- (A &E - 5 3 $ %P
W L W LP - ! ELR RIC?
)b ! 3 '
,b ! 3 $ '
W ) W )P - ! E)R RIC*
)b ! 3 '
,b ! 3 $ '
W , W ,P - ! E,R RIC+
)b ! 3 '
,b ! 3 $ '
U0 '( )R
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
W $R $ 5 & $ - 3 ! 4 P
Q $R $; '
- ! '
- $ - ; - % $8 _ !% '
% -% ! ! $ ! 4 ! '
( - ! 1 6 $ SSO ,,O'
% -% - ! ! ! '
$, $ - - J.& 8 L<);P
CLKO (= FOSC/4 )
Data Bus
RA4/T0CKI
pin
0
1
M
U
X
1
0
M
U
Sync
2
i
TMRO Reg
8
X Cycles
TOSE
TOCS
PSA
t Set Flag bit TMROIF
on Overflow
PRESCALER
r n
0
M 8-bit Prescaler
U
1 X
Watchdog 8 //
Timer
8-to-1 MUX PS2:PS0
PSA L_ J
WDT Enable bit 0
WDT
Time-out
7/# ES W '() *#(+ ,&<- " I$5K 0-1 6(% ,# - "52 !, 0 ! QC W

6 - &A HA(& ACl E/c+dK' &$ ! 6
& $ 8& $, 3 = ! ! - $6 @ 8 H ! - K' C ! &# ,
6 ! ! - $6 - 8 D - $8 = ! 3 6 $ !L 8 ' C! 5 ! - $
! - $6 " _ ! - ! ! - $6 - Y ! &# ,'
C &A HA(& ACl E/c+dK _ ! ) 8 $' &$ !
$ 8& $, 3 = ! ! - $6 @ - ! - ! 4 !
IBR&A N ' - ! ! &, E HA(& ACl E/cBdKP &, E b ,
8 7 ! 8 !'
W $ - ! R! - D - & $, J 5 !& $'
-W 4-J" ,&<- I$5KV
C! 1 &# , F ! &# , $ ,, SS ' N $ "$ 3
&# , S H C& ACcLdK - )' C! 1 - H K _ ! - - &# , E
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
H C& ACc+dK' W &# , S % - _ !% ! $8 % ! 1

& $, $ - % -% ! 1 $ ' C! 1 &# , ! F F -
QEE( 8 6 3 ! ! "- QEE('
6W I$5K 0 ! /4&()/ L&/4 '$+I "21 6$./ /4(-1 V
N ! 5 ! $ - 8 ! 3 ! ! ! ! ! 3$
$ - ' ! - &A N - - ! $ ! _ ! - " @
! 3$ 3 ! 8 ^L ^B ! $ !' . -7 -$
&, N $ ! - - F L &A $ ! - - %F L &A '
,W H(% ,# - "52 !,V
Y - - - 5 !- -D - & $, J.&' N ! - $ -
& $, 8 3 ! - J 5 !& $ ! 'W $ - 8 !
4 ! ' - ( I ( LP( , HA(& ACl E/cMP,dK - 6 ! - Y
'
N ! - & $, 8 - ! ! &# , H F 5 Q S )7
#ATJS )7 W S )7 uK 3 - $ - '
N ! - J.& 8 Q J.& 3 - $ - ! - J 5 !& $'
W $ - 3 ! ! 4 ! '
OPTION_REG REGISTER
R/ W-1 R/W-1 R / W- 1 R/W-1 R/W-1 R / W- 1 R/W-1 R/W-1
RBPU INTEDG TOCS TOSE PSA PS2 PS 1 PSO
bit 7 bitO
W ?
W * 12304
W + 2 +P ! ! &# , H&# , $ K
)b ! &, N '
,b ! $ !'
W B 2 +3P F &, E H&# , $ E5! K
)b F ! &, N '
,b F &, N '
W M +5P ! - $ -
)b ! - J.&'
,b ! - & $,'
W L<, + ' + P - Y $ -
W &Y &# , &Y J.&

,,, )PL )P)
,,) )PB )PL
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
,), )P; )PB

,)) )P)* )P;
),, )PML )P)*
),) )P*B )PML
)), )P)L; )P*B
))) )PL+* )P)L;
H-</4 ES [W -!, 6 " :2F- ,#(F/ "@ :$% 6(% ,# - "52 !,W
0 '( R
& $) 6 R )* ! L ! ; H&# )O &# )QK 0 -
! 'O ! " = ! ,,,, SSSS D " $ ,,,, ' C! 1 & $)
% -% 3 % - ! 1 $ ! 1 ! 1 &# ) S H( )c,dK' C! 1
" - % -%R &# E H( E)c)dK - ! - $6 )R, ! - !'
& $) - ! ) $ !L &# ) H&) ACc)dKP
v W 6 0 $'
v W 0 $'
&$ ! 6 $7 & $) = ! ! - $6 @ 8 ' &$ ! 8
= ! ! - $6 @ - ! ! 3 ! '
& $) - % -%R &# )AC 0 _ !) 8 7 _ !, 8 '
& $) 3 ! - ! 3 $ ' C! 3 $ - $ L ('
T1C 0N: TIMER 1 CONTROL REGISTER ( ADDRESS 10h )
U-0 U-0 R /W-0 R/ W-0 R/W- 0 R / W- 0 R/W-0 R/W-0
T1CKPS1 T1CKPS0 T10SCEN T1SYNC TMR1CS TMR10N
bit 7 bitO
W ?<* 5 ! 3 - ! - $6 g,h'
W +
)b ! ! ! 3 ! '
,b ! ! 3 ! '
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
N 2* +>
W " 6 D '& $) 5 ! ! $ ! 2* +>
W ) 2* +P ! ! $)
)b ! ! ! ,R&)A AR&) N H K'
,b ! ! $ ! HSA RBK'
W , 2* 1P & $)
)b % -% & $) '
,b & $) ! ! '
-W (-F" '(%/4 ,&<- I$5 < ,#$+ '(% '?/# "# 1 V
C &# ) H&) ACc)dK _ ! , 8& $) 3 6
! ! _ ! SA RB' W ! H&) ACcLdK ! 6
!5 ! $ ! ! '
6W (-F" '(%/4 ,&<- I$5 < ,#$+ '(% (&/"$5V
& $) - ! ! 4 ! " &# ) '
& $) = ! ) - ! ! ' & $) % -% 1
! $ 8 $% ) ! ! $ - - !
8 L<)>'
T1CKI
(Default High)
T1CKI
(Default Low )
7/# ES [W -</ '() "# 1 4 -/ L&/4 '$+I ,&<- (&/"$5 W

,W (-F" '(%/4 ,&<- I$5 < ,#$+ '(% (&/"$5 '()/4 6(%V
N &# ) _ !) 8& $) ! $ 3 = ! ! - $6 P
- ! ! 3 )R&)A R (L &)A EC _ ! )'
- ! ! 3 ,R&)A AR&) N &)A EC _ ! ,'
C 6 - 8 ! 3 ! ! ! - !
$ !' ! ! $ - '& ! $ - ! '
wm 8 "7 $ ! QEE(7 & $) 3 ! = ! ! - $6 - !
! 5 ! ! ! !' & " @ % = !'
, 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
Set Flag bit

TMR IIF on
Overflow Synchronized
* TMR 1 0 «*-
Clock Input
TMR1H TMR1L
1
TMR10N
On/Off >
T1SYNC
TIOSC
RCO/T10SO/T1CKI
Synchronize
Prescaler
T10SCEN FOSC/4 1, 2, 4, 8 _f det
Enable Internal 0
RC1/T10SI/CCP2(2) S? Oscillator1' Clock 2
T1CKPS1:T1CKPSO
TMR1CS
^ Q Clock
7/# ESEKW '() *#(+ ,&<- I$5 W

8W (-F" '(%/4 ,&<- I$5 < ,#$+ '(% (&/"$5 6-+" '()/4 6(%V
C H&) ACcLdK _ !) 8 ! ! 3 ! ! ! 'W
% = ! ! - ! $ !' W 3 % $ !
QEE( - % - ! 1 $ ! F' & " 7 - % ! ! 4
$ !% 8 % R! 6 '
wm ! ! 8& $) ! 5 ! ! 1
6% 4 - ! - '
$W (F, 0-1 4# I$5 "5(/4 ,#$+ '(% '$+I *#(./4 '()/4 6(%V
V - ! &# )O 4 &# )Q $ ! $ ! ! ! !
! 8 ! - $6 - '
N ! 8 ! 5 ! ! ! $ $ - ! ! - $6 ! - ! '
C 5 !! $ - $ ! ! - $ ! - $6
!5 - - ! $'
\W H(% 8-( '(%/4 ,&<- I$5 V
# 5 ! F %
!! 3 - $
&)A H ! 3 K
&)A A H ! 3 $ - K' W 5 ! % -% ! _ ! -
&)A EC H&) ACcMdK - )' W 5 ! 5 ! ! %7 L,, O[' W
5 ! @ % " $ ! QEE(' W 5 !5 6 " 5 ! -
ML O[' W ! L<L, $8 " - 5 !& $)'
Osc Type Freq. C1 C2

LP 32 kHz 33 pF 33 pF
100 kHz 15 pF 15 pF
200 kHz 15 pF 15 pF
H-</4 ESEKW M2F- ,#(F/ "&F ,#( 6(% 8-( '(%/4W
4W D$G$" I$5 G2< 8&F/4 /4(9 5- 5 44$5V
- 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
C () (L 6 8 - $ j ! F
4 kH ()#MP ()#, b ),))K7 F " 3$ & $)'
- "-P j ! F 4 k () (L 3 ! ! 1
&# ) S H( )c,dK _ ! )'
& $) % 6 8 6 4 ! F
$ - "' C & $) ! ! ! 8 ! !
'
#W D$G$" ,->A "#-/# 4# D B D M ,&<- I$5 V
O ! &# )O &# )Q ! ,, $ - % ! (A H( ] $ A
K 4 8$ - 7 ! $ j ! F 4 k () (L'
& ! &) AC $ ,, ! 6 $ - % ! (A 4
W$ ] < 7$ " 3 1 $ $ - - ! - $6 )P)' wm - $ -
8 ! ! 6 !'
- ! & $) ! L<L)P
Value on
Value on :
POR , BOR
Resets
0Bh,8Bh: INTCON GIE PEIE TMROIE INTE RBIE TMROIF INTF RBIF 0000 OOOx oooo 00 Ou
lOBh, 18Bh
OCh PIR 1 PSPIF(1) ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMRIIF 0000 0000 0000 0000
8Ch PIE1 PSPIE <1> ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMRIIE o o o o o o o o o o o o o o o o
OEh TMR1L Holding Register for the Least Significant Byte of the 16-bit TMRI Register xxxx xxxx uuuu uuuu
OFh TMR1H Holding Register for the Most Significant Byte of the 16-bit TMR 1 Register xxxx xxxx uuuu uuuu
10h T1CON TICKPS1 T1CKPS0 T10SCEN TISYNC TMRICS TMRI ON - - 0 0 o o o o — uu uuuu
H-</4 ESE W -!, "#-/# 4# ,&<- I$5 W
0 '( /R
& $L $; - $ - -% $' & $L - 5 !
! - (J# ! (J# (' & ! &# L - !
- - 6$ '
C! 3 ! HSA RBK - " $ - P j)P)k7 j)PBk 4 j)P)*k
_ ! - &L N( )P&L N( , H&L ACc)P,dK'
& $L -) ! "; ( L' & $L = ! ! - $6 ,, _ !( L
-$ ,, 8 %' ( L ! - ! 'N ! 6$ 8
! ( ! - $6 SSO'
C! 3 $ &# L D % $B $ " ! 1 &# L $ !
&# L S H( )c)dK' - 1 & $L _ ! - - &# LAC H&L ACcLdK7
! ! '
. 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
Sets Flag + TMR9

bit TMR 2IF outputti >
Reset Prescaler
TMR2 Reg — Fcsc / 4
1 : 1 . 1 : 4, 1:16
Postscaler
5 s 2
Comparator
1:1 to 1:16 EG
.
4
2 T2 CKPS 1 :
T2 CKPS 0
/ PR 2 Reg
T20 UTPS 3 :
T2OUTPS0
7/# ESE W '() *#(+ ,&<- I$5EW

& ! $LP
T 2 CON: TIMER 2 CONTROL REGISTER ( ADDRESS 12 h )

U-0 R/W-0 R/W-0 R/ W-0 R/W-0 R/ W-0 R/W-0 R/W-0
TOUTPS3 TOUTPS2 TOUTPS 1 TOUTPSO TMR 20N T2CKPS1 T2CKPS0
bit 7 bitO
W ? 5 ! 3 - ! - $6 g,h'
W *<M 2 ?2 + '2 ?2 + ' - ! 3$ ( $ & $L
,,,,b)P) % $'
,,,)b)PL % $'
,,),b)PM % $'
'
'
))))b)P)* % $'
W L 2* 1P W % -%R & $L
)b % -% $L '
,b & $L ! ! '
W )<, 2 < + '2 < + P $ - ! ! $L
,,b )'
,)b B'
) b *'
-W H(% ,# - "52 !, 0-1 A(G"G,-:$5 ,&<- I$5EV
W $ - % $ 3 6 - "$ $ ! - '
v & ! 5 3 ! &# L'
v / ! &L AC'
v W 8 '
&# L ! 6 - ! 5 3 ! &L AC'
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
6W 4(9 5- ,&<- DEV

C! 3 $ &# L - (0 " - " $ ! 6%'
Value on
Value on:
POR , BOR
Resets
OBh, 8Bh, INTCON GIE PEIE TMROIE INTE RBIE TMROIF INTF RBIF oooo 00 Ox oooo 0 OOu
lOBh. 18Bh
OCh PIR1 PSPIFW ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF o o o o o o o o o o o o o o o o
8Ch PIE1 PSPIE 1) < ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE o o o o o o o o o o o o o o o o
1 1h TMR2 Timer2 Module 's Register oooo oooo oooo oooo
12h T2C0N T0UTPS3 T0UTPS2 T0UTPS1 TOUTPSO TMR20N T2CKPS1 T2CKPS0 - ooo oooo - ooo oooo
92h PR 2 Timer2 Period Register 1111 1111 mi mi
H-</4 ESEEW -!, "#-/# 4# ,&<- I$5EW

0 8 $ A ' B" " $ R
N " I. ; @ I. ), - % B, 'N I. - -
! 3 -% % - " - _ !% % T..7 T 7
IL 4 IM'
W " I. - $ - % - ! $ ! !
QEE(7 ! ! % I. " 5 ! $ ! I. '
N I. -B ! P
v I. E O HIR. O! ! $K
v I. E Q HIR. Q ] ! $K
v I. AC, HIR. $ ! $ ,K
v I. AC) HIR. $ ! $ )K
& ! I. AC, - - = ! ! I. $8 " 8
L<LL' & ! I. AC) % - = ! - % $ - ! 3 !
4 % A'
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
CHS2:CHS0
r LJ . L
o V^ X RE2 AN7< >
/ 1
110
\> 101 ^X RE1AN6<1>
RE0 AN5<1>
n \> 100
RA5/AN4
VAIN
(Input Voltage) \> on
RA3/AN3A/REF+
A/ D 010
Converter RA2 / AN2/VREF-
VDD \> 001

RA1/AN1
o\
000
VREF+ a RAO/ANO
( Reference o
Voltage)
PCFG3:PCFG0
O
VREF-
( Reference o
Voltage)
- 1
Vss
PCFG3:PCFG0
7/# ESEEW '() *#(+ ,&<- I$5EW

2 50 1
ADCONO REGISTER ( ADDRESS 1 Fh)
R / W- 0 R/W-0 R / W -0 R /W - 0 R / W- 0 R/W-0 U-0 R/W-0
ADCS 1 ADCSO CHS 2 CHS 1 CHSO GO/DONE ADON
bit 7 bitO
W ? 50 + '50 +' - ! " I.

ADC0N 1 ADCONO
Clock Conversion
<ADCS 2> < ADCS 1 : ADCS 0>
0 00 F0SC/2
0 01 FOSC/8
0 10 FOSC/32
o li FRC (clock derived from the internal A/ D RC oscillator)
1 00 Fosc /4
1 01 FOSC/16
1 10 FOSC/64
l li FRC (clock derived from the internal AD RC oscillator)
H-</4 ESEUW -!, 6 " :2F- ,#(F/ L&/4 ,#&N$=/ '(= C W

W +<M @+ ' @+ P - !
,,, b , HIC,K
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
,,) b ) HIC)K
,), b L HICLK
,)) b M HICMK
),, b B HICBK
),) b + HIC+K
)), b * HIC*K
))) b ? HIC?K
W L /AR P - $ ! - " I.
N I.AC b )P
)b " I. !5 @ $ H _ !) 1 D - $8 " 3 6
- , D - $8 " - K'
,b " I. !5 @ $ '
W ) 5 ! g,h
W , 50 1P ! I. !P
)b " I. ! '
,b " I. 6 1 ! ! ! '
2 50 1
ADC0N 1 REGISTER ( ADDRESS 9Fh )
R/ W-0 R/ W-0 U -0 U -0 R/ W-0 R / W- 0 R/W-0 R/W-0
ADFM ADCS2 PCFG3 PCFG2 PCFG1 PCFGO
bit 7 bitO
W ? 507*P 6 5 ! D I. P
)b % 7* # W I. E O - ! - $6 g,h'
,b $ -7* Q W I. E Q - ! - $6 g,h'
W * 50 + P ! " I. P
W +<BP 5 ! 3 - ! - $6 g,h
W M<,P 74 ' 74 P I.
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
PCFG
<3:0>
AN7 AN6 AN5 AN 4 AN3 AN2 AN1 ANO VREF+ VREF - C/ R
0000 A A A A A A A A VDD Vss 8/ 0

0001 A A A A VREF+ A A A AN3 Vss 7/ 1
0010 D D D A A A A A VDD Vss 5/ 0
0011 D D D A VREF+ A A A AN3 Vss 4/1
0100 D D D D A D A A VDD Vss 3/ 0
0101 D D D D VREF+ D A A AN3 Vss 2/ 1
Ollx D D D D D D D D 0/ 0
1000 A A A A VREF+ VREF- A A AN3 AN2 6/ 2
1001 D D A A A A A A VDD Vss 6/ 0
1010 D D A A VREF+ A A A AN3 Vss 5/ 1
1011 D D A A VREF+ VREF- A A AN3 AN2 4/ 2
1100 D D D A VREF+ VREF- A A AN3 AN2 3/ 2
1101 D D D D VREF+ VREF- A A AN3 AN2 2/ 2
1110 D D D D D D D A VDD Vss 1/ 0
1111 D D D D VREF+ VREF - D A AN3 AN2 1/2
A = Analog input D = Digital I/O
C /R = # of analog input channels/# of A / D voltage references
H-</4 ESEYW -!, 6 " ' $)& *# $=/ C W

- ! I. E OPI. E Q - D ), " 'N " I.
7 D % 4% ! D 7 /AR 6 - -
! 1 I. I. S )' I. $8 " $ ! 8 L<LL'
I. 3 6 8 " 7 8% $ -
1 D - $8 " ' - ! 3 ! % - - & ! - !
3 ! ! 3 '
- V " I. 8% - - P
- ! & % 8 I. P
v V6 8 - ! R -% R % HI. AC)K'
v ! 3 I. HI. AC,K'
v ! " I. HI. AC,K'
v # I. HI. AC,K
- . & % 8 ! 1 I. H " KP
v X - I . S'
v I. S'
v (E E'
v /E
- . ! " P
- / W 1 " P /AR
- 0 " I. _ ! - P
v N $ /AR , " H !5 ! ! 1 K'
v ! 1 I. "$ '
- 1 V 4% ! D HI. E OPI. QK7 - I. S "
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
- 2 & " %' & ! " ) &I.'
-W 4(9 5- ,&<- DEV

C! 3 $ &# L - (0 " - " $ ! 6%'
6W -!, N$.& ,-)& /#-%/ 829 : $%& C V

V - -" IR. " F - ! Y 6 8
- ! 3 -% % % % " - ! _ ! - -% ! 3 ' ! 3
! $8 " $ ! 8 L<LM' &$ - ! ! H K $ - ! " "
@ $ !H K ! $ % ! % OAQ.' &$ - ! "
" @ " -% 8 L<LM' &$ - ! ! F
! ! 6 L7+ ' N $ - !! 8 ! - ! '
! 3 8 5 3 - $ - " '
V F - ! 8 - 5 !% ! $8 L<)' / @
% ! $8 " xQ W - I. ), - ),LB - '
( ! $8 L<)P !
&I ^ b I % 9 $ !& $aO 5 % $ $! ! & $a& % $ $ 99
b &I#( a & a & ASS
& b OAQ.H a a K H)RL,B?K

b <)L,%SH) a? a ), K H,7,,,B;;+K
b )*7B?y
&I ^ b Ly a )*7B?y a zH+, <L+ KH,7,+y R K
b )>7?Ly
VDD
Sampling
jVT = 0.6V Switch
Rs i ANX RlC < 1K ' SS Rss '
-Wr wv
VA V .
I
CPIN _
5 PF
, _ vm±ILEAKAGE
AVT - no.6fiuA
-- \ T
500 nA
CHOLD
= DAC Capacitance
= 120 pF
Vss
Legend: CPIN = input capacitance

VT 6V- -
= threshold voltage 5V- -
LEAKAGE = leakage current at the pin due to VDD 4V- -
various junctions 3V- -
Ric = interconnect resistance 2V- -
SS = sampling switch
CHOLD = sample/hold capacitance (from DAC)
5 6 7 8 91011
Sampling Switch
m
7/# ESEUW '() I-F,# ,&<- /4(9 0-1( C W
,W M2F- ,#(F/ L&/4 ,:(,* ,#( C V
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
& ! " I. @ - 6 &I.' " I. 35 !

! ! )L &I. " ), ' C! ! ! I.
_ !% 'W " = ! &I. P
v L &A
v B &A
v ; &A
v )* &A
v ML &A
v *B &A
v W 5 ! $ ! 5 I. '
V " I. F - 8 ! ! % ! &I. b
)7*y ' W ! L<L+ $8 " ! &I. F - - !
( ! ! '
AD Clock Source ( TAD )
Maximum Device Frequency
Operation ADCS2: ADCS1 : ADCS 0
2 Tosc 000 1.25 MHz
4 Tosc 100 2.5 MHz
8 Tosc 001 5 MHz
16 Tosc 101 10 MHz
32 Tosc 010 20 MHz
64 Tosc 110 20 MHz
RC < 1 2 3
’ ’ > xll (Note 1 )
H-</4 ESEZW -!, 6 " :2F- ,#(F/ L&/4 ,#&N$=/ '(= C W

8W ?/# ,-+& #7/# ,#( ,-!, /4(9 0-1( "2 /4 "2F ,&<- C V
O ! I. AC) & ! - % $ I. ' - % $
5 ! - ! 3 ! 8 - & ! - !% - )H ! 3 K' C &
_ !,H ! 3$ K 8 3 " ! 3$ 'O ! " I. % - $ ! -
- O ,P O L - & '
$W #&N$=/ '(= C V
X - /AR $ ! " ! 3 " D - $8 ! " ' 4%
! D " I. E OPI. E Q 3 ! % % " %
- - ! - $6 3 " $ - ' " " I. 8 D - $8 "
% 3 1 - !' Q /AR ) 1
D - $8 " '
&$ ! 8 L<LB $8 " - " " /A ) - 1
" - - '
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
T(pY to TAD | TAPI TAD2 . TAD3 . TAD4 TAD5 TAD6 . TAD7 TAD8 . TAD9 t TADIO TAD 11
+ t t t t t t t t
t
Conversion starts
b9 b8 b7 b6 b5 b4 b3 b2 b1 bO
Holding capacitor is disconnected from analog input (typically 100 ns)
Set GO bit i
ADRES is loaded
GO bit is cleared
ADIF bit is set
Holding capacitor is connected to analog input
7/# ESEYW #& *N1 ,#&N$=/ '(= C W

\W -!, "#-/# 4# :2& *$+" ;&-< ,&<- C V
4% ! )* I. E OPI. E Q 5 ! D " ), I.
" !' . D Y - ), ! $ ! 4% ! )* - -
6 5 ! " $ ! - I.S# HI. S $ K' O8 L<L+ $8 "L 6
5 ! 4% ! D P
10-bit Result
ADFM = 1 ADFM = o
2107 0 0765 0
0000 00 0000 00
ADRESH ADRESL ADRESH ADRESL
10-bit Result 10-bit Result
Right Justified Left Justified
7/# ESEZW ->A "#-/# 4# *$+" ;&-< # $%& ,#@/# A#-< 0-1 "5-! W
4W (-F" '(%/4 ,#&N$=/ '(= C "5(/4 ,#$+ '(% :$$AV
N I. - ! $ ! % !! %
HI. )PI. , b ))K' N ! ! I. 8 "
$ - D - $8 " 1 'T " % -%
QEE( ( _ $ @ " 'N "
- 8 /AR 6 - D ! I. E ' C ! 1 I.
% -%7 ( 3 - QEE( ! 8 ! $ 'C
! 1 I. ! % -%7 I. 3 1 -7 4 5 I.AC @ 5 " $8 - )'
#W /# #2 </4 ,&<- 5$G$"V
, 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
( 3 - ! $ ! - $ 'N $ 3 I. 1 "
D - $8 I. ! " '& - ! 3 I. 6 8 3 !
! 3 ! '
/ - $6 $ ! ! I. E OPI. E Q ! Y $ - %
'O ! I. E OPI. E Q - 5 3 ! - 6 $ - % '
- ! 5 ! I. P
Value on Value on
POR , BOR MCLR. WDT
0Bh,8Bh, INTCON GIE PEIE TMROIE INTE RBIE TMROIF INTF RBIF 0000 OOOx oooo 0 OOu
10Bh,18Bh
OCh PIR1 PSPIF<1> ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF o o o o o o o o o o o o o o o o
8Ch PIE1 PSPIE 1) < ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE o o o o o o o o o o o o o o o o
1E h ADRESH A /D Result Register High Byte xxxx xxxx uuuu uuuu
9Eh ADRESL A/D Result Register Low Byte xxxx xxxx uuuu uuuu
1Fh ADCONO ADCS1 ADCSO CHS2 CHS1 CHSO GO/DONE ADON OOOO 0 0 - 0 OOOO 0 0-0
9Fh ADC0N1 ADFM ADCS2 PCFG3 PCFG2 PCFGI PCFGO oo-- oooo 00- - oooo
85h TRISA PORTA Data Direction Register -- 11 1111 - -i i ini
0 5h PORTA PORTA Data Latch when written: PORTA pins when read -- Ox oooo -- Ou oooo
<
89h 1) TRISE IBF OBF IBOV PSPMODE PORTE Data Direction bits oooo - 111 oooo - 111
09h<1> PORTE RE2 RE1 REO - XXX - uuu
H-</4 ESE W -!, "#-/# 4# 8&1/4 ,#( ,#&N$=/ '(= C W
V0 8 $" " R
N - - - ! ' C! 3 - % - - RA
I, IM - ! 3$ % - - IB I+' V -% $ 3 !
- ! 3 - '
& ! # AC % ! 3 ! 3$ - ' -
8 - - $8 " $ ! 8 L<L*'
2 * 1
CMCON REGISTER
R-0 R -0 R/W-0 R/W-0 RAA/-0 R/W-1 R/W-1 R/W-1
C 20UT C10UT C 2INV C1INV CIS CM2 CM1 CMO
bit 7 bitO
W ? ?2P ! 3$ - L
N L CTb ,P
)b L T Ca d L T C<
,b L T Ca c L T C<
N CTb )P
)b L T Cac L T C<
,b L T Ca d L T C<
W * ?2P ! 3 $ - )
N ) CTb ,P
- 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
)b T Ca d ) T C<
,b ) T Ca c ) T C<
N CTb )P
)b ) T Cac ) T C<
,b ) T Ca d ) T C<
W + 1;P ! 3$ - L
)b ! 3 $ L
,b ! 3 $ L !
W B 1;P ! 3$ - )
)b ! 3 $ )
,b ! 3 $ ) !
W M +P " ! 3 -
N #LP #, b )),P
)b ) T C< - IMRICM
L T C< - ILRICL
,b ) T C< - I,RIC,
L T C< - I)RIC)
W L<, * ' * P - -
Comparators Reset Comparators Off ( POR Default Value)

CM2 : CMO = 000 CM2 : CM0 = ill
A VlN- D VlN-
RAO/ ANO RAO/ANO
VlN+ Cl Off ( Read as ‘ o ’)
VlN+ Cl Off ( Read as ‘ o')
RA3/AN3 RA3/AN3
A VlN- D VlN-
RA1/AN1 RAI /AN1
VlN+ C2 Off (Read as ‘ o ’) VlN+ C2 Off ( Read as ‘ o’)
RA2/AN2 RA2/AN2
Two Independent Comparators with Outputs

Two Independent Comparators
CM2:CM 0 = oil
CM2 : CM0 = 010
A VlN-
A VlN- RA0 /AN0
RA0/ AN0
VlN+ C1 CIOUT
VlN+ C1 C l OUT RA 3/AN3 -A
RA 3/ AN3
^
RA4 /T0CKI/C10UT
A VlN- VlN-
RA1/AN1 RAI /AN1 —
VIN+ C2 C20UT C2 - C 20UT
RA2/AN2 RA2/ AN2 —
VlN+
RA 5 /AN4/SS/C20UT
. 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
Two Common Reference Comparators Two Common Reference Comparators with Outputs
CM2 : CM0 = 1 0 0 CM2:CM 0 = 1 0 1
A VlN- A VlN-
RA0/ AN0 RA0/AN0
VlN+ Cl C l OUT VIN+ Cl f- C10UT
RA3/ AN3 -A RA 3/AN3 - A
RA4 /T0CKI/C1OUT
A VlN-
RA1/AN1
C2 C20UT A VlN-
RA2/ AN2 VlN+ RA1/AN1
VlN+ C2 t- C 20UT
RA2/AN2
RA 5/AN4/ SS/C20UT
One Independent Comparator with Output Four Inputs Multiplexed to Two Comparators
CM2 : CM0 = 001 CM 2:CM 0 = no
A A
VlN- RA0/AN0
RA0/ AN0
Cl ClOUT
° CIS = o
CIS = l
VlN-
VlN+ RA 3/AN3 o C10UT
RA3/AN3 VlN+ C1
RA4/T0CKI/C1OUT A
RA 1/AN1 O
CIS = o VlN-
RA2/AN2 o CIS = l
D VlN- VlN+ C2 C20UT
RA1/AN1 <
VlN+ C2 Off (Read as ‘ o ’)

RA2/AN2 < CVREF From Comparator
VREF Module
A = Analog Input, port reads zeros always. D = Digital Input. CIS (CMCON<3>) is the Comparator Input Switch.
7/# ESE W -!, * $=& #(-F" '(%/4 ,&<- 6(% G( G-!/#W

-; ! - '& ! # AC 5 ! -
"' & ! & I 5 3 $ % - - @ '
-W (-F" '(%/4 G( G-!/#V
W - $8 " $ ! 8 L<L? ! - D ! 3 - - ! 3 !
! 3$ '
• N ! 3 T Ca ! 3 T C< 8 ! 3 $ - - % H,K'
• N ! 3 T Ca - ! 3 T C< 8 ! 3 $ - - H)K'
O8 L<L? $8 " - 75 ! - ! - F - F $ P ! 3
$ - 6 " 5 -% 99 ! -% - !'
VIN+
Output
VlN-
VlN-
VlN+
Output I 1J
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
7/# ESE W -!, * $=& #(-F" '(%/4 ,&<- 6(% G( G-!/#W

6W $%/ -!A G( G-!/#V
&F ! 4 $ ! - 5 ! " !
- ' &F ! T C< - - F T Ca ! 3$ Y
% %'
& *6 7 8*9 ' #
N 5 ! -% ! 8 - - 6 8 - -
! - - ! -% ! ! 4 - '& " 3 ! - !5 ! -
- ! ! 3 ! 8 -% ! ! ' &F _ $ !! - T
T.. - % - ! 3 - '
& *6 7 8*9 '
W - 3 ! % -% ! -% $ ! - ' &F
$ ! 5 ! - - ! #cLP,d b )), 8 L<LB
$ ' wm " 8 -% $ ! T Ca - - '
,W # 1 4 -/ '-!A 2!/4V
& ! -% - ! ! -% - 4 !
! 3 7 $ - ! 3$ - - % 'C -% $ ! 6 " 7
! $8 3 - -% $ !% - 5 ! - ! 3$
- ' &$ ! ! 4 F ! -% - !'
8W 4(9 5- 6(% G( G-!/#V
C! 3 $ - !D ! Y # AC' - ! 3 $ -
3 ! - - ! 3$ $ % - R % IB I+' N % -%7
% - IB I+ 3 " ! 3$ @ 3 ! ! - ! 3$
- ' O8 L<L; $8 " - '
- & I @ - = ! % -%R - - IB I+'
F ! 3 $ - - " 5 ! L L OT ) CT
H # ACcBP+dK
- "-P ! % $7 - 5 ! ! 3 ! 3 g,h'
- ! 3 6 8 ! 3 3 " ! 3 ! " "
e ! 3 &$ !! $'
- - -% ! $ " 6 ! e ! 3 - $
= ! 5 !'
IB A5 ! 'N 5 ! ! 3$ 8% - $ - '
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
Port Pins
MULTIPLEX
CxINV
vy
To RA4 or
RA5 Pin ^ At
Bus Q D At
Data
Read CMCON EN
Set
CMIF Q D
bit
Other
Comparator
EN < A
CL Read CMCON
Q
Reset
7/# ESE W '() I-F,# ,&<- 6(% G( G-!/#W

$W 4-J" ,&<- 6(% G( G-!/#V
! 1 - - ) " - - " ! - $6 ! 3 $ - '(
5 " $8 $ $ ! - - ! 3$ _ ! - - # ACc?P*d7 - 6
" 3 "$ " 'W #SH ! ( K - ! 1 - 'W #S
% $ _ ! - - -' . 3 ! - ! - ) ! "7 - ! 1
% ! 1 '
W #EH ! ( EK (E E H !
C& ACK % - ) % -%
! 1'& -7 /E 3 !% - )' C 8 $ ! 3 ! " 6 -
8 ! 1 3 ! % -%7 4 5 #S @ - ) ! 1 "$ '
&$ ! ! $8 % ! 17 ! 5 ! - - ! 1 3 ! - P
v & " R! # AC 3 - ! F - !'
v X - # S'
\W (-F" '(%/4 ,&<- 6(% G( G-!/# < ,#$+ '(% :$$AV
N - ! $ ! %7 - @ 5 " $8
! - ! 1 3 % -%' C! 1 5 - $ 3 -
%' V ! = ! ! $ ! % 8 1 -
H #cLP,db)))K $ - %' C - % 8 5 !
! # AC ! 6 !'
4W /# #2 </4 ,&<- 5$G$"V
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
N ( 3 ! $ ! - $ ! # AC -
$ ! 1 7 #cLP,d b )))'
#W $+" /(+ ,-!, /4(9 0-1( "2 /4 "2FV
# ! ! 3 ! $8 " $ ! 8 L<L>' . - !
- ! 3$ - ! -L5 5 % ! - T.. T '. -7 ! 3
! % _ $ !! - -% T.. T '
C -% ! 3 ! - $ ! ,7*T = ! 4 ! 8
$ ! - 5 5 3% "$ !! -%' &$ - ! ! - 5 !
), ! ! 'W 8 % ! ! 3 !
4 5 5 f $ 3 - 5 !$ - ! - $6 '
VDD
VT = 0.6 V
Rs < !1OK Ric
AA/V —[> vw
AIN
~\ LEAKAGE
CPIN -L
A VT = 0.6 V (A j ±500 nA
i
5 pF —
Vss
Legend: CPIN Input Capacitance

VT Threshold Voltage
ILEAKAGE = Leakage Current at the pin due to various junctions
Ric Interconnect Resistance
Rs Source Impedance
VA Analog Voltage
7/# ESE[W '() I-F,# /4(9 0-1( "2 /4 "2FW

- ! % - ! P
Value on
Value on
POR
Resets
9Ch CMCON C 20UT C10UT C2INV CIINV CIS CM2 CM1 CMO oooo 0111 oooo 0111
9Dh CVRCON CVREN CVROE CVRR CVR 3 CVR 2 CVR 1 CVR 0 ooo - oooo ooo - oooo
OBh, 8Bh, INTCON GIE/ PEIE/ TMROIE INTIE RBIE TMROIF INTIF RBIF oooo 0 OOx oooo 0 OOu
10Bh,18Bh GIEH GIEL
ODh PIR2 CMIF BCLIF LVDIF TMR3IF CCP2IF - 0-- oooo - 0-- oooo
8D h PIE2 CMIE BCLIE LVDIE TMR 3IE CCP 2IE - o -- oooo -o-- oooo
0 5h PORTA RA 5 RA4 RA 3 RA2 RAI RAO -- Ox OOOO -- Ou OOOO
85h TRISA PORTA Data Direction Register -- 1 1 1111 -- ii ini
H-</4 ESE W -!, "#-/# 4# 8&1/4 ,#( 6(% G( G-!/#W

W -% - ! $ ! )* % _ $
-% 6 - g)),h' & ! % $8 -
= ! -% T AC'
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
O8 L<M, ! $ % $ 5 3" ! - $6 T ES
- = !! ! ! ! - ! -% ! 5 !'
V -% ! % -% " ! T..'
C! 3 $ -% - - ILRICLRT$ 9<R T ES' " -
5 ! ! 3$ " .I ! ! - = ! F
-% $ - _ $ ! -% - F - " !'
CVRCON CONTROL REGISTER ( ADDRESS 9Dh )
R/W-0 R/W-0 R/W-0 U-0 R/ W-0 R/W-0 R / W -0 R/W-0
CVREN CVROE CVRR CVR3 CVR 2 CVR 1 CVRO
bit 7 bitO
W ? ; 31P % -% -% -
)b % -% !'
,b ! % -% !'
W * ; 3P % -% ! 3 $ - T ES
)b - -% T ES ILRICLRT$ 9<R T ES'
,b - -% T ES ! ILRICLRT$ 9<R T ES'
W + ; P 5 3" -% T ES - L
)b , ,'?+ T - % ! - T RLB'
,b ,'L+ ,'?+ T - % ! - T RML'
W B (#A B# C D EF G H
)b ! 3 $ )
,b ! 3 $ ) !
W M<, ; ' ; P - ! - $6 T ES - , )+
N T b)P
T ES bHT cMP,dRLBKZ T '
N T b,P
T ES b)RB Z T aHT cMP,dRMLKZ T '
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
VDD
16 Stages
CVREN
8R R R R R
Wv—VWVWW •••VWVV\/\Arf
8R HCVRR
RA 2/AN2 /VREF-/CVREF
CVROE —1 [
CVR 3
CVREF 16: 1 Analog MUX CVR2
Input to CVR 1
Comparator CVRO
7/# ESUKW '() *#(+ I-F,# "-F( ' $%/ -!A ,#&-=/ ,#( 6(% G( G-!/#W
- ! % - ! P
Value on
Value on
POR
Resets
9 Dh CVRCON CVREN CVROE CVRR CVR 3 CVR 2 CVR1 CVRO 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0
9 Ch CMCON C 20UT C10UT C 2INV C1INV CIS CM2 CM1 CM0 0000 0111 0000 0111
H-</4 ESE W -!, "#-/# 4# 8&1/4 ,#( 6(% "-F( ' $%/ -!A ,#&-=/W
)0 $ ' C D R
( )*S;?XI - 4 = ! "7 ! ! - -
!D - % ! 7 ! % - ! = ! !
! % 3 'V - P
v 5 ! HA K'
v P
( ] $< H(A K'
( ] $< % & $ H(J &K'
W 5 ! $< %& $ HA K'
W$ ] < HWA K'
v - ! 1'
v J 5 !& $ HJ.&K'
v %'
v # 3 '
v C 5 ! .'
v Q % $8 $ ! '
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
v Q % $8 $ ! -% %'
v W ! 3$ '
( )*S;?XI - J.& - 5 ! !D - 6 8 ' J.& - 5 !
!$ ! = ! "'
- 6 ! % ! $8 3 % '# A & HA $
$< %& $K - - = !! 3 $ ! - 5 !
! 6 'O (J & H( ] $< % $K ! % ! $8 3 6 ! ?L Y
- % 'C - ! 3 6 $ ! - ! ! % 6 '
T - 6 7 - - !5 ! ! ! '
% 5 ! % % ] $<5 ] ' C! 5 !
- ! % !D ! 7 J.& 4 !D
! 1'
# 5 ! " 3 ! % -% % !%
% - - ! 5 !' W 5 ! " % F $ ! 5 ! Q(
= ! !' # % % - 6 8 5 ! 3 ! - '
-!, 6 " '?/# ,-+& #7/#V
6 - 8 - % $8 H - ! - $6 g,hK ! % $8 4
H - ! - $6 g)hK - 8 - ' / - $6 - 4
! % $8 ! 6 8 H 9! $ J $5 $ ! $K MSSS ' C 3 !
" _ $ ! - ! $8 6 Y L,,? ' V 4 - "- 6 Y " _ !
! - - ! $8 '
2 I #E : E(
R / P- 1 U- 0 R / P- 1 R /P-1 R /P-1 R /P-1 R/P-1 R /P-1 U- 0 U -0 R / P- 1 R/P-1 R /P-1 R/P-1
CP DEBUG WRT1 WRTO CPD LVP BOREN PWRTEN WDTEN Foscl FoscO
bit 13 bitO
W )M P 3 - ! $8 S
)b 3 1'
,b - ! $8 - 3 '
W )L 5 !P g)h
W )) 036?4P % ! 3$
)b ! 3$ ! % -%7 W* W? - A'
,b ! 3$ % -%7 W* W? 5 ! 3$ '
W ),<> : 2 J: 2 P - % -% ! - ! $8 S
))b 1 ! i - ! 5 3 - ! $8 _ ! -
! EE AC'
),b - - - 6 Y ,,,, ,,SS !! 7 ,),, )SSS
% -% ! _ ! - ! EE AC'
,)b - - - 6 Y ,,,, ,?SS !! 7 ,;,, )SSS
% -% _ ! - ! EE AC'
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
,,b - - - 6 Y ,,,, ,SSS !! 7 ),,, )SSS

% -% ! _ ! - ! EE AC'
W ; 0P 3 -5 3 EE( A#
)b 1 3 -5 3 EE( A#'
,b -5 3 EE( A# - 3 !! '
W ? 9; P % -% % $8 -% %'
)b WMR(/# - - = ! (/# 0 % -% % $8 -% %'
,b WM A 7 OT 5 ! % $8 '
W * 6 31P % -% W$ ] <
)b % -% WA
,b ! % -% WA
W +<B N ! @ $ P g)h
W M P % -% & $ ! $ - P
)b ! % -% (J &'
,b % -% (J &'
W L :0231P % -% J.&
)b % -% J.&
,b ! % -% J.&
W )<, 7 + '7 + P - 5 !
))b 5 !
),b 5 !O
,)b 5 ! X&
,,b 5 ! Q(
0 $ ! ' R
-W -!, :(-F I-F,# 8-( '(%/4V
( )*S;??I - ! B 5 ! - ' C! 5 ! - % $8
6 8 ) $ !B P
v Q(P Q ]<% ] $ $" H = ! ! %K
v X&P $" R $H R ! !K
v O PO! < % 5 $" R $H R ! ! K
v P $R % $H $ R K
6W C-( '(%/4 "#-F,# -/#O"&F $5-I ,V
&$ ! - 5 ! X&7 Q( 4 O 7 4 $ -
A )R QN A LR QNA 5 ! 8 L<M)' & 5 !( )*S;??I
" 5 ! 1 ! !' 5 ! 1 % - - -
, 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
" 'N ! X&7 Q( 4 O 8( - 5 !

! ! ! A )R QN 8 L<ML'
C 1<1) 0SC1
To
Internal
r XTAL
OSC 2
Sleep
Logic
H \-1 + RS {2) 4-
•
C 2< > PIC16F87XA
7/# ESU W C-( '(%/4 8&1/4 "#-F,# -/#O"&F ,(%/4 #2 </4 ,-+& #7/# X B M #(->, W
H)K X ! L<LL - - ! - $6 ) L'
HLK V $ % - " - '
Clock from — OSC1

Ext. System PIC16F87XA
Open OSC2
7/# ESUEW 4(9 0-1( /#-%/ L&/4 "21 6$./ /4(-1 ,-+& #7/# X B M #(->, W
W ! L<L> ) LP
Crystal Cap. Range Cap. Range
Osc Type
Freq. C1 C2
LP 32 kHz 33 pF 33 pF
200 kHz 15 pF 15 pF
XT 200 kHz 47-68 pF 47-68 pF
1 MHz 15 pF 15 pF
4 MHz 15 pF 15 pF
HS 4 MHz 15 pF 15 pF
8 MHz 15-33 pF 15-33 pF
20 MHz 15-33 pF 15-33 pF
These values are for design guidance only .
See notes following this table.
Crystals Used
32 kHz Epson C-001R 32.768K -A ± 20 PPM
200 kHz STD XTL 200.000KHZ ± 20 PPM
1 MHz -
ECS ECS 10- 13 1 - ± 50 PPM
4 MHz ECS ECS-40- 20-1 ± 50 PPM
8 MHz EPSON CA -301 8.000M -C ± 30 PPM
20 MHz EPSON CA -301 20.000M-C ± 30 PPM
H-</4 ESE[W #(F/ ,-!, "#-F,# -/# 0-1 "&FW
- 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
,W H(% 8-( '(%/4 D V

&$ !3 ! - !5 ! 7 5 ! % F' &
5 ! -% ! ! %7 ! - $6 $ H EX&K H EX&K
!' W -7 5 ! 3 " ! - $6 " ! - $6 -
D - $8 ' O 3 7 - ! - $6 5 !! 3 -
- !! - 3 ! 5 !7 4 - ! - $6 EX& %' O8 L<MM $8
" % - ( )*S;?XI
VDD
REXT
OSC1 Internal
< > Clock
CEXT
I
VSS
5 PIC 16 F87XA
OSC2/CLKO
FOSC/4
Recommended values: 3 kft < REXT < 100 kn
CEXT > 20 pF
7/# ESUUW H(% 8-( '(%/4 D W

/0 B " R
( )*S;??I -* - P
v ( ] $< H(A K'
v $ ! - ! 8 !'
v $ ! %'
v J.& $ ! %'
v N ! J.& H $ ! ! 8 !K'
v W$ ] < HWA K'
- ! ! 6 ! - 8 !$ ' &$ ! -
- ! ! - 6 (A ! " - $ 'O - !
- - $ (A 7 $ $ J.&7 $ $ !
% $ WA ' - ! ! ! J.& - - (: !
$ ! - ! 8 ! $ ' - 4 - " 8
! - 'W ! L<LL 5 @ - $ ! - $ - ! '
! $ $ % 8 L<MB'
. 1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
External
Reset
MCLR
Sleep
WDT WDT
Module Time-out
Reset
VDD Rise
Detect
Power-on Reset
VDD
Brown-out
Reset S
BODEN —
OST /PWRT
OST
Chip_Reset
OSC1
> 10-bit Ripple Counter R Q
0) PWRT
On-chip
RC OSC 10-bit Ripple Counter
Enable PWRT
Enable OST
Note 1: This is a separate oscillator from the RC oscillator of the CLKI pin
7/# ESUYW '() I-F,# 5$G$" "5(/4 ,# AW

FOR BOR TO PD Condition
o X l l Power-on Reset
o x o X Illegal, TO is set on POR
o x x 0 Illegal, PD is set on POR
1 0 l 1 Brown-out Reset
1 1 0 1 WDT Reset
l l o o WDT Wake- up
1 l u u MCLR Reset during normal operation
l l l o MCLR Reset during Sleep or Interrupt Wake-up from Sleep
H-</4 ESUKW #(F/ ,-!, "#-F,# -/# 0-1 "&FW

Program Status PCON
Condition
Counter Register Register
Power -on Reset OOOh 0001 lxxx -- Ox
MCLR Reset during normal operation OOOh 000 u uuuu uu
MCLR Reset during Sleep OOOh 0001 Ouuu uu
WDT Reset OOOh 0000 luuu -- uu
WDT Wake -up PC + 1 uuuO Ouuu uu
Brown- out Reset OOOh 0001 luuu uO
Interrupt Wake -up from Sleep PC + 1< 1 > uuul Ouuu -- uu
H-</4 ESU W #(F/ ,-!, "#-F,# -/# 0-1 "&FW

-P H)K - ! " ! 1 "$ /E 6 )7
5 ! ! ( % $ 6 Y ! 1 ,,,B '
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
/ - $6 - ! 6$ P
Power - on Reset , MCLR Resets Wake -up via WDT or
Register Devices
Brown-out Reset WDT Reset Interrupt
W 73A 74A 76A 77 A xxxx xxxx uuuu uuuu uuuu uuuu
INDF 73A 74A 76A 77 A N /A N/ A N/A
TMRO 73A 74A 76A 77 A xxxx xxxx uuuu uuuu uuuu uuuu
PCL 73A 74A 76A 77 A 0000 0000 0000 0000 PC 2
+ 1( )
STATUS
FSR
73A
73A
74A
74A
76A
76A
77 A
77 A
0001 lxxx
xxxx xxxx
OOOq quuu
uuuu uuuu
^ uuuq quuu
uuuu uuuu
^
PORTA 73A 74A 76A 77 A - - Ox 0000 -- 0u 0000 — uu uuuu
PORTB 73A 74A 76A 77 A xxxx xxxx uuuu uuuu uuuu uuuu
PORTC 73A 74A 76A 77 A xxxx xxxx uuuu uuuu uuuu uuuu
PORTD 73A 74A 76A 77 A xxxx xxxx uuuu uuuu uuuu uuuu
PORTE 73A 74A 76A 77 A -xxx - uuu - uuu
PCLATH 73A 74A 76A 77 A -- 0 0000 --0 0000 — u uuuu
INTCON 73A 74A 76A 77 A 0000 00 Ox 0000 O O O u uuuu uuuu
^
PIR 1
73A 74A 76A 77 A r O O O 0000 r O O O 0000 ruuu uuuu
^
73A 74A 76A 77 A 0000 0000 0000 0000 uuuu uuuu
^
PIR 2 73A 74A 76A 77A -0- 0 0- - 0 -0- 0 0- - 0 u u
- - - ^ U- U
TMR 1 L 73A 74A 76A 77 A xxxx xxxx uuuu uuuu uuuu uuuu
TMR 1H 73A 74A 76A 77 A xxxx xxxx uuuu uuuu uuuu uuuu
T1CON 73A 74A 76A 77 A --00 0000 — uu uuuu - - uu uuuu
TMR 2 73A 74A 76A 77 A 0000 0000 0000 0000 uuuu uuuu
T2CON 73A 74A 76A 77 A -000 0000 -000 0000 - uuu uuuu
SSPBUF 73 A 74A 76 A 77A xxxx xxxx uuuu uuuu uuuu uuuu
SSPCON 73A 74A 76A 77A 0000 0000 0000 0000 uuuu uuuu
CCPR 1 L 73A 74A 76A 77 A xxxx xxxx uuuu uuuu uuuu uuuu
CCPR 1H 73A 74A 76A 77 A xxxx xxxx uuuu uuuu uuuu uuuu
CCP1CON 73A 74A 76A 77 A - -00 0000 -- 00 0000 - - uu uuuu
RCSTA 73A 74A 76A 77 A 0000 0 0 O x 0000 00Ox uuuu uuuu
TXREG 73A 74A 76A 77 A 0000 0000 0000 0000 uuuu uuuu
RCREG 73A 74A 76A 77 A 0000 0000 0000 0000 uuuu uuuu
CCPR 2 L 73A 74A 76A 77 A xxxx xxxx uuuu uuuu uuuu uuuu
CCPR 2H 73A 74A 76A 77 A xxxx xxxx uuuu uuuu uuuu uuuu
CCP 2CON 73A 74A 76A 77 A 0000 0000 0000 0000 uuuu uuuu
ADRESH 73 A 74A 76A 77A xxxx xxxx uuuu uuuu uuuu uuuu
ADCONO 73A 74A 76A 77 A 0000 00- 0 0000 00- 0 uuuu uu- u
OPTION REG 73A 74A 76A 77 A 1111 1111 1111 1111 uuuu uuuu
TRISA 73A 74A 76A 77 A - - 11 1111 -- 11 1111 - - uu uuuu
TRISB 73A 74A 76A 77 A 1111 1111 1111 1111 uuuu uuuu
TRISC 73A 74A 76A 77 A 1111 1111 1111 1111 uuuu uuuu
H-</4 ESUEW -! "5? ,&<- ,-!, "#-/# 4# *# 6? 5$G$"W

-P H)K # 4 $ ! C& AC7 ( ) R 4 ( L 3 6 !'
-P HLK - ! " ! 1 "$ /E 6 )7
5 ! ! ( % $ 6 Y ! 1 ,,,B '
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
-P HMK X ! L<M) - - ! - $6 $ - Y 6 '
Power - on Reset , MCLR Resets Wake-up via WDT or

Register Devices
Brown-out Reset WDT Reset Interrupt
TRISD 73A 74A 76A 77 A 1111 1111 1111 1111 uuuu uuuu
TRISE 73A 74A 76A 77 A 0000 - 111 0000 - 111 uuuu - uuu
73A 74A 76A 77 A rOOO 0000 rOOO 0000 ruuu uuuu
PIE1
73A 74A 76A 77 A 0000 0000 0000 0000 uuuu uuuu
PIE2
PCON 73A
73A 74A
74A
76A
76A
77 A
77 A
-0- 0 0- - 0
-- qq
-0- 0 0- -0
- - uu
-u- u u —u
- - uu
SSPCON2 73A 74A 76A 77A 0000 0000 0000 0000 uuuu uuuu
PR 2 73A 74A 76A 77 A 1111 1111 1111 1111 1111 1111
SSPADD 73 A 74A 76 A 77A 0000 0000 0000 0000 uuuu uuuu
SSPSTAT 73A 74A 76A 77A - -00 0000 -- 00 0000 - - uu uuuu
TXSTA 73A 74A 76A 77 A 0000 - 010 0000 - 010 uuuu - uuu
SPBRG 73 A 74A 76 A 77A 0000 0000 0000 0000 uuuu uuuu
CMCON 73A 974 76A 77 A 0000 0111 0000 0111 uuuu uuuu
CVRCON 73A 74A 76A 77 A 000- 0000 000- 0000 uuu - uuuu
ADRESL 73 A 74A 76A 77A xxxx xxxx uuuu uuuu uuuu uuuu
ADCON 1 73A 74A 76A 77 A 00- - 0000 00 - - 0000 uu - - uuuu
EEDATA 73A 74A 76A 77 A xxxx xxxx uuuu uuuu uuuu uuuu
EEADR 73 A 74A 76 A 77A xxxx xxxx uuuu uuuu uuuu uuuu
EEDATH 73A 74A 76A 77 A xxxx xxxx uuuu uuuu uuuu uuuu
EEADRH 73A 74A 76A 77A xxxx xxxx uuuu uuuu uuuu uuuu
EECON1
EECON2
73 A
73A
74A
74A
76A
76A
77 A
77 A
x — xOOO u- - uOOO u — uuuu
H-</4 ESUUW -! "5? ,&<- ,-!, "#-/# 4# *# 6? 5$G$" P" $+A "&F,RW
-W D$G$" V
( )*S;??I - @ ! 3 $ 'W @ 3 -
" - ! '
C - "- $ _ ! $ J.& ! ! - %'
VDD
PIC16F87XA
R 1 (1>
vw
R2 (2)
MCLR
C1
7/# ESUYW -F,# 5$G$"W
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
H)K / - $6 ! 6 $ )c B, $ _ ! -% $ $
$ ! D - - ! Y 6 '
HLK / - $6 " $ Ld) 5 ! "
! 7 $ ! $ ! % RT(( -% D % - ! e '
6W D$G$" *# I ! ,-+A ' $%/ V
# !$ % - $ $ % % - ! T.. = ! ! - $6
_ $ ! ! )7LT )7?T' V $ (A 7 T..
!D 3 $8 " $ '
N % 1 8 ! - - ! -%7 7
7u% - ! ! 'C 3 ! " ! - ! 8
% 6! 3 $ ! - - !' W$ ] < - 5 ! - !
- !'
,W I$5 5$G$" *# I ! ,-+A ' $%/ P QD RV
(J & $ ! ?L ! (A ' (J & !5 5 !
$ !' % ! 3 $ ! - $ ! ! ! (J & !' &
! $8 3 (J & % -% ! T.. = ! ! - $6 - % '# 6
8 3 % -% 4 ! % -% (J &'
& ! $8 3 ! 3 " - - % - D T..7
- "-'
8W H(% 8-( '(%/4 "-5"S&A P RV
W 5 ! A & % -% $ ),LB 85 ! H ! 3 A )K 5 "
(J & 3 - H (J & % -%K' & ! $ " ! -% 5 !
! ! 1 ! 6 '
W 5 !A & Y5 ! - $ X&7 Q( O Y5 ! $ (A 4
- - (: ! '
$W D$G$" H5(T/S(&" PH DRV
W 6
8 WA.EC - % -% 4 ! % -% WA ' C $
-% T.. ! ! 5 - - TWA H ! BTK $ ! ! ! 5 &WA H !
),,y K 8 " $ $ W$ ] < 3$ %' C T.. ! !5 - - TWA $ ! !
! ! 1 &WA 8 $ ! "$ '
N W$ ] < "$ 7 % 3 5 " $8 $ ! - W$ ] < -% T..
= ! - TWA ' - ( ] $< % & $ ! 3 % $ ! - $ ! ! &(J &
H?L K' C T.. ! !5 - - TWA $ ! ! &(J & 8 $8 W$ ] <
3 ! $ T.. = ! - -% TWA - $ ( ] $< % & $' ( ] $< %
& $ % -% W$ ] < % -% % $ ! - 6
8 (J &'
\W 57/# "2F "# 1 4 -/V
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
N ! 7 $8 ! P ! $8 3 (J & 1 $
(A "$ ' -7 A & 1 ),LB "5 ! (J & - 'N A &
- 8 % - - $ ! - '
C ! 3 - % $ ! ! 5 8 ! ! Y 3 - '
-7 - 8 % 1 ! " % - 'V " 3 5 !
- - = ! $ 4 ! ( )*S;??I ! ! !'
4W #-/# 4# "5-F/4 "#-! O"#-/# 4# ,(./4 G&-+"V
& ! ! R $ ! - ( AC -L % %'
W -, $ ! - W$ ] < - ! - $6 ! - 6 $ (A '
- ! 5 !% " ) $ - $ ! - "$ - - 6
- 7 - 6 $ _ !$ WA 3 "$ '
N W$ ] < ! % -% 8 $ ! - ! - 6 '
W -) $ ! - $ (A ' C - 6 - $ (A ! !
- $ - ' C! 5 !% " $ (A '
&$8 ! % 8 L<M+ - ! 3 - T.. D P
I
VDD I
I
MCLR i
Internal POR
TPWRT I
PWRT Time-out TOST

I
OST Time-out
Internal Reset
7/# ESUZW 57/# "2F "# 1 4 -/ *# 5$G$" D ,(! /(+ W

&$8 ! % 8 L<M* - ! 3 ! - T..P
VDD
MCLR
Internal POR
TPWRT
I
PWRT Time-out I TOST

i
OST Time-out
Internal Reset
7/# ESU W 57/# "2F "# 1 4 -/ *# 5$G$" D *#(./4 /(+ W
1 >+? @:=
*+,-. /0 1 21345 6*137- 0 " 8 9 .5:3;- '<-* *5=
&$8 ! ! = ! 8 L<M? - ! 3 - T.. D

P
i
5V
VDD OV 1V
MCLR
Internal POR
TPWRT
PWRT Time-out
i
TOST
OST Time-out
Internal Reset
7/# ESU W 57/# "2F "# 1 4 -/ *# 5$G$" D *#(./4 /(+ W

S0 B ' E R
( )*S;?XI - )+ ! ! 1'& ! ! 1 H C& ACK ! 3 !"
! 1 % - - - % -% ! 1 $ ! ! 1 '
- - ! 1 ) % $ ! - ! 1 ! - ! " !
% -% 4 ! 1 / E'
W % -% ! 1 / E H C& ACc?dK _ !) 8 % -% - ! ! 1
_ !, 8 ! % -% - ! 1'N /E % -% ! 1
% -% ! 1 % ) 8 ! 1 3 "$ ! " % - ' - ! ! 1 % -
% -% 4 - % -% ! 1 $ ! ! - !' - ! 1 $ ! %
$ ! - / E' W / E 6 - $ '
Q E&S E - ! $8 % ! 1 $ ! $8 F 7
/E % -% ! 1 $ '
C! 1 W,R C&7 ! 1 - " (A &W ! 1 $ &# , -
$ ! ! C& AC'
-
! 1 ! - $ ! ! 4 ( ) ( L' - % -% ! 1
! - ! - $ ! - ! 4 ( E) ( EL7 % -% ! 1 ! - $ !
! 4 C& AC'
N ! 1 -% - ! 8 /E 6 - -%! % 8 ! ! 1
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! $8 % ! 17 ! ! 1 - - 6 _ ! - $ - -
! 1'W ! 1 % - $ !% $ - % -% ! 1 $ $ - ! ! 1 3
'
1 >+? @:=
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-1
EEIF
EEIE -D
PSPIF (1) -\ \
PSPIE<1> -| j
ADIF -
ADIE - D Wake-up (If in Sleep mode )
RCIF —
RCIE — D
TMROIF -
TMROIE -
INTF
D
_
TXIF —
TXIE — INTE -
Interrupt to CPU
RBIF
SSPIF _
SSPIE — D RBIE -
PEIE H
CCP 1IF _
CCP 1IE - D n GIE
TMR2IF-
TMR2IE-
TMR 1 IF-
TMR1IE- D
CCP2IF-
CCP2IE—
BCLIF
BCLIE
——D
CMIF -
CMIE H D
7/# ESU W '() :(4 , ,&<- ,-!, /4-J"W
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% -% ! 1 $ ' C! 1 C& - - - "- %
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D " 6 F -% - " ! $ ! 1 6 - - '
6W 4-J" DKV
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M Postscaler
WDT Timer U
X
f 8
t PSA
t 8-to- l MUX PS 2:PS0
WDT
Enable Bit
To TMRO (Figure 5-1)
*T MUX PSA
WDT
Time-out
Note : PSA and PS 2:PS0 are bits in the OPTION_ REG register.
7/# ESU[W '() *#(+ ,&<- QC W

& - 1 - ! J.&
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
2007h Config. bits ( 1) BODEN<1> CP1 CPO PWRTE<1> WDTE Foscl FoscO
81h, 181h OPTION REG RBPU INTEDG TOCS TOSE PSA PS2 PS1 PSO
H-</4 ESUYW -!, "#-/# 4# ,&<- QC W

U0 B ' D D $' D" R
( ] $<5 ] % %' C % -% 6
J.& 3 6 - ! @ "7 H cMdK 6 - 7 H cBdK 6 -
) 5 ! 6 1 ' C 3 ! % $ A @ 5 " $8 $ ! - 3 - 6 $ -
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v C! 3 ! $
v 5 ! J.& H J.& % -%K
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L
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$ - % 'V - 6 % - " !%
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I ;
Q11 Q2 | Q31 Q4 Q11 Q2 | Q3 | Q4 | Q11 Q1 I Q21 Q3 | Q4 | Q11 Q2 | Q3 I Q4 | Q11 Q2| Q3| Q4 | Q11 Q 21 Q31 Q4 |
0SC1 ^ LVV V :
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*
CLKO<4> TOST 2
I
** 1v
I
INT pin i i
INTF Flag
Interrupt Latency 2
(INTCON< 1>)
**
GIE bit
(INTCON<7>) Processor in
Sleep
INSTRUCTION FLOW
PC X
Instruction . i
i
PC Jc PC+1 PC+2 PC+ 2 ki
PC + 2 .
X 0004h 0005h
Fetched .i
lnst(PC) = Sleep ; lnst ( PC + 1 ) lnst ( PC + 2) i
i
lnst(0004h) ' lnst (0005h)
i
Instruction J
Executed
\
L , lnst(PC - 1)
Sleep lnst ( PC + 1) i Dummy cycle Dummy cycle lnst( 0004h)
7/# ESYKW -!/# "#2!, ,A& 6-]/4 ,-!,# 8&1/4 /4-J"W

H)K 5 ! 5 ! X&7 O 4 Q('
HLK &A & b ),LB &A '
HMK C / E b )' &$ ! $ ! % " - - 8 % "
! $8 % ! 1'C / Eb, 8 % $ ! ! $8 '
HBK QNA ! - - 5 ! $ ! - 5 ! $ ! $8 "
'
0 B $R
N ! 3$ _ % 8 % $8 - , 8 - = ! ! 3$
% -%' - = ! " % -% - = !! 3$ 5 ! - ! $8 #(QIW .'
N - - = ! " % -% 8 ! " 3 $ - 5 !' W !
- $ - 6 ! 3$ '
. 1 >+? @:=
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I/O pins RB 6, RB7

Stack 1 level
Program Memory Address OOOOh must be NOP
Last 100h words
Data Memory 0x 070 (OxOFO, 0x170. 0x1FO )
0 x 1 EB -0 x1EF
H-</4 ESUZW -!, "-1 /4&N$./ ,&<- I-F,# 4 9 5(+ W

V 5 ! - = !! 3$ 8% ! % % $8 %
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"5 !# $ %'
0 8 ! G D H R
C 3 ! % $8 8 - ! $8 $ % - $
F $ '
0 B R
6 $F W - - 6 Y L,,, L,,M - 3 5 !7
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V0 ! B D B I B J " % -K
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LP.LOQQ1-.&R
.&R
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7 ! ! 7 ! ! % -% % $8 'V " % -%
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$ - ! !'
N 5 ! % $8 % ( 8 %% % ! B7+T +7+T
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1 ' &$ ! - $ ! % - ( 8 % 5 ! ! -% 8
! 6 - % $8 -% 8 !'
/)0 ! ' $ " % ' &R
W QT( _ 6 8
% $8 % -% -% % (' N % $8 "
% -% % $8 D ( -% ! 5 ! T.. _ ! - -% '
&$ ! % $8 "7 WMR(/# 5 ! - = ! % $8 ! -
RA' &$ ! D - $8 % $8 ! T.. % 'V %
$8 8 ! T.. % WMR(/# QT( - ' W QT(
4 6 ) -" '
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HLK N % $8 -% % 8 WM ! 5 ! RA'
1 >+? @:=
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-M $ ! ! & W% - ! % -% - WM
% % %'
HBK WM ! @ QT( % -%' & 6 % $8 !
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(: " ! % $8 '
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( )*S;??I % -% % ! $8 5 ! %D ! Q(& ! A#'
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N % %D ! A# TVN ( )*S;??I 8 5 !B ! P
• !$ % ! $8 ( '
• W?R(/.'
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Reset MCLR Vdd
Vss
PGD
RB7
PGC GND
RR 6
PGM
RES
0SC1
I I 20 MHz
OSC 2 T
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! " F % $ %D ! A#P
1 >+? @:=
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VDD
2 3 1 MCLR#/THV
E
4C
in
PGD/RB7
2 39
cr
00 _
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RAO / AN 0
RA 1 / AN1
PGC/RB6
RB5
38
oo ° 4
RA 2/ AN2 RB4
37
5 5 36
RA 3 / AN3 PGM/RB3
9 4 6 35
RA4/T 0 CKI RB2
8 3 1 N 4148 M 7 34
RA 5 / AN4 RB1
7
6
2
1
D3 ^ 9
8
RE0/RD#/AN5 INT/RBO
33
RE1 /WR#/AN6
10
RE2/CS#/AN7 PSP7/RD7
r
X1 co 29
PSP 6 /RD6
13 28
OSC1/CLKIN PSP5 /RD5
oo 14 27
OSC 2/CLKOUT PSP4/RD4
^r CM
15
RC 0 /T1 OSO RX /RC7
26
^ C1815 CQ 16
RC1 /T10 SI TX /RC 6
25
a
^ Q2
L 0 G5I4728
M Kl 1N4148oi î ^
17
18
RC 2/CCP1
RC 3 /SCK
SDO /RC 5
SDI/RC4
24
23
+ C1 + C2 19
RD 0 /PSP 0 RD3 /PSP3
22
V
* D6 szsl 2\ 20 21
X X RD1 /PSP1
vss
RD 2/PSP2
co
^ PIH1RF 877 P
7/# ESYEW '() /4&N$./ :N! I-F,# /-FA "52F, " $+A "21 ,(=/4 W
6W -F,# /-FA 4 -!/ " $+A "21 ,(=/4 ;&- , I-LEUEV
C % ! $8 ( )*S;??I !D #IXLML H 4 LMLK 8 -5 !
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( )*S;??IP
• XP 5 3 -" F '
• &XP $ " 5 3 -" F '
$8 " - ! F % ( )*S;??I D <LMLP
+5V
o
Reset MCLR
Vdd
Vss
TX GND
RC6
RX
RC 7
OSC1
I 120MHz
OSC2
7/# ESYUW -!, '2 1/4 4 -( " $+A 0 ! I-F,# /-FA /(+ " $+A ;&- ,#&N$=/ '(= W
! " F %D <LMLP
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>A
CN
_l
Q1
CNJ
D1 R 2 R5
I
1
co
CO
or O
o
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_J IC1
rq 1
C1 +
CONGCOM1
GND V+ &
3
C1-
6 1 6
V-
7 2 HA C2+
TX
4 C4
C 2-
RY
11 14
o-1 10
T1 IN T1 OUT
G ND
COMPOR r O T2 IN T20UT
12 13
R1 OUT R 1 IN
GNU RX-TX 9
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MAX -93 ?
7/# ESYYW '() /4&N$./ :N! I-F,# /-FA /(+ " $+A "21 ,(=/4 ;&- ,#&N$=/ '(= W
,W -F,# /-FA ;&- ,(=/4 M V
O
o
>A
9
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^T8
O O
o
74 ALSaiN N /
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JP1 IC1 C eg o
5 6 JP 2 C > '
LPT Pin5
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LPT Pin1 C MCLR O
74$_ S05N :z
LPT Pin2 -
S
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LPT Pin3
2t
3 Grid
o
LPT Pin4
LPT Pin18-25 Si
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to RB7 /PGD
RB6/PGC
RB3/PGM
GND
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3
SI
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GND
74ALS 05N
^
>A >A
Q11
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IC1A ^
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1 2 I
R5
74ALS 05N
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PCW C Compiler IDE
File Project Edit Options Compile View Tools Debug Help
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B ADC.sym BchoptatportB.err B chuongtrinhdemBCD.t
My Documents B ADC.tre BchoptatportB.hex B chuongtrinhngatTimer
Bbanphimled7.BAK BchoptatportB.lst 0 chuongtrinhngatTimer
0 banphimled7.c BchoptatportB.PJT B chuongtrinhngatTimer
Bbanphimled7.cof B choptatportB.sym B chuongtrinhngatTimer
My Computer
B banphimled7.err BchoptatportB.tre B chuongtrinhngatTimer
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<8
My Network
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New project
General
Project Name: E:\ choptatportB.c y OK
Device: PIC16F877A v Oscilator Frequency: I 20,000,000 HZ

X Cancel
Function Generation I I Enable Integrated Chip Debugging (ICD )
0 Opening brace on the following line Use 16 bit pointers for Full RAM use 7 Help
O Opening brace on the same line O Restart WDT during calls to DELAY
0 One fuse per line with comments
Fuses
View Code
Generated
from this tab
«««<
~^
\ Genera / Communications jSPI and LCDATimers / PCHTimers / Analoc / OtheiAlnterrupts / DriversXl Ô Pins / High/LowVoltage / 1 |»|
Y() Z[`\ *G6 @6a-13 4<2?\
# 8 ( AJ F + 8 4 8 4 ) K ) + * 6 I F +) ) 6
l » PCW C Compiler IDE
File Project Edit Options Compile View Tools Debug Help
BO
*I a
Microchip 14 bit v :
e K: Os #4 Di 0
choptatportB c. |
Itinclude "E:\choptatportB.h"
uoid mainO
<
_
setup adc ports(NO ANALOGS);
_
setup adc(ADCOFF);
setuppsp(PSPDISABLED);
_
setup spi(FALSE); _ _
setup timer 0(RTCC INTERNAL|RTCC DIU 1);
_ _
setup timer 1(T1 DISABLED);
__ _
setup timer 2(T2 DISABLED ,0,1); _
setup comparator(NC NC NC NC); _ _ _
_
setup ureF(FALSE);
>
< >
1:1 .
E:\ choptatportB c choptatportB choptatportB
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J ) + E F f, 6 E F f, H + )( F 4 )( F G ) N;
#6 + E F f, 6 E F f, H 8 I 4( ,J
6 H * 6 I 6 F + + @ !
F 2 F B,
B CCS PCM C Compiler , Version 3.249 m
0
Registered to:
Victronics Ltda, Ricardo Gonzalez Cepeda
[ Project: E:\ANH HOC Kl 9\Chuong trinh\ CCS C \ choptatportB. c

[ Files: 3, Statements: 7, Time: 1 Sec, Lines: 668
|Output files: ERR HEX SYM LST COF PJT TRE STA
10 Errors , 0 Warnings, Time: 1 Seconds
ROM: | 1%
RAM: | 3%
Y() Z[ \ )6b(A B*26 5*9 =)? B?-b( FK1)\

- F 2 ! 6 F 2 4 3 * * ,
\ h
( ) ) 4( ! ( ) ) 4( : ( <>> +
. 8 I ( ) ) + 8 4 6 * 4 +8 4 8 6 * 4
8 ,
A* Z
2
+ 8 G : ( <>> 4 EF : <>>\bT\g;, H 8 I + 8 G : ( <>>% 6 8
4 H 8 I + + 8 G,
J + 8 G H ) + 6! ( H I 4 : ( <>>% F ! + I
4 : ( <>> 8 I 4 4(% * 6 I * : ( <>> 6
X WinPic 800 - v 3.59
File Edit Device Utilities Settings Language Help
B® S
cs - * H s a PIC 16F l® l
^ G
H& Code
ti
/ A Data
"
* #4 H
$
dev
Setting
^ ^ 16 F877A
0 x0000 : 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF

0 x 0008 : 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
0 x 0020 : 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 9 . 9 .9 . 9 .9 . 9 . 9 9

0 x 0038 : 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF .
9 . 9 .9 . 9 .9 . 9 9 9
0 x0040 : 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF I . . . . . . .

? ? ? ? ? ? ?

0 x 0050 : 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 9 9 . 9 .9 . 9 9 .9 . 9
0 x0058 : 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF I .? . ? .? .? .? . * .?
V
0 x 0060 : 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
HcroJDM Pfciaccmmer - C 0M1
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# 8 + # 6 4 5 8 I + + 8 G ( 4(%
) + 5 6 6H 6
7
b inPic800 [ Hardware Settings
Selection of hardware I/O Bits to port
3DIP8 A Blockade configuration 17

ART2003 LPT C Use Vpp2 f”
ETT-HIGH VPP ICSP COM * < Use Vdd r~
ETT-LOW VPP ICSP 10x00 USB C Use Heir
GTP-04
GTP-07 State Name Bit ftddr - Inv- Default TEST
-
GTP 244
O Data DTR r r r
GTP-Lite
-
GTP USB [Plus] o Dataln CTS r
JDH Programmer
Pahlin
O Clock RTS +4 r r r
v
o Vpp TXD +3 r r r
-Rddr- COHl o Vpp2 +3 F r r
S 03 F8
O Vdd zl +4 r r r
o Heir ICSP ZJ +4 F r r
2<J cj y ® J [a
Cancel Apply edits
Y() Z[e\ ;E* 56V *@Ff*@- $-33?(A\

4 5 F + h$1 )) % 4 "((F 0 6 8 I ( ,
# 8 4 4 + ) 4( , b3 4 ) 4(
S?N<WW" 4 4 S?N F + S?N<WW",
2 4( S?N<WW" O : ( <>>
4 N F A( G 4 8 I 4 E F f, H 4(, # 8 4 1
) "FF @ Fi B G 4 8 I 4( ,
[* Z
2 + 8 G . * EF .( + ) 4 ! . 6 8 4 EF
, H *c * F 2 8 I) * ,# 8 4 # 6 [[ F # 6
6
IC -Prog 1.05C - Prototype Programmer
File Edit Buffer Settings Command Tools View Help
0BE
y Device
& ’ l Recent Devices
V IiI 59C11
Address - Prograi Hardware F3 Configuration
0000 : FFFF Hardware Check FFFF FFFF FFFF yyyyyyyy A
0008 : FFFF Options FFFF FFFF FFFF yyyyyyyy

0010 : FFFF Smartcard (Phoenix) yyyyyyyy
0018 : FFFF yyyyyyyy
0020 : FFFF
Clear Settings FFFF FFFF FFFF yyyyyyyy
0028 : yyyyyyyy
0030 : FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF yyyyyyyy
0038 : FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF yyyyyyyy
Checksum
|FFC0
v
Buffer 1 Buffer 2 | Buffer 3 | Buffer 4 Buffer 5

JDM Programmer on Com2 Device: 59C11 (37)
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# ! j 6F 4 %) ) + 5 6 66 6
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Hardware settings
Interface
Programmer:
| jDM Programmer - C Direct I/O
(* Sndows API
Ports Communication
~
C Com 1 V Invert Data Out
~
> Com 2
'
V Invert Data In
~
f '
Com 3 V Invert Clock
C Com 4 Invert MCLR

~
I/O Delay (10)

V Invert VCC
\
i
i i i
Invert VPP
OK Cancel
Y() Z[ \ ;E* 56V *@Ff*@- $-33?(A\

1 4 + 4( ]S" F + ) 4( 8 4 ( I * h1$% (
)) 6 4 h1$ )) , I % 6 4 A$S% A$C G
A$T + ) 3 , E % 4 4 : 56 " +( ))
! 8 *% 6 8 4 AJ, J 6 * 4 : 56 " % ! c )8 (
7A 1 F ,
$ + 8 6 ! ! * 8 F 4 . , 6 4
# 6 A( 68 I ( 4 + 8 G . ,
^ <3
jlC - Prog 1.05C - Prototype Programmer
File Edit Buffer
-y <
Settings
Device
Command Tools View Help
Recent Devices
r
r SDA 2546 a &

Address - Prograi Hardware F3 Configuration
0000 OOFF Hardware Check OOFF OOFF OOFF yyyyyyyy /v
0008 OOFF Options OOFF OOFF OOFF YYYYYYYY

0010 OOFF Smartcard (Phoenix) OOFF OOFF OOFF yyyyyyyy
0018 OOFF OOFF OOFF OOFF yyyyyyyy
0020 OOFF Clear Settings
OOFF OOFF OOFF yyyyyyyy
0028 OOFF OOFF OOFF OOFF OOFF OOFF OOFF OOFF yyyyyyyy
r CheckBox 8
Checksum
OOAO OOFF OOFF OOFF OOFF OOFF OOFF OOFF OOFF yyyyyyyy |FEOO
nona - finrir nnTnr nni? r nninr nnrp nnirir nniri? nncr v
Buffer 1 Buffer 2 Buffer 3 Buffer 4 Buffer 5

JDM Programmer on Com2 Device: SDA 2546 (58)
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$ + A( 66 , Pc ) ( $6 % + ( ! ! c
), 8 I) G 8 8 8 ,
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Options m
Drag & Drop | Smartcard Language Shell Misc
Confirmation ll '
Notification I l2C Programming | Shortcuts
Ask my confirmation when :
[7 Programming a device [ Overwriting a file
[ Erasing a device
Codeprotecting a critical device
OK Cancel
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4 0 F b F E h1$% 6 8 ) 4 (0 F -/7C>>>7D 1 ,J
4 0 F 1 H % F ( 6 ) ) + E ) F
j 68 I + 8 G,
O % 8 O) 6 k ) 4 ,1 % 6 48 +
! * 8 F 4 ,
IC -Prog 1.05C - Prototype Programmer
File Edit Buff ittings ommand Tools View
1
- y mm j SDA 2546
&
Address - Program Cc
0000: OOFF oo Options
*H v
l
Configuration
&
0008: OOFF 00
0010: OOFF 00
Confirmation J Notification l2C Programming Shortcuts j
0018: OOFF 00 Drag & Drop Smartcard Language Shell Misc
0020: OOFF 00
0028: OOFF 00 Options :
0030: OOFF 00
0038: OOFF 00 Process Priority
0040: OOFF 00 17 Enable NT /2000/XP Driver
( Normal
0048: OOFF 00 * 17 Enable Vcc control for JDM
0050: OOFF 00
High Make all outputs high (Combi)
0058: OOFF 00
0060: OOFF 00 C Realtime I” Select device from file
0068: OOFF 00
0070: OOFF 00
0078: OOFF 00
0080: OOFF 00 Confirm
0088: OOFF 00 CheckBox 8
0090: OOFF 00 Before this driver will work, you must restart IC-Prog. Checksum
0098: OOFF —
OOtT ul
IFEOO
OOAO: OOFF OOFF 0 Do you want to restart IC-Prog now ?
nnnfl . nnirr ruiFC n
Buffer 2 j Buffer 3 [ Yes j No

Buffer 1
JUIVI rruyrariirncr ui i
^ urnz “DSTICe: SDA 2546 (58)
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Confirm
IC-Prog driver is not installed . Do you want to install this driver now?
No
Y() Z[ `\ *0? T*g3 @?/-@\

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J * 8 4( . 6 8 4 4( 6
IC -Prog 1.05D - Prototype Programmer
File Edit Buffer Settings Command Tools View Help
& -a ^*
Address - Program Code
% H
^ dj, dj, PIC 16F877A
PIC 16F876 /V
jration
&
PIC 16F876A
0000 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF YYYY PIC 16F877
or:
0008 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF PIC 16F877A
YYYY
0010 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF YYYY
PIC 16C923
PIC 1GC924
3
0018 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF YYYY PIC 18F 242 nable:
0020 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF YYYY PIC 18F248
0028 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF YYYYYYYY
|VVK I OFF 3
0048 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF YYYYYYYY Fuses:
0050 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF YYYYYYYY I WDT
0058 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF YYYYYYYY v
r* FWRT
Address - Eeprom Data W BODEN
0000 FF FF FF FF FF FF FF FF YYYYYYYY A R? LVP
0008 FF FF FF FF FF FF FF FF YYYYYYYY r CPD
0010 FF FF FF FF FF FF FF FF YYYYYYYY r CP
0018 FF FF FF FF FF FF FF FF YYYYYYYY r DEBUGGER
0020 FF FF FF FF FF FF FF FF YYYYYYYY
0028 FF FF FF FF FF FF FF FF YYYYYYYY Checksum ID Value
0030 FF FF FF FF FF FF FF FF YYYYYYYY OFCF
0038 FF FF FF FF FF FF FF FF YYYYYYYY v Config word : 3FFFh
)
Buffer 1 Buffer 2 Buffer 3 ) Buffer 4 Buffer 5 )
JDM Programmer on Com1 Device: PIC 16F877 A (99)
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b3 4 4 S?N<WW"% 6 8 + N F .[ 4 A( EF G 4 &8 I 4 EF
, 0D 4(, # 8 4 )) .[ ) "FF @NgB G 4 8 I 4(
S?N<WW",
\ !" # $% & % " h
A* ! Z
!"#$%"& ' ( )#$* +,- . )#$* +,-
$ + 4 F +) + F , $ "& 8 4 F +) = +
• 8 I ,
• 8 I F ) 4 ,
• TF + )6 * F ,
• F + )6 * F ,
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O 3 ) ! 4 /"& @! * _ B ) !3 4 _ ,
*\ '()*+(,h
!"#$%"& F + ) 2 ! 48 I8 ) 8 I) + 8 % ( *
8 P 8 P8 O ) !"#$%"&, !"#$%"& + + 8 4 4 F 4
O F G ,
$ 2 F% I G ! !"#$%"&, / % 6 6 !"#$%"& F + 3
8 I 6 4F )F 2 + ) _ ! F ( ,
!"#$%"& 8 4 * + F , !"#$%"& ! 8 4 _ 8 O !
48 G f%^% ! * _ % 6 @>%S%C'B' ] ! 4 * ! 8 4
! 48 G f%l%'
a + * ) !"#$%"& ! 4 % % ( * 6 m nF
O) * + F %8 + + ( * 8 I 2c 6 %8 * 4 +
! F ( ,
+ + I! !"#$%"& F + ( / % ( / '
* ! 8 *8 I I 6 8 4 4 % 6 ! ! F (
% F +! + + 8 + 4 + o) ,
b3 4
- 8
] \
0H
J A 1A-]
(\S
- 6
S0H
] l
J
B\ "-.() /*0 1*21 3)*4 567h

0p- F + * F 4 8 4 F ! * , 0p- 8 4 +
%) 2 + F ( * 0p- % ! 6 ! + F 8 F +)
, 0p- I ( * F +) * + F ,
/ + 0p- ) + I )6 S + ) 6 C% G P ) 6 S% G !
)6 + ,/ ) + F %( * 8 * )6 * 0p- 8 ,
1\ 89: ;<21 => )?-.9 3@6(A % " h
$0"1 2 3 J3 c F
J3 o
E a P * EF + >q>> 8 >qWN
5 / :.: ! 6 @ ) F B
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+8 P O) EF <
! O 6 G
H J c )F +> S
4 4 F
`> F ! c * + :
`S F ! c * + E
$ G 8 `S
& 8 )
/A & /) .
1 & 5 . 5
*E(A Z[ \ > )?-.9 1*21 3)*() A)? 3@6(A % " \
Byte -oriented file register operations

13 8 7 6 0
OPCODE d f (FILE #)
d = o for destination W
d = l for destination f
f = 7-bit file register address
Bit-oriented file register operations

13 10 9 7 6 0
OPCODE b (BIT #) f (FILE #)
b = 3-bit bit address

f = 7-bit file register address
Literal and control operations

General
13 8 7 0
OPCODE k (literal)
k = 8-bit immediate value
CALL and GOTO instructions only

13 11 10 0
OPCODE k (literal)
k = 11-bit immediate value
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$0"1 2 3 / ( F * S?N<WW"
Mnemonic 14- Bit Opcode Status
Description Cycles Notes
Operands MSb LSb Affected
BYTE - ORIENTED FILE REGISTER OPERATIONS

ADDWF
ANDWF
.
f d
f, d
Add W and f
AND W with f
I
1
00
00
0111
0101
dfff
dfff
ffff
ffff
.z
C DC.Z 1,2
1,2
CLRF f Clear f 1 00 0001 lfff ffff z 2
CLRW Clear W 1 00 0001 Oxxx xxxx z
COMF
DECF
.
f d
f, d
Complement f
Decrement f
1
I
oo
oo
1001
0011
dfff
dfff
ffff
ffff
Z
Z
1,2
1,2
DECFSZ f, d Decrement f, Skip if 0 1( 2 ) oo 1011 dfff ffff 1,2, 3
INCF f, d Increment f 1 oo 1010 dfff ffff Z 1,2
INCFSZ f, d Increment f Skip if 0 1( 2 ) oo 1111 dfff ffff 1,2, 3
..
;
IORWF f d Inclusive OR W with f 1 oo 0100 dfff ffff Z 1,2

MOVF f d Move f 1 oo 1000 dfff ffff Z 1.2
MOVWF f Move W to f I 00 0000 lfff ffff
NOP No Operation 1 00 0000 OxxO 0 0 0 0
RLF f. dd Rotate Left f through Carry 1 oo 1101 dfff ffff C 1,2
RRF f.d Rotate Right f through Carry I oo 1100 dfff ffff C 1.2
SUBWF
SWAPF
f
f
.. d Subtract W from f
Swap nibbles in f
1
1
oo
00
0010
1110
dfff ffff
dfff ffff
.
C DC.Z 1,2
1.2
XORWF f .d Exclusive OR W with f I oo 0110 dfff ffff Z 1,2
BIT-ORIENTED FILE REGISTER OPERATIONS

BCF f. bb Bit Clear f 1 01 OObb bfff ffff 1,2
BSF
BTFSC
f
f
.. b
Bit Set f
Bit Test f, Skip if Clear
1
1 (2 )
01
01
Olbb
lObb
bfff
bfff
ffff
ffff
1,2
3
BTFSS f . b Bit Test f, Skip if Set 1 (2) 01 llbb bfff ffff 3
LITERAL AND CONTROL OPERATIONS
ADDLW k Add Literal and W I 11 11lx kkkk kkkk C,DC,Z
ANDLW k AND Literal with W I li 1001 kkkk kkkk Z
CALL k Call Subroutine 2 10 Okkk kkkk kkkk
CLRWDT Clear Watchdog Timer I oo 0000 0110 0100 TO,PD
GOTO k Go to Address 2 10 lkkk kkkk kkkk
IORLW k Inclusive OR Literal with W 1 li 1000 kkkk kkkk Z
MOVLW k Move Literal to W I li OOxx kkkk kkkk
RETFIE Return from Interrupt 2 oo 0000 0000 1001
RETLW k Return with Literal in W 2 li Olxx kkkk kkkk
RETURN Return from Subroutine 2 oo 0000 0000 1000
SLEEP Go into Standby mode 1 oo 0000 0110 0011 TO,PD
SUBLW k Subtract W from Literal 1 li 11Ox kkkk kkkk C,DC,Z
XORLW k Exclusive OR Literal with W 1 li 1010 kkkk kkkk Z
*E(A Z[]\ 624 3*S3 3*.O N-.()\

4 5 63 ! A 8 I @ 3 4 F $AbN AQ/% SB +
F F + H * , b3 4 F F + RSU 8 I 8 F + +
8 4 8 ! I H ) ( * + F 8 4 + F +) ,
4 5 63 F + 8 4 4 /$Q> 6 H
! / ) >,
4 5 63 8 I C ! +% ! + C 4 F -A ,
[* " # Z
, O 6 ! + :
• ( ( "11 : !
• / > ! Cgg
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• / 4 @:B i ! @:B
• + * * %1 %r
• o : O 6 !< +! c *F + :,
• ! + 4 S,
, : E
• ( ( "11:N E%
• / > E SCW% ∈
• / 4 @:B i @EB @ 6 B
• + * * %1 %r
• o : E, - `> F ! c * +
:% + `S F + E,
• ! + 4 S,
, " F O 6 :
• ( ( "11 : !
• / > ! Cgg
• / 4 @:B "-1 @!B@:B
• + * * r
• o :8 4 "-1 O 6 !< %! c *F +
:
• ! + 4 S,
, " F: N
• ( ( "-1:N E%
• / > E SCW% ∈
• / 4 @:B "-1 @EB @ 6 B
• + * * r
• o "-1 : E, - `> ! c *F +
:% `S ! c *F + E,
• ! + 4 S,
, H N
• ( ( & N E%
• / > E SCW% > W
• / 4 > @EZ [B
• + * * !
• o E H
• ! + 4 S,
E, 6 N
• ( ( &#N E%
• / > E SCW% > W
• / 4 S @EZ [B
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• + * * !
• o E8 4 6 F S,
• ! + 4 S,
, ! I) S N + * O S
• ( ( &/N## E%
• / > E SCW% > W
• / 4 * EZ [`S
• + * * !
• o E O S F ! *c + O F
-A ,
• ! + 4 S@CB,
, ! I) S N + * O >
• ( ( &/N# E%
• / > E SCW% > W
• / 4 * EZ [`>
• + * * !
• o E`> F ! *c + O F
-A ,
• ! + 4 S@CB,
, 4
• ( ( " !
• / > ! C>=W
• / 4 @ B i S /A#V ! ZS> >[V @ "/ Z= T[B@ ZSC SS[B
• + * * !
• o 4 , ST 8 P * @ iSB 8 4 + o H (,
/ (/ SS 8 P ZS> >[ 8 4 * + , * 8 4 4( +
"/ Z= T[,
• ! + 4 C,
K, H E
• ( ( QN E
• / > E SCW
• / 4 >> @EBV S r
• / 4 * * r
• o D E + r8 4 6 ,
• ! + 4 S,
!, H :
• ( ( Q:
• / !
• / 4 >> @:B% S r
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• + * * r
• o H : + rF S,
• ! + 4 S,
F, H :1/
• ( ( Q:1/
• / !
• / 4 >> :1/V > & 8 ) * :1/V S VS
• + * * %
• o F Q:1/ 6 H 8 + :1/ +H F 8 )
* :1/, % 8 4 6 F S,
• ! + 4 S,
), + E
• ( ( A$N E%
• / > E SCW% ∈
• / 4 @ B@ 6B
• + * * r
• o +S E, - `> ! c *F + :, -
`S ! c *F + E,
• ! + 4 S,
, *) E
• ( ( 10 N E%
• / > E SCW% ∈
• / 4 @EB d S @ 6 B
• + * * r
• o *) E 8 S, - `> ! c *F + :,
- `S ! c *F + E,
• ! + 4 S,
, *) E + * O >
• ( ( 10 N#r E%
• / > E SCW% ∈
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