5 4 3 2 1

D D

Screw Holes

C C
Optical Points
1

1
5 9 5 9 5 9 5 9 OP1 OP2 OP3 OP4 OP5 OP6 OP7
OP OP OP OP OP OP OP
4 8 4 8 4 8 4 8

3 7 3 7 3 7 3 7

2 6 2 6 2 6 2 6
OP8 OP9 OP10 OP11 OP12 OP13 OP14
H1 H2 H3 H4
OP OP OP OP OP OP OP
HOLE-V8 HOLE-V8 HOLE-V8 HOLE-V8

B B

A
Benq Corporation A
Project Code Model Name OEM/ODM Model Name
99.L8372.001 Q7T3-FP767S NA
Title
INTERFACE BOARD
Size PCB P/N PCB Rev. Document Number R ev.
<Size> 48.L8301.S11 0
S11 99.L8372.000-C2-204-004

Date: Tuesday, February 11, 2003 Sheet 1 of 5

Prepared By Reviewed By Approved By
ANGEL HU JAMSON LIU DAVEN WU
5 4 3 2 1
 5 4 3 2 1

+3.3V

2
D N1 DN2 D N3
3 3 3

BAV99 BAV99 BAV99

1
B+ R4 56 C2 0.01U 50V K
BLUE+

D R1 D
+3.3V 75
R- R7 22 C3 0.01U 50V K
RED-

2
G+ R8 56 C4 0.01U 50V K
GREEN+
DN100
3
R2
BAV99 75
R10

1
G- 22 C5 0.01U 50V K
GREEN-
+3.3V

D N4 J1
2 1 PC5V TP1 2 1 TP2
TP3 4 3 TP4 R+ R12 56 C6 0.01U 50V K
RED+
BAV70LT1 TP5 6 5 TP6
3

2
8 7 TP7 R3
D1 TP8 10 9 TP9
12 11 TP10 75
Cable-Detect
TZMC5V1 TP11 14 13 R13
C1 16 15 B- 22 C7 0.01U 50V K
BLUE-
1
0.1U
16V K U1 R5 R6
1 8 2.7K 2.7K CON16
A0 VCC
2 A1 WP 7

3 6 R9 47
A2 SCL
4 5 R11 47
VSS SDA
AT24C02A
2

C8 C9
47P 47P D2 D3
50V J 50V J +3.3V
TZMC5V1 TZMC5V1
DSUB_SDA
1

C10
DSUB_SCL 0.1U
C C
16V K

14

14
U2A U2B
R14 1 2 3 4 VS
100
74LVC14A 74LVC14A

14

14
7

7
U 2C U2D
R15 5 6 9 8 HS
100
2

74LVC14A 74LVC14A
D4 R16 D5 R17 C11 C12

7
47P 47P
TZMC5V1 10K TZMC5V1 10K 50V J 50V J
1

+3.3V

+3.3V
B B

2
D N6
D N5 2 1
J2 DVIPC5V
3 BAV99
RX0- RX0M
RX2+ TP12 2 1 TP13 BAV70LT1
RX2-

3
2
RX1+ TP14 4 3 TP15 RX1-
RX0+ TP16 6 5 TP17 D N7
RX0-
1

8 7 3 BAV99
RX0+ RX0P
10 9

2
12 11 TP18
14 13 D N8
1

16 15 TP19 3 BAV99 C13

DVISCL RX1- RX1M
18 17 TP20 0.1U R18 R19
DVISDA U3
2
TP21 R20 10K 16V K OPEN 4.7K 4.7K
20 19
22 21 D N9 1 8
1

TP22 TP23 BAV99 A0 VCC

RXC- 24 23 RXC+ RX1+ 3 RX1P
2 A1 WP 7
2061106212 2
DN10 3 6 DVISCL
1

A2 SCL
2

3 BAV99
RX2- RX2M
D6 D7 D8 4 5
2 VSS SDA DVISDA
TZMC5V1 TZMC5V1 TZMC5V1 DN11 AT24C02A
1

3 BAV99
RX2+ RX2P
1

DN12
1

DVIPC5V 3 BAV99
RXC- RXCM
2

DN13
1

3 BAV99
RXC+ RXCP
1

A A

Benq Corporation
Project Code Model Name OEM/ODM Model Name
99.L8372.001 Q7T3-FP767S NA
Title
INTERFACE BOARD
Size PCB P/N P CB Rev. Document Number Rev.
<Size> 48.L8301.S11 0
S11 99.L8372.000-C2-204-004

Date: Tuesday, February 11, 2003 Sheet 2 of 5

Prepared By Reviewed By Approved By
ANGEL HU JAMSON LIU DAVEN WU
5 4 3 2 1
 5 4 3 2 1

+3.3V +3.3V

L1 L2
3.3V_SDDS 3.3V_DDDS
BEAD BEAD

1
C15 C16 C18 C19
+ C14 0.1U 0.1U + C17 0.1U 0.1U
22U 16V K 16V K 22U 16V K 16V K
16V 16V

2
+2.5V +3.3V
+3.3V
L3
3.3V_RDDS
BEAD C20
0.1U D CLK R21 0
DCLK_TTL

150

146
144

141
139

188
182
176
155
153
203
134

148

111
129
16V K

88
26

20
37
53
67
81
97
2
D +3.3V C21 C22 D
47P 47P

VDD_RX0_2.5
VDD_RX1_2.5
VDD_RX2_2.5
AVDD_RPLL

AVDD_SDDS
VDD_SDDS_3.3

AVDD_DDDS
VDD_DDDS_3.3

VDD1_ADC_2.5
VDD2_ADC_2.5
CVDD
CVDD
CVDD
CVDD

VDD_DPLL_3.3
RVDD
RVDD
RVDD
RVDD
RVDD
RVDD
RVDD
RVDD
RVDD
L4 OPEN OPEN
3.3V_RGB 160 AVDD_ADC

5
BEAD 164
+ C23 C24 C25 C26 C27 AVDD_BLUE
168 AVDD_GREEN
22U 0.1U 0.1U 0.1U 0.1U 172
16V 16V K 16V K 16V K 16V K AVDD_RED
118

4
DCLK/TCON_OCLK D EN
157 SGND_ADC DEN/TCON_ECLK 115 4 R N1 5 DEN_TTL
158 117 D HS 3 6 C N1 C N2 C N3 C N4 CN5 C N6
AGND_ADC DVS/TCON_FSYNC DHS_TTL
161 116 DVS 2 7
AGND_BLUE DHS/TCON_LP DVS_TTL
+3.3V 165 1 8 22P OPEN 22P OPEN 22P OPEN 22P OPEN 22P OPEN 22P OPEN
AGND_GREEN
169 AGND_RED PD47/OB7 110 100 1 100 8 OB7
L5 109 2 7
PD46/OB6 OB6
3.3V_DVI 173 108 3 6
AVDD_IMB PD45/OB5 OB5

1
BEAD 181 107 4 5
AVDD_RX2 PD44/OB4 R N2 OB4
+ C28 C29 C30 C31 C32 187 AVDD_RX1 PD43/OB3 106 1 100 8 OB3
22U 0.1U 0.1U 0.1U 0.1U 193 105 2 7
AVDD_RX0 PD42/OB2 OB2
16V 16V K 16V K 16V K 16V K 196 104 3 6 OB1

2
AVDD_RXC PD41/OB1
PD40/OB0 103 4 5 OB0
175 RN3
AGND_IMB
+2.5V L6 178 AGND_RX2 PD39/OG7 102 1 100 8 OG7
2.5V_RXPL 184 101 2 7
AGND_RX1 PD38/OG6 OG6

1
BEAD C34 190 100 3 6
AGND_RX0 PD37/OG5 OG5
+ C33 0.1U 197 99 4 5
AGND_RXC PD36/OG4 RN4 OG4
22U 16V K 198 AGND_RXPLL PD35/OG3 96 1 100 8 OG3
16V 95 2 7 OG2

2
+3.3V PD34/OG2
PD33/OG1 94 3 6 OG1
199 VDD_RXPLL_2.5 PD32/OG0 93 4 5 OG0
R N5
+3.3V C35 4.7P J
PD31/OR7 92 1 100 8 OR7
149 AVSS_RPLL PD30/OR6 91 2 7 OR6
+3.3V +3.3V +3.3V +3.3V +3.3V 145 90 3 6
AVSS_SDDS PD29/OR5 OR5
140 AVSS_DDDS PD28/OR4 87 4 5 OR4
R22 R24 86 RN6 1 100 8
PD27/OR3 OR3
14.318MHZ Y1 2.7K 85 2 7
PD26/OR2 OR2
1KF R25 R26 R27 R28 R29 113 84 3 6
PPWR PD25/OR1 OR1
114 PBIAS PD24/OR0 83 4 5 OR0
2

Re set 10K 10K 10K 10K 100K R N7

1 2N3906 OPEN OPEN OPEN C36 4.7P J TCLK 152
Q2 Circuit TCLK
XTAL 151 XTAL PD23/EB7 80 1 100 8 EB7
C 79 2 7 EB6
C
3

PD22/EB6
VOL_ON/OFF 206 GPIO20/HDATA3 PD21/EB5 78 3 6 EB5
R69 51K 207 77 4 5
LVDS_EN GPIO19/HDATA2 PD20/EB4 RN8 EB4
BANK 208 GPIO18/HDATA1 PD19/EB3 76 1 100 8 EB3
1 75 2 7
LED_GRN OPEN
BL_ON 205
GPIO17/HDATA0
GPIO16/HFS
U4 PD18/EB2
PD17/EB1 74 3 6
EB2
EB1
R31 R68 C37 R99 4.7K 204 73 4 5
Cable-Detect GPIO22/HCLK PD16/EB0 R N9 EB0
0.1U
3KF 10K 16V K
DSUB_SCL
R32 0 6 DDC_SCL PD15/EG7 72 1 100 8 EG7
R33 0 7 71 2 7
LED_ORG DSUB_SDA DDC_SDA PD14/EG6 EG6
PD13/EG5 70 3 6 EG5
Res et 5 69 4 5
4
RESETn
GPIO21/IRQn GM2120 PD12/EG4
PD11/EG3 66
65
RN10 1 100
2
8
7
EG4
EG3
PD10/EG2 EG2
P.2 RED+ 171 RED+ PD9/EG1 64 3 6 EG1
+3.3V 170 63 4 5
P.2 RED- RED- PD8/EG0 RN11 EG0
P.2 GREEN+ 167 GREEN+
2

1N4148 166 62 1 100 8

U9 P.2
P.2
GREEN-
BLUE+ 163
GREEN-
BLUE+
710212000E PD7/ER7
PD6/ER6 61 2 7
ER7
ER6
1 5 R70 D9 162 60 3 6
NC VDD P.2 BLUE- BLUE- PD5/ER5 ER5
10K 137 59 4 5
P.2 HS HSYNC PD4/ER4 RN12 ER4
2 P.2 VS 136 58 1 100 8 ER3
1

VSS VSYNC PD3/ER3

159 ADC_TEST PD2/ER2 57 2 7 ER2
3 NC RES 4 PD1/ER1 56 3 6 ER1
P.2 RXCP 194 RXC+ PD0/ER0 55 4 5 ER0
195 RN13
V6300L OPEN P.2 RXCM RXC-
C101 RX2P 179
1U P.2 RX2+
RX2M 180 119 +3.3V +3.3V
P.2 RX2- TCON_OSP
Re set 10V Z RX1P 185 120
P.2 RX1+ TCON_OPOL

1
Circuit P.2 RX1M 186 RX1- TCON_OINV 121
P.2 RX0P 191 RX0+ TCON_ESP 122
192 123 R34 R35
P.2 RX0M RX0- TCON_EPOL
124

8
+3.3V TCON_EINV 10K 10K
TCON_RSP2 125
3.3V_DVI R36 1KF 174 126 OPEN C N7 C N8 C N9 CN10 CN11 CN12
REXT TCON_RSP3 22P OPEN 22P OPEN 22P OPEN 22P OPEN 22P OPEN 22P OPEN
TCON_RCLK 127
RMA DDR[0..15] RMADDR15 8 49
ROM_ADDR15 GPIO10/TCON_ROE3 LCD_ON
RMADDR14 9 48
ROM_ADDR14 GPIO9/TCON_ROE2 KEY_EXIT
RMADDR13 10 128
R37 R38 R39 RMADDR12 ROM_ADDR13 TCON_ROE
11 ROM_ADDR12
RMADDR11 12
B 10K 10K 10K RMADDR10 ROM_ADDR11 RXD B
U6 SST 39VF010 13 44
RMDATA[0..7]

RMADDR9 ROM_ADDR10 GPIO4/UART_D1 TXD

14 ROM_ADDR9 GPIO5/UART_D0 45
FLASH_WE 31 RMADDR8 15
WE ROM_ADDR8 SCL
GPIO13 52
BANK 30 RMADDR7 16 51 SDA
NC/A17 RMADDR6 ROM_ADDR7 GPIO12
2 A16 17 ROM_ADDR6 GPIO8/IRQINn 39 I_KEY
RMADDR15 3 RMADDR5 18 50 FLASH_WE +3.3V
+3.3V RMADDR14 A15 RMDATA7 RMADDR4 ROM_ADDR5 GPIO11
29 A14 DQ7 21 19 ROM_ADDR4 GPIO7 47 KEY_DEC
RMADDR13 RMDATA6 RMADDR3 C38
28 A13 DQ6 20 22 ROM_ADDR3 GPIO6/EXTCLK 46 KEY_INC
RMADDR12 4 19 RMDATA5 RMADDR2 23 43
A12 DQ5 ROM_ADDR2 GPIO3/TIMER1 KEY_MENU
RMADDR11 25 18 RMDATA4 RMADDR1 24 42 0.1U
A11 DQ4 ROM_ADDR1 GPIO2/PWM2 PW_SW
RMADDR10 23 17 RMDATA3 RMADDR0 25 41 16V K
A10 DQ3 ROM_ADDR0 GPIO1/PWM1 VOLUME
RMADDR9 26 15 RMDATA2 40 R40 R41
A9 DQ2 GPIO0/PWM0 BRT_ADJ U7
R42 R43 R44 RMADDR8 27 14 RMDATA1 RMDATA7 28
RMADDR7 A8 DQ1 RMDATA0 RMDATA6 ROM_DATA7 10K 10K
5 A7 DQ0 13 29 ROM_DATA6 8 VCC NC 1
10K 10K 10K RMADDR6 6 RMDATA5 30 R45 R46 R47 R48 R49 R50 R51 7 2
RMADDR14 RMADDR5 A6 RMDATA4 ROM_DATA5 SCL WP NC
7 A5 31 ROM_DATA4 201 6 3
RMADDR9 RMADDR4 RMDATA3 Int_Test CLKOUT 10K 10K 10K 10K 10K 10K 10K SDA SCL NC
8 A4 32 ROM_DATA3 5 SDA GND 4
RMADDR8 RMADDR3 9 RMDATA2 33
RMADDR2 A3 RMDATA1 ROM_DATA2
10 34 200
GND1_ADC
GND2_ADC

VSS_DDDS
VSS_SDDS
VSS_DPLL

A2 ROM_DATA1 N/C
GND_RX2
GND_RX1
GND_RX0

RMADDR1 11 RMDATA0 35 142 AT24C16 16K

+3.3V RMADDR0 A1 +3.3V ROM_DATA0 N/C
12 A0 NC 1 Reserved 132
RVSS
RVSS
RVSS
RVSS
RVSS
RVSS
RVSS
RVSS
RVSS

CVSS
CVSS
CVSS
CVSS
CVSS

ROM_OEn 36 131
R52 ROM_OEn Reserved
24 OE VCC 32
10K 22 16 C39
CE GND 0.1U +3.3V
3
21
38
54
68
82
98
112
130

27
89
133
135
202

156
154
177
183
189

147
143
138

16V K

J3

TXD 3
RXD 2
1
32-Pin PLCC Socket CON_3P_S
FLASH/ Prom-Jet Socket
RS232

BOOTSTRAP SIGNALS
ADDRESS NAME SET DESCRIPTION
A A
ROM_ADDR(4:0) USER_BITS(4:0) x Available for reading from a status register
ROM_ADDR5 Reserved x If using 6-wire host protocol, program this bit to 0
ROM_ADDR6 SCLPOL x Determines polarity of HCLK signal
Benq Corporation
ROM_ADDR7 HOST_PROTOCOL 0 If using 6-wire host protocol, program this bit to 1 Project Code Model Name OEM/ODM Model Name
ROM_ADDR8 HOST_PORT_EN 1 GPIO(22:16) is on "Host Port" pins 99.L8372.001 Q7T3-FP767S NA
+2.5V +3.3V
Close to respective power Pins Close to respective power Pins Title
ROM_ADDR9 OCM_START 1 1 = OCM becomes active after OCM_CLK is stable INTERFACE BOARD
ROM_ADDR(12:10) USER_BITS(7:5) x Available for reading from a status register Size PCB P/N P CB Rev. Document Number Rev.
1

C42 C43 C44 C45 C46 C47 C48 C49 C50 C51 C52 C53 C54 C55 C56 C57 C58 C59 C60 <Size> 48.L8301.S11 0
ROM_ADDR13 OSC_SEL 0 0 = XTAL and TCLK pins are connected + C40 + C41 S11 99.L8372.000-C2-204-004
22U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 22U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
ROM_ADDR14 OCM_ROM_CFG(1) 1 1 = All 48K of ROM is in external ROM 16V 16V K 16V K 16V K 16V K 16V K 16V K 16V K 16V K 16V K 16V 16V K 16V K 16V K 16V K 16V K 16V K 16V K 16V K 16V K 16V K Tuesday, February 11, 2003 3 5
Date: Sheet of
2

Prepared By Reviewed By Approved By

ANGEL HU JAMSON LIU DAVEN WU
5 4 3 2 1
 5 4 3 2 1

14
U2E
11 10 R53 200
LED_GRN
74LVC14A

14
7
U2F
13 12 R54 100 J4
LED_ORG
D 74LVC14A 1 D
2

7
L21 R57 1K 3
KEY_INC L22 R58 1K
KEY_MENU 4
L19 R55 1K 5
KEY_EXIT L20 R56 1K
KEY_DEC 6
L24 R60 1K 7
PW_SW L23 R59 1K
I_KEY 8
9
C63 C64 C61 C62 C66 C65 C67 C68
100P 100P 100P 100P 100P 100P 0.1U 0.1U 2060091109
50V J 50V J 50V J 50V J 50V J 50V J 16V K 16V K

R23

C C

J5
1 PWM output first, it must be "H" when no work.
BRT_ADJ
2 BL_ON
3 LCD_ON
4
5
6
7
8 L15
9 +5V
10
11 L18
12 +3.3V U5
13 IRU1206-25CY
VOLUME
14 VOL_ON/OFF +3.3V
1 3

GND
GND
IN OUT +2.5V
B B

1
20.72060.207
C70 C71 + C79

4
2
0.1U K 0.1U K 10U
16V

2
1

+ C69 + C72
C73 C74 C75 C76 C77 10U C78 10U C81
0.1U 0.1U 0.1U 0.1U 0.1U 16V 0.1U 16V 0.1U
2

50V Z 50V Z 50V Z 50V Z 50V Z 50V Z 50V Z

OPEN OPEN

Benq Corporation
Project Code Model Name OEM/ODM Model Name
99.L8372.001 Q7T3-FP767S NA
Title
A A
INTERFACE BOARD
Size PCB P/N PCB Rev. Document Number R ev.
<Size> 48.L8301.S11 0
S11 99.L8372.000-C2-204-004

Date: Tuesday, February 11, 2003 Sheet 4 of 5

Prepared By Reviewed By Approved By
ANGEL HU JAMSON LIU DAVEN WU
5 4 3 2 1
 5 4 3 2 1

+3.3V
IC1
1 56 +5V +5V
VCC TXIN4 ER4

ER7 2 TXIN5 TXIN3 55 ER3

C82 T.L.
0.1U 3 54 U8
ER5 TXIN6 TXIN2 ER2
16V K 1 8
R61 S T.L. D
D EG0 4 TXIN7 GND 53 D
100K 2 7
S D LCD_PW
5 GND TXIN1 52 ER1

1
3 S D 6
6 51 + C83 C84
EG1 TXIN8 TXIN0 ER0 47U
4 5 0.1U
G D 16V 16V K
EG2 7 50 ER6

2
+3.3V TXIN9 TXIN27
GF4435
EG6 8 TXIN10 LVDS GND 49

3
9 48 R62 1 Q1
VCC TXOUT0- E0- LCD_ON
20K 2N3904
EG7 10 47 E0+

2
TXIN11 TXOUT0+

1
C86 +3.3V
0.1U 11 46 + C85 R63
EG3 TXIN12 TXOUT1- E1-
16V K 10U 10K
12 45 16V
EG4 E1+

2
TXIN13 TXOUT1+ L7
+3.3V 13 44
GND LVDS VCC BEAD

1
EG5 14 TXIN14 LVDS GND 43
C87 + C88
15 42 0.1U 22U
EB0 TXIN15 TXOUT2- E2-
R64 16V K 16V

2
OPEN 16 41
EB6 TXIN16 TXOUT2+ E2+
17 VCC TXCLK OUT- 40 ECLK-

EB7 18 TXIN17 TXCLK OUT+ 39 ECLK+

R65 19 38
EB1 TXIN18 TXOUT3- E3-
10K 20 37
EB2 TXIN19 TXOUT3+ E3+
+3.3V
21 GND LVDS GND 36

EB3 22 TXIN20 PLL GND 35

L8
EB4 23 TXIN21 PLL VCC 34
BEAD

1
EB5 24 TXIN22 PLL GND 33
C +3.3V C89 + C90 C
25 32 0.1U 22U
TXIN23 PWR DWM 16V K 16V

2
26 VCC TXCLK IN 31 DCLK_TTL

DHS_TTL 27 TXIN24 TXIN26 30 DEN_TTL

L11 C91
0.1U 28 29
DVS_TTL TXIN25 GND
BEAD 16V K
THC63LVDM83A

J6
LVDS_EN
O0- 2 1 E3+
"L" Falling edge trigger O0+ 4
6
3
5
E3-
O1- ECLK+
"H" Rising edge trigger O1+ 8
10
7
9
ECLK-
O2- E2+
O2+ 12 11 E2-
OCLK- 14 13 E1+
OCLK+ 16 15 E1-
O3- 18 17 E0+
+3.3V 20 19
O3+ E0-
IC2 20D0017210
1 VCC TXIN4 56 OR4

OR7 2 TXIN5 TXIN3 55 OR3

C94 T.L.
0.1U 3 54
OR5 TXIN6 TXIN2 OR2
16V K
OG0 4 TXIN7 GND 53

5 GND TXIN1 52 OR1

OG1 6 TXIN8 TXIN0 51 OR0

OG2 7 TXIN9 TXIN27 50 OR6

B +3.3V J7 B

OG6 8 TXIN10 LVDS GND 49

8
9 VCC TXOUT0- 48 O0- 7
6
OG7 10 TXIN11 TXOUT0+ 47 O0+ 5
C95 +3.3V 4
0.1U 11 46 3
OG3 TXIN12 TXOUT1- O1-
16V K 2 LCD_PW
OG4 12 TXIN13 TXOUT1+ 45 O1+ 1
L12
+3.3V 13 44
GND LVDS VCC 1
BEAD 2060089108
OG5 14 TXIN14 LVDS GND 43
C96 + C97
15 42 0.1U 22U
OB0 TXIN15 TXOUT2- O2-
R66 16V K 16V
2

OPEN 16 41
OB6 TXIN16 TXOUT2+ O2+
17 VCC TXCLK OUT- 40 OCLK-

OB7 18 TXIN17 TXCLK OUT+ 39 OCLK+

R67 19 38
OB1 TXIN18 TXOUT3- O3-
10K 20 37
OB2 TXIN19 TXOUT3+ O3+
+3.3V
21 GND LVDS GND 36

OB3 22 TXIN20 PLL GND 35

L13
OB4 23 TXIN21 PLL VCC 34
BEAD
1

OB5 24 TXIN22 PLL GND 33

+3.3V C98 + C99
25 32 0.1U 22U
TXIN23 PWR DWM 16V K 16V
2

26 VCC TXCLK IN 31 DCLK_TTL

L14 27 30
DHS_TTL TXIN24 TXIN26 DEN_TTL
C100
A BEAD 0.1U A
DVS_TTL 28 TXIN25 GND 29
16V K
THC63LVDM83A

Benq Corporation
Project Code Model Name OEM/ODM Model Name
99.L8372.001 Q7T3-FP767S NA
Title
INTERFACE BOARD
Size PCB P/N P CB Rev. Document Number Rev.
<Size> 48.L8301.S11 0
S11 99.L8372.000-C2-204-004

Date: Tuesday, February 11, 2003 Sheet 5 of 5

Prepared By Reviewed By Approved By
ANGEL HU JAMSON LIU DAVEN WU
5 4 3 2 1