Behavioral Simulator

of Analog-to-Digital Converters
Grzegorz Zareba
Olgierd. A. Palusinski

University of Arizona

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 Outline
ƒ Introduction and Motivation

ƒ Behavioral Simulator of Analog-to-Digital Converters

ƒ Basic Building Modules of Analog-to-Digital Converters

ƒ Example of sample-and-hold module

ƒ Simulation of Analog-to-Digital Converters

ƒ Example of 8-bit multistage A/D converter
ƒ Example of 8-bit pipelined A/D converter

ƒ Summary

ƒ Future work

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 Introduction
Simulation Levels

ƒ Behavioral level simulation Simulink,

ƒ circuit is described by structural and behavioral blocks Verilog, VHDL
ƒ Register level simulation
ƒ circuit is defined by combinational and sequential components
ƒ sequence of register transfers and arithmetic operations is used to describe
circuit operation
ƒ Switch level simulation
ƒ CMOS transistors are simplified and seen as gate-controlled switches
ƒ Gate level simulation
ƒ transistors are grouped into logic gates
ƒ Electrical level simulation
ƒ delivers the greatest amount of details about the circuit PSpice,
ƒ requires solving a system of nonlinear ordinary differential MicroCap
equations

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 Introduction
Available Simulation Tools

Two options are available for behavioral simulation of A/D converters:

ƒ Commercial Simulation Tools (Matlab/Simulink, HDL-based simulators)

ƒ Dedicated simulators (capable to simulate only one particular A/D converter)

Disadvantages of Commercial Simulation Tools:

ƒ expensive in terms of computer time
ƒ translation of simulation language is needed
ƒ limited by simulation language capability

Disadvantages of Dedicated simulators:

ƒ excessive programming effort needed for implementation of converter model
ƒ allows for simulation only one dedicated A/D converter

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 Introduction
Simulations with Commercial Simulation Tools

Simulation languages: VHDL, VHDL-A, Verilog, etc

Graphical languages: Simulink, LabView, VEE, etc

if v_div == v_first/I;
t_res(k,1)=v_div;
t_res(k,2)=i; Matlab
k=k+1;
end;

module test;
reg [4:0] inreg;
wire [1:0] outwire; Verilog
integer I;

Simulink
Additional processing

Design description
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 Introduction
New Approach in Behavioral Modeling of A/D Converters

A new approach in behavioral modeling of A/D converters

is based on utilization of Dynamic Linked Libraries (DLLs) Any programming
to encapsulate behavior of basic blocks of A/D converters language

DLL modules

Design description
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 Introduction
New Approach in Behavioral Modeling of A/D Converters

What is a DLL module? A library of executable functions or

data that can be used by a Windows
application

Advantages:
• Any programming environment can be used to create a DLL module
• DLL module can be modified without having to update the simulator
• Executable module

Disadvantage?
• It seems that creation of a DLL module requires a proficiency in programming

*.exe *.dll
Simulator + BBMs = Executable model of A/D converter

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Behavioral Simulator of A/D Converters
Structure of the simulator

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 Behavioral Simulator of A/D Converters
Representation of A/D converters

Simulation parameters:
• Simulation time
• Simulation mode

Parameters of BBMs:
• input offset voltage
Connectivity of BBMs [BEGIN] • droop rate
name="SubADC"
id=23
• slew rate
[BEGIN] type=Block_SUBADC • hysteresis
name="Vref N"
id=27 <in>
• delay
type=Block_VREFN in[1]=27:out[1]
in[2]=15:out[1]
<out>
out[1]=31:in[2] <out>
out[1]=23:in[1] out[1]=14:in[1]
out[1]=24:in[1] out[2]=14:in[2]
out[1]=25:in[1]
out[1]=26:in[1] <ctrl>
ctrl[1]=3:out[1]
[END] [END]

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Behavioral Simulator of A/D Converters
Basic Building Modules of A/D converters

Input signal applied at the input of A/D converter:

• sin
• ramp

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Behavioral Simulator of A/D Converters
BBMs – Example of BBM written in C++

if( bCtr )
{ // Block activated by the control line
if( bSample )
{
dOutput = dInput;
bSample = false;
}
else
{ More flexible than existing
dOutput = dInput;
simulation languages
bSample = true;
}
}
else // Block activated by the output line
{
if( bSample )
dOutput = dInput;
}

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 Basic Building Modules
Sample-and-Hold Module

Typical Sample-and-Hold circuit Approximation with RC circuit

tacq
τ =−
ln ( 0.001)

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 Basic Building Modules
Sample-and-Hold Module – Behavioral model

Sampling mode: charging capacitor CH

⎛ ∆t
⋅ln ( 0.001) ⎞
VCH ( t ) = VCH ( t − ∆t ) + (Vin ( t ) + Voff ( t ) ) ⎜ 1 − e ⎟
tacq

⎜ ⎟
⎝ ⎠

Sampling mode: discharging capacitor CH

∆t
ln ( 0.001)
(
VCH ( t ) = VCH ( t − ∆t ) − V in
(t )) ⋅ e tacq
+ VCH ( t − ∆t )

Holding mode: discharging capacitor CH

VCH ( t ) = VCH ( t − ∆t ) − Dr ⋅ ∆t

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 Basic Building Modules
Sample and Hold Module – Simulation results

Simulation results Test circuit

5
Vout, Vctrl [V]

0
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 3.8
t[us]

4
Vin,Vout[V]

0
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38
t[us]

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 Basic Building Modules
Other Modules

Analog BBMs: Mixed-Signal BBMs:

ƒ Comparator ƒ Sub-ADC
ƒ Sample-and-Hold ƒ Sub-DAC
ƒ Analog Switch ƒ Binary Encoder
ƒ Voltage Reference Control BBMs:
ƒ Folding circuit
ƒ Input Signal
ƒ Summation
ƒ Register
ƒ Subtraction
ƒ Clock
Digital BBMs: ƒ Clock Delay
ƒ Digital Register ƒ Noise Generator
ƒ Shift Register

Flash, multi-stage, pipelined, and folding A/D converters

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 Basic Building Modules
Graphical representation of BBMs

BBM’s (Behavior encapsulated in Dynamic Link Library):

Setting Parameters for

Comparator Module:
ƒ Gain
ƒ Input Offset Voltage
ƒ Slew rate
ƒ Min Output Amplitude
ƒ Max Output Amplitude
ƒ Min Hysteresis

ƒ Max Hysteresis

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Behavioral Simulator of A/D Converters
Simulator core

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Behavioral Simulator of A/D Converters
Simulation Module – Multilevel dynamic list

PSpice Schematic

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Behavioral Simulator of A/D Converters
Simulation Module – Simulation setup

Simulation Setup:
ƒ Simulation Time

ƒ Simulation Mode

ƒ Input Signal type

ƒ Clock Frequency

ƒ Output File

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 Behavioral Simulator of A/D Converters
Post-Processing Module

Post-processing: Required circuit configuration:

ƒ Localization of code transition points
ƒ Calculation of DNL and INL DUT
ƒ Determination of offset and gain error
ƒ Calculation of SFDR

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Simulation of A/D Converters
8-bit Multistage A/D Converter

17 Comparators
17 Analog Switches
1 Reference Voltage

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Simulation of A/D Converters
8-bit Multistage A/D Converter

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 Simulation of A/D Converters
8-bit Multistage A/D Converter – Simulation results
DNL Error

P III, 733 MHz, 0.15

0.1
256 MB RAM 0.05

D N L [L S B ]
0
-0.05
-0.1
-0.15
-0.2
0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240

Input codes

INL Error

0.2
0.15
0.1

I N L [V L S B ]
0.05
0
-0.05
-0.1
-0.15
-0.2
0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240

Input codes

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 Simulation of A/D Converters
8-bit Multistage A/D Converter – Simulink

Simulink (ideal model) – 6 min. Behavioral Simulator – 10 sec.

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 Simulation of A/D Converters
Pipelined A/D Converters

Basic elements:
• Sample-and-hold
• Sub-ADC
• Sub-DAC
• Summation
• Amplifier
• Shift register
• Digital correction

VFS
Vres = Vin − Dk (Vin ) ⋅ [V ]
2k − 1

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Simulation of A/D Converters
8-bit Pipelined A/D Converter - Schematic

2-2-2-2-bit configuration
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 Simulation of A/D Converters
8-bit Pipelined A/D Converter – Simulation results

Imperfections:
• Synchronization errors
• Input offset voltage

Imperfections:
• Stability of Vref
• Gain error
• Input offset voltage

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 Summary
ƒ New approach in behavioral simulation of A/D Converters
ƒ New simulation algorithm based on combination of an event driven
scheme and data flow technique

ƒ Advanced method for encapsulating BBMs in DLL modules

ƒ Significant reduction of circuit preparation and simulation time
ƒ Open simulator architecture, which allows adding new BBMs without
modification of the simulator core

ƒ Simulation package capable to simulate various architectures of A/D

converters as well as analog, digital and other mixed-signal circuits

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 Future work
ƒ Implementation of load effect

ƒ Construction of BBMs designated to support simulation of D/A

converters (current source, analog switch, etc.)

ƒ Construction of post-processing module for D/A converters

ƒ Implementation of an interface to PSpice simulator

ƒ Implementation of an interface to Matlab and Simulink

ƒ Development of distributed simulation framework using Local Area

Networks (LANs) or Universal Serial Bus (USB)

ƒ Implementation of BBMs for system level design (RAM, EPROM, etc.)

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Questions ?

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