Вы находитесь на странице: 1из 3


10, OCTOBER 1989


Power Semiconductor Device Figure of Merit for High-Frequency Applications

A bstract-Power devices based upon silicon technology are rapidly approaching their theoretical limits of performance. Consequently, it will be necessary to develop devices from other materials in the future in order to reduce power losses in bigb-frequency systems and in order to acbeive high efficiencies. This paper provides theoretical guidelines to choose the optimum semiconductor material for high-frequency applications. It is demonstrated that gallium arsenide, silicon carbide, and semiconducting diamond-based devices offer significant advantages in terms of reducing power losses in bigb-frequency applications.

In 1965, Johnson [3] derived a figure of merit

Ec us JFOM = 2?r
which defines the power-frequency product for a low-voltage transistor. Here, E, is the critical electric field for breakdown in the semiconductor and U, is the saturated drift velocity. In 1972, Keyes [4] derived a figure of merit KFOM=h

I. INTRODUCTION T PRESENT, all power semiconductor-basedsystems are served by devices made from silicon. For many applications, the power MOSFET has become the device of choice due to its inherent high switching speed and its high input impedance under steady-state conditions [ 13. In order to minimize the power losses in the power MOSFET, there has been a concerted effort to reduce the on-resistance of the device. This can be acheived by increasing the device die area and by reducing the specific on-resistance (on-resistance per square centimeter). The ability to increase the die area is limited by the manufacturing yield. In high-frequency applications, as the die size increases, the increase in the input capacitance produces a corresponding increase in the switching losses that offsets the reduction in the conduction losses acheived by the decrease in the on-resistance. Thus, it is necessary to not only reduce the on-resistance but the input capacitance as well. Recent progress in silicon power MOSFETs utilizing silicide gate technology has been successful in bringing the on-resistance down to within a factor of 2 of the ideal value [2]. It is, therefore, necessary to consider other semiconductor materials if further improvements in device performance are to be realized in the future. In this paper, theoretical considerations are provided that determine the best properties for a material from which power devices should be fabricated for high-frequency applications. Based upon this theoretical analysis, it is demonstrated that gallium aresenide, silicon carbide, and semiconducting diamond offer significant potential for improving power FET performance.

[z ]


which provides a thermal limitation to the switching behavior of transistors used in integrated circuits. Here, c is the velocity of light, and E is the dielectric constant of the semiconductor. In 1983, Baliga [5] derived a figure of merit BFOM=E p

- EL


which defines material parameters to minimize the conduction losses in power FETs. Here p is the mobility and E is the G bandgap of the semiconductor. The BFOM is based upon the assumption that the power losses are soley due to the power dissipation in the on-state by current flow through the onresistance of the power FET. Thus, the BFOM applies to systems operating at lower frequencies where the conduction losses are dominant. In the case of high-frequency systems, it is necessary to include the switching losses. In the analysis given in this paper, it will be assumed that the switching losses are due to the charging and discharging of the input capacitance of the FET. This has been found to be the dominant switching loss component in high-frequency applications [6]. The total power loss is then given by


Ron+Cin* VZ, . f.



Several analyses of the impact of material parameters on the performance of semiconductor devices have been performed.
Manuscript received May 1, 1989; revised July 31, 1989. The author is with the Department of Electrical and Computer Engineering, North Carolina State University, Raleigh, NC 27695. IEEE Log Number 8931049.

In this equation, f i s the operating frequency and VGis the gate drive voltage. Note that the switching power loss term accounts for both the charging and discharging of the input capacitance during each cycle. The on-resistance and the input capacitance are related to the area of the device by their specific values. Making this substitution in (4), we get

where Ron,spand Cin,sp the specific on-resistance and are

0741-3106/89/1000-0455$01.00 O 1989 IEEE



capacitance. These device parameters are both determined by the material characteristics and the device cell design. A good measure of the device quality can be obtained by taking the product of these parameters and defining a new figure of merit for devices operating at high frequencies: BHFFOM= l/(Ron,sp Cin,sp)= . fB.

v ,

v v)


lrms = 10 amps


= 10 volts


This figure of merit has the dimensions of frequency, which is appropriate since we are evaluating the high-frequency switching capability of devices. Using this relationship in (3,we get





As the area of the device is increased, the first term decreases and the second term increases. Consequently, the power loss exhibits a minimum value at an area at which

Fig. 1. Power loss for a power MOSFET as a function of the high-frequency figure of merit. The system operating frequency is a parametric variable in the figure.

can be derived [11 :

dP dA

NB=E E : / ( 2


( 1 1)

w =2 VB/E,

This results in a minimum power loss of

at a device area given by

where VB is the breakdown voltage. The ideal specific onresistance is the resistance per unit area of this layer of material required to support the voltage. Using the above doping and thickness, this is given by

ROn,,=4VZ,/(e p
From (9), it can be concluded that in order to improve the efficiency of high-frequency power systems, it is desirable to maximize the value of the BHFFOM (fB). A quantitative comparison is provided in Fig. 1, where the power loss is plotted as a function of the BHFFOM for some specific frequencies of operation. It should be noted that as the BHFFOM increases, the die size at which the minimum power loss occurs will also increase. The ability to fabricate the larger die sizes may be technologically limited. In this case, it will be desirable to make the largest feasible die size and the power loss will now be determined by the conduction losses. Consequently, the BFOM (see (3)) would apply in this case. Thus, it is useful to consider both these figures of merit in analyzing the impact of other semiconductor materials.



The input capacitance per unit area is given by

where the depletion width has been assumed to be due to the applied gate bias voltage. By using (1 1) in (14), it can be shown that

cin,sp=E VG E,/2[



The BHFFOM can now be derived in terms of the material parameters by using ( 1 3) and (15): BHFFOM = p

E I* [ VG]12/2Vk5.


III. IMPACT MATERIAL OF PARAMETERS A,= [81& V;/f E E t p * Vp]12. (17) Using the above analysis, it is possible to quantify the benefits of fabricating devices from other semiconductor In addition, using these equations, the minimum power loss materials. From the analysis, it is clear that the lowest power can be written in terms of the system and material parameters losses can be acheived by reducing the BFOM and the as BHFFOM. These figures of merit can be expressed in terms of the material parameters. In the case of an abrupt onedimensionaljunction fabricated in a uniformly doped semiconductor layer, the voltage is supported in a depletion layer with From these equations, it can be seen that for any fixed a linearly decreasing electric field. This field has its maximum value at the junction, and is equal to the critical electric field E, This equation is applicable t power JFETs. It can also be used as an o at breakdown. From this field distribution, the doping concen- approximation for power MOSFETs as long as the oxide capacitance is much tration and the depletion width required to support the voltage larger than the depletion capacitance.

From the above equations, the area of the device at which the minimum power loss occurs can also be expressed in terms of the material parameters:




E ,
1.00 1.29 8.10 18.90 18.90

1.00 5.70 0.20 1.27 1.00




f a


PL m

6H-Sic Diamond (n-tme) Diamond (P-tme)

1.00 1.09 0.85 0.47 0.47

1.00 1.81 55.77 167.89 167.89

1.00 0.78 0.12 0.05 0.05

1-00 13.3 106.3 8574.1 6751.3

1.00 9.5 13.1 453.7 357.2

1.00 0.241 0.037 0.004 0.004




In this paper, a figure of merit (BHFFOM) has been derived for power semiconductor devices operating in high-frequency circuits. Using this figure of merit, it is predicted that the In the previous section, it was concluded that the best power losses incurred in the power device will increase as the material for high-frequency power switching applications square root of the operating frequency and approximately in should have a large mobility and a large critical electric field proportion to the output power. By relating the device power for breakdown. A review of the literature on semiconductor dissipation to the intrinsic material parameters, it is shown that materials reveals several promising candidates. These semithe power loss can be reduced by using semiconductors with conductors and their material properties are listed in Table I. larger mobility and critical electric field for breakdown. In this table, all the parameters have been normalized to the Examination of data in the literature indicates that significant values for the silicon device. This allows comparison of the performance improvement can be acheived by replacing material without the need to define the system variables in the silicon with gallium arsenide, silicon carbide, or semiconductabove equations. ing diamond. The calculated figures of merit (BFOM and FHFFOM), as well as the power loss and die area, are also provided in Table REFERENCES I. From the analysis performed in this paper, it is predicted B. J. Baliga, Modern Power Devices. New York: Wiley, 1987. that the development of power FETs from gallium arsenide K. Shenai, C . S. Korman, B. J. Baliga, and P. A. Piacente, A 50-V, will result in an improvement in the BHFFOM by nearly one 0.7-mQ.cm2, vertical-power DMOSFET, IEEE Electron Device order of magnitude. This will result in reducing the power Lett., vol. 10, pp. 101-103, M r 1989. a. E. 0. Johnson, Physical limitations on frequency and power losses in high-frequency applications by 67 percent. The die parameters of transistors, RCA Rev., pp. 163-177, 1965. area of the GaAs FET will be only 24 percent of that for the R. W. Keyes, Figure of merit for semiconductors for high-speed silicon device. This should offset the higher cost of the GaAsswitches, Proc. IEEE, p. 225, 1972. B. J. Baliga, Semiconductors for high-voltage, vertical channel based devices. Since most of the technology required for the vol. 53, pp. 1759-1764, 1982. FETs, J. Appl. Phy~., fabrication of these devices exists, the development of the C. S. Korman et al., Power MOSFETs for synchronous rectificaGaAs-based power FETs should be immediately possible. tion, in Proc. 3rd Int. High Frequency Power Conversion Conf.. 1988, p. 128. Even greater improvements in the BHFFOM are predicted

semiconductor material parameters, the power losses will increase with increasing operating frequency and gate drive voltage. However, the power loss expressed as a percentage of the out power (Zms x V,) is insensitive to the rms current and operating output voltage. The die area at which the smallest power loss occurs can be minimized by increasing the operating frequency and gate drive voltage. It increases approximately in proportion to the output power. From a material point of view, the above relationships allow the conclusion that the best semiconductors for high-frequency power switching applications should exhibit a large critical electric field for breakdown and should have a high carrier mobility. This results in minimizing the power loss and the die area.

for Sic- and diamond-based devices. With silicon carbide, the power loss is reduced by 73 percent with a die area of only 4 percent of that for a silicon device. In addition, its larger bandgap allows operation at higher temperature. The most impressive improvement in performance is predicted with diamond-based devices. The power loss can be reduced by over 95 percent (i.e., down to one-twentieth of that for the best silicon device) and the die area required is only 0.4 percent of that for the silicon device. The development of devices from these semiconductor materials will require research on fabrication techniques.