Академический Документы
Профессиональный Документы
Культура Документы
AUTOMOTIVE MOSFET
Typical Applications
q q
IRF3808
HEXFET Power MOSFET
D
Integrated Starter Alternator 42 Volts Automotive Electrical Systems Advanced Process Technology Ultra Low On-Resistance Dynamic dv/dt Rating 175C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax
Benefits
q q q q q q
VDSS = 75V
G S
Description
Designed specifically for Automotive applications, this Advanced Planar Stripe HEXFET Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this HEXFET power MOSFET are a 175C junction operating temperature, low RJC, fast switching speed and improved repetitive avalanche rating. This combination makes the design an extremely efficient and reliable choice for use in higher power Automotive electronic systems and a wide variety of other applications.
TO-220AB
Max.
140V 97V 550 330 2.2 20 430 82 See Fig.12a, 12b, 15, 16 5.5 -55 to + 175 300 (1.6mm from case ) 10 lbfin (1.1Nm)
Units
A W W/C V mJ A mJ V/ns C
Thermal Resistance
Parameter
RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
Typ.
0.50
Max.
0.45 62
Units
C/W
www.irf.com
1
02/06/02
IRF3808
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff.
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance U
Typ. 0.086 5.9 150 31 50 16 140 68 120 4.5 7.5 5310 890 130 6010 570 1140
Max. Units Conditions V VGS = 0V, ID = 250A V/C Reference to 25C, ID = 1mA 7.0 m VGS = 10V, ID = 82A T 4.0 V VDS = 10V, ID = 250A S VDS = 25V, ID = 82A 20 VDS = 75V, VGS = 0V A 250 VDS = 60V, VGS = 0V, TJ = 150C 200 VGS = 20V nA -200 VGS = -20V 220 ID = 82A 47 nC VDS = 60V 76 VGS = 10VT VDD = 38V ID = 82A ns RG = 2.5 VGS = 10V T D Between lead, 6mm (0.25in.) nH G from package and center of die contact S VGS = 0V pF VDS = 25V = 1.0MHz, See Fig. 5 VGS = 0V, VDS = 1.0V, = 1.0MHz VGS = 0V, VDS = 60V, = 1.0MHz VGS = 0V, VDS = 0V to 60V
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Q Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Conditions D MOSFET symbol 140V showing the A G integral reverse 550 S p-n junction diode. 1.3 V TJ = 25C, IS = 82A, VGS = 0VT 93 140 ns TJ = 25C, IF = 82A 340 510 nC di/dt = 100A/s T Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
U Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS . VCalculated continuous current based on maximum allowable junction temperature. Package limitation current is 75A. WLimited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance.
www.irf.com
IRF3808
1000
100
TOP BOTTOM VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V
1000
100
TOP BOTTOM VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V
4.5V
4.5V
10
10
1 0.1 1
20s PULSE WIDTH T J= 25 C
10 100
1 0.1 1
20s PULSE WIDTH T J= 175 C
10 100
1000.00
3.0
I D = 137A
2.5
TJ = 175C
RDS(on) , Drain-to-Source On Resistance
2.0
(Normalized)
100.00
1.5
T J = 25C
1.0
0.5
V GS = 10V
100 120 140 160 180
TJ , Junction Temperature
( C)
www.irf.com
IRF3808
100000 VGS = 0V, f = 1 MHZ Ciss = C + Cgd, C gs ds SHORTED Crss = C gd Coss = C + Cgd ds
12
ID = 82A
10
V DS = 60V V DS = 37V V DS = 15V
C, Capacitance(pF)
10000
Ciss
1000
Coss
Crss
100 1 10 100
0 0 40 80 120 160
1000.00
100.00
T J = 175C
10.00 T J = 25C 1.00 VGS = 0V 0.10 0.0 0.5 1.0 1.5 2.0 VSD , Source-toDrain Voltage (V)
1000
100 100sec
1msec
www.irf.com
IRF3808
140
LIMITED BY PACKAGE
120
VDS VGS RG
RD
D.U.T.
+
100
-VDD
80
10V
Pulse Width 1 s Duty Factor 0.1 %
60
40
20
TC , Case Temperature
( C)
10% VGS
td(on) tr t d(off) tf
(Z thJC)
D = 0.50
0.1
0.20 0.10
Thermal Response
SINGLE PULSE (THERMAL RESPONSE)
0.001 0.00001
Notes: 1. Duty factor D = 2. Peak T t1/ t
2 J = P DM x Z thJC
P DM t1 t2 +T C 1
0.0001
0.001
0.01
0.1
www.irf.com
IRF3808
1 5V
800
VDS
640
ID TOP 34A 58A 82A BOTTOM
RG
20V tp
D .U .T
IA S
+ V - DD
480
0 .0 1
320
160
( C)
IAS
10 V
QGS VG QGD
VGS(th) Gate threshold Voltage (V)
3.5
3.0
Charge
2.5
ID = 250A
2.0
1.5
D.U.T. VGS
3mA
+ V - DS
T J , Temperature ( C )
IG ID
www.irf.com
IRF3808
1000
100
0.01
Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25C due to avalanche losses
0.05
10
0.10
tav (sec)
500
400
300
200
100
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 15, 16). t av = Average time in avalanche. 175 D = Duty cycle in avalanche = t av f ZthJC(D, tav) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3BVIav) = T/ ZthJC Iav = 2T/ [1.3BVZth] EAS (AR) = PD (ave)tav
www.irf.com
IRF3808
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
S
+
Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer
R
-
Q
RG VGS dv/dt controlled by RG ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
P.W. Period
[VGS=10V ] ***
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
[VDD]
Body Diode
Forward Drop
Ripple 5%
[ ISD ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 17. For N-channel HEXFET power MOSFETs
www.irf.com
IRF3808
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10 .5 4 (.415 ) 10 .2 9 (.405 ) 3.7 8 ( .14 9 ) 3.5 4 ( .13 9 ) -A 6 .4 7 (.2 55 ) 6 .1 0 (.2 40 ) -B4 .6 9 (.1 85 ) 4 .2 0 (.1 65 ) 1.32 (.05 2) 1.22 (.04 8)
1 .1 5 (.0 4 5) M IN 1 2 3
L E A D A S S IG NM E NT S 1 - GATE 2 - D R A IN 3 - S O U RC E 4 - D R A IN
4 .0 6 (.160 ) 3 .5 5 (.140 )
3X 3X 1 .4 0 (.0 55 ) 1 .1 5 (.0 45 )
0 .9 3 (.0 37 ) 0 .6 9 (.0 27 ) M B A M
3X
0.36 (.0 14 )
3 O U TL IN E C O N F O R MS TO J E D E C O U T L IN E TO -2 20 A B . 4 H E A T S IN K & LE A D M E A S U R E M E N T S D O N O T IN C LU DE B U R R S .
Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive (Q101) market. Qualification Standards can be found on IRs Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.02/02
www.irf.com
Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/