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AN1599 - APPLICATION NOTE

VIPower: STAND-BY SMPS DEMOBOARD WITH VIPer12A


Gianni Giorgio Bacchin

1. INTRODUCTION In consumer application, stringent standards impose power consumption equal to or lower than 1W during stand-by operation. Sometimes the main SMPS cannot meet this requirement so it is necessary to use an stand-by SMPS. The VIPer12A integrates on the same silicon chip a PWM control circuit and an optimised high voltage Vertical Power MOSFET, it is available in DIP-8 or SO-8 package. It offers an excellent and cost effective solution with all features needed by an SMPS. 2. SCOPE The demo board, used in this application, has been designed with the possibility to test two different configurations: primary or secondary regulation. Besides, it is possible to use single or full wave mains rectification. In this document the results obtained from a 3.3V - 0.75A converter with secondary regulation and 3.3V - 100mA converter with primary regulation and linear regulator will be described. The configuration with secondary feedback has been chosen to maximize the power capability of the transformer, while the configuration with primary regulation has been chosen as a simpler and low cost solution for stand-by application. The circuit uses a small, low cost E13 transformer.

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3. SCHEMATIC AND CIRCUIT DESCRIPTION The power supply topology is a discontinuous current mode flyback converter for both configurations. The switching frequency is set at the typical value of 60KHz by the VIPer12A internal oscillator. In the secondary feedback configuration the regulation is obtained by controlling the current flowing into the VIPer12A pin FB via TL431, optocoupler and zener diode D3. The diode D3 assures that the voltage

November 2003

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on VDD is above the undervoltage shutdown threshold VDDoff during normal operation. To avoid that during start up phase the voltage across C6 is clamped below the start up threshold VDDon by D3, the diode D4 has been added. In the SMPS here proposed the optocoupler is used not only for regulation but it also supplies the VIPer12A during normal operation. In this way, when the output is shorted the optocoupler is off and the VIPer12A works only with the C6 charge. The result assures a good protection against short circuit. The zener diode D7 limits the output voltage in case of secondary feedback failure. For the primary feedback configuration, the secondary regulated voltage is controlled by the zener diode D7 connected to pin FB. Due to the parasitic element of the transformer is not possible to achieve a precise regulation of the secondary voltage to supply a microprocessor, hence a low drop out voltage regulator LE33CZ type has been used. For the secondary regulation circuit a transil is used to keep the drain voltage at a safe level, the PKC136 type integrates both blocking diode and transil diode in a single package. For the primary feedback configuration a cheap R-C-D clamper has been used since the voltage drain is lower due to the low power managed by the supply. The output rectifiers are schottky diodes for better efficiency thanks to their lower forward voltage drop and negligible switching losses. They have been chosen according to the maximum reverse voltage and output current. The output capacitors have been selected to minimize the output ripple, according to the AC output current. For the 750mA output, a small LC filter has been added in order to filter the high frequency ripple without increasing the output capacitors size. For both circuits the transformer is an E13 TIW type, manufactured by Eldor Corporation according to EN60065. The converters are compliant to EN50022 class B and the input filter topology has been selected in order to fit consumer application like TVC or STB.

Table 1: Operating condition Parameter Input voltage range Input frequency range Output voltage Output voltage Minimum load Maximum working ambient temperature EMI

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Note 1: for converter with secondary feedback Note 2: for converter with primary feedback Note 3: these two applications are designed to supply microprocessors and logic circuitry always working, so a minimum load has been assumed. The value has been fixed at 20mA, compatible with most of common application.

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Value

90 to 264Vac 50/60Hz 3.3V3% @ 0.75 A 3.3V2% @100mA 20mA (Note 3) 60C EN55022 class B

(Note1) (Note2)

4. PCB LAYOUT The PCB has been realized in FR2 with a single side copper thickness of 35 mm. The dimensions are 52 X 98 mm. Here below there are the components side and tracks side. The demo board has been developed for evaluation purpose so its dimensions are not optimised. To develop SMPS reducing the board size, the VIPer12A and the other components in SMT package can be used.

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Figure 1: PCB components side and soldering side (not in scale)

5. SECONDARY REGULATION CONVERTER The first part of this application note describes the results of laboratory tests of the converter with secondary regulation. The typical waveforms regarding the circuit under test have been included too. Figure 2: Electrical schematic

J1 1 2

F1 FUSE 1A 1 C1 100nF R1 0R 2

L1 22mH 0.4A 4 3

D6 DF06 2

Vin= 90-264Vac

DRAIN DRAIN DRAIN DRAIN SOURCE SOURCE

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5 6 7 8 U2 VIPER12ADIP

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3 C6 2.2uF 63V 4

(s) ct
1 D7 ZPD33 D3 BZX79C10

so Ob R2 0R D8 PKC136

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C5 1n-Y1

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C2 10uF 400V OD S.E.

1 T1 24320011

2 D9 1N5819 D4 1N4148 D5 BAV21 1 JP2 0R 2 5 C9 1000uF-16V YXF R3 47K C7 2.2uF 63V 4 6 C13 100uF 16V YXF 9 R4/L3 1uH 1.7A 1 JP3 0R 2

J2 4 3 2 1 C11 100nF

VDD

R7 68R 3 4 3 U3 SFH617-A4 1 2 1 C12 100nF R8 10K

R9 330R 1%

FB

1 2 JP4

C14 47nF U4 TL431AC 2 3 R10 1K 1%

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5.1. COMPONENT LIST Table 2: Component list for secondary feedback SMPS
Reference

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C1 C2 C5 C6 C7 C9 C11 C12 C13 C14 D3 D4 D5 D6 D7 D8 D9 F1 J1 J2 JP2 JP3 L1 R1 R2 R3 R4 R7 R8 R9 R10 T1 U2 U3 U4

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Part Type 100nF 275Vac X2 10F 400V OD S.E. 1nF 250V~ Y1 2.2F 63V 2.2F 63V 1000F-16V YX 100nF 100nF 100F 16V YXF 47nF BZX79C10 1N4148 BAV21 DF06 ZPD33 PKC136 1N5819 FUSE 1A MKS 2822-1-0-202 MKS 1854-6-0-404 0 0 22mH PLA10AS2230R4D2 0 0 47K 1H 1.7A 68 10K 330 1% 1K 1% 24320011 VIPer12ADIP SFH617-A4 TL431AC

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Description X CAP ELCAP CERCAP SAFETY ELCAP ELCAP ELCAP POLCAP POLCAP ELCAP POLCAP ZENER DIODE SIGNAL DIODE SIGNAL DIODE BRIDGE RECTIFIER ZENER DIODE TRANSIL SCHOTTKY DIODE FUSE 2 POLES CONNECTOR 4 POLES CONNECTOR JUMPER, WIRE JUMPER, WIRE FILTER COIL JUMPER, WIRE JUMPER, WIRE 1/4W RESISTOR INDUCTOR 1/4W RESISTOR 1/4W RESISTOR 1/4W RESISTOR 1/4W RESISTOR TRANSFORMER SMPS CONTROLLER OPTOCOUPLER INTEGRATED CIRCUIT

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Supplier EPCOS SANYO CERA MITE CAPXON CAPXON RUBYCON EVOX-RIFA EVOX-RIFA RUBYCON EVOX-RIFA PHILIPS PHILIPS PHILIPS GENERAL SEMICONDUCTOR GENERAL SEMICONDUCTOR STMicroelectronics STMicroelectronics WICKMANN STOCKO STOCKO

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MURATA

BEYSCHLAG NEWPORT COMPONENTS BEYSCHLAG BEYSCHLAG BEYSCHLAG BEYSCHLAG ELDOR CORPORATION STMicroelectronics INFINEON STMicroelectronics

5.2. TRANSFORMER SPECIFICATION The transformer is produced by Eldor Corporation, its characteristics and material list are in table 3.

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Table 3: Transformer specification Transformer code: 2432.0011 Primary inductance 3.3 mH 12% 200 turns; Wire 0.125mm; Type G2; class F Auxiliary winding 44 turns; Wire 0.125mm; Type G2; class F Secondary winding 13 turns; Wire 0.25 TIW Leakage inductance 4.4% of primary inductance Ferrite core E13/7/4 (EF12.6) N67 or equivalent Bobbin Manufactured by Eldor Corporation Safety EN60065

5.3. VOLTAGE REGULATION AND EFFICIENCY In table 4 there are the main parameters measured on the power supply. The output voltage has been measured after the output connector J2. Table 4: Output voltage and efficiency measurements 3.3V Vout [V] 3.33 3.33 3.31 3.30 3.27 Iout [mA] 20 200 375 600 750 Pout [W] 0.067 0.666 1.241 1.980 2.453 115Vac Pin [W] 0.18 37.0% 0.97 68.7% 1.74 71.3% 2.8 70.7% 3.57 68.7% 3.3V Vout [V] 3.33 3.32 3.30 3.30 3.28

The output voltage is within the tolerance at all input voltage and load conditions. It is worth underlining that with an output current of 200mA the input power is around 1W, which is the limit required in some standards for stand-by operation. Figure 3: Efficiency versus output current

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80% 70% 60% 50% 40% 30% 20% 10% 0%

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Iout [mA] 20 200 375 600 750

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[W] 0.067 0.664 1.238 1.980 2.460

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230Vac Pin [W] 0.2 33.3% 1.03 64.5% 1.82 68.0% 2.85 69.5% 3.61 68.1%

Vin 115Vac Vin 230Vac

20

50

100

200 Iout [mA]

375

600

750

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5.4. STAND-BY OPERATION The SMPS has been loaded at several light load steps to simulate a stand-by operation. Table 5: Stand-by operation measures 3.3V Vout [V] 3.33 3.33 3.33 3.33 3.32 Iout [mA] 20 30 50 80 100 Pout [W] 0.067 0.100 0.167 0.266 0.332 115Vac Pin [W] 0.180 37.0% 0.225 44.4% 0.310 53.7% 0.450 59.2% 0.540 61.5% 3.3V Vout [V] 3.33 3.33 3.33 3.33 3.32 Iout [mA] 20 30 50 80 100 Pout [W] 0.067 0.100 0.167 0.266 0.332 230Vac Pin [W] 0.200 33.3% 0.240 41.6% 0.340 49.0% 0.480 55.3% 0.580 57.2%

Figure 4: Power consumption versus output current at light load

Stand by operation
0.7 0.6 0.5 Pin [W] 0.4 0.3 0.2 0.1

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5.5. WAVEFORMS In the following pictures there are some waveforms of the application salient parameters. In figures 5 and 6 there are the drain current and drain voltage during normal operation at full load. As clearly visible the converter works in discontinuous current mode. For circuit reliability, the drain voltage and diodes PIV have been checked at maximum input voltage and full load. As shown in picture 7 the drain voltage reaches the maximum value of 551V, the margin respect to the BVDSS is 179V, assuring a reliable operation of the VIPer12A. The trace A is the magnification of trace 1 showing the details of the drain voltage. In SMPS that foresee the operation with low load, the auxiliary winding that supplies the control is designed to allow the minimum operating voltage also at light load condition. So, the reverse voltage on the rectifier due to the winding ratio in this power supply is 114Vpkpk at maximum input voltage. Then the selected diode supplying the VIPer12A (D5), is a BAV21 with a VRRM=250V.
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Vin 1 5Vac 1 Vin 230Vac

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Figure 5: VDS and ID at full load Vmains 115Vac-50Hz Figure 6: VDS and ID at full load Vmains 230Vac-50Hz

CH1: drain voltage CH4: drain current

CH1: drain voltage CH4: drain current

Figure 7: VDS, ID and anode D5 at full load Vmains 265Vac-50Hz

Figure 8: VD9, VC9 and Vout at full load Vmains 265Vac-50Hz

CH1: drain voltage CHA: drain voltage magnification CH2: anode D5

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The output rectifier D9 is a 1N5819, a schottky diode with a VRRM=40V. Its maximum working voltage at full load and maximum mains voltage is around 30Vpkpk (figure 8 trace 1). The trace 2 and 3 are respectively the voltage ripple on C9 and the output voltage ripple measured after the connector J2. 5.6. DYNAMIC LOAD TEST In order to verify the response of the SMPS, a test with a dynamic load from 50% to 100% of the load has been performed. In the pictures here below the results are shown.

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CH1: anode D9 CH2: output ripple CH3: ripple voltage on C9

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Figure 9: Output voltage variation at load step from 50% to 100% - 60Hz Vmains 115Vac-50Hz Figure 10: Output voltage variation at load step from 50% to 100% - 60Hz Vmains 230Vac-50Hz

CH2: output voltage CH4: output current

CH2: output voltage CH4: output current

The supply response is fast and the output voltage is always within the tolerance at both nominal input voltage of 115 Vac and 230Vac. 5.7. START UP AND TURN OFF TESTS The start up phase could be critical for any SMPS: output overshoot or undervoltage may occur if the circuit is not properly designed. The SMPS under test has behaved well during start up: in pictures 11 and 12 the trace A is the magnification of the output voltage rise, and it shows that the output is perfectly under control and no overshoot or undershoot are present. Figure 11: VDS, VDD and Vout during start up at full load - Vmains 115Vac-50Hz

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Figure 12: VDS, VDD and Vout during start up at full load - Vmains 230Vac-50Hz

CH1: drain voltage CH2: output voltage CHA: output voltage magnification CH3: VIPer12A VDD

CH1: drain voltage CH2: output voltage CHA: output voltage magnification CH3: VIPer12A VDD

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Thanks to the VIPer12A internal current source the wake up time is constant at any input voltage and since it is switched off after start up, the circuit consumption is minimized during normal operation, allowing very low power consumption from the mains. Also checking the turn off phase at full load the converter has shown a normal behavior without any overshoot or loss of control: the VIPer12A works correctly until the bulk input capacitor is discharged. The residual voltage on the bulk capacitor is not high enough to trigger the internal current source so there is no re-start attempt as shown by the voltage on VDD. Figure 13: VDS, VDD and Vout during turn off at full load - Vmains 115Vac-50Hz Figure 14: VDS, VDD and Vout during turn off at full load - Vmains 230Vac-50Hz

CH1: drain voltage CH2: output voltage CHA: output voltage magnification CH3: VIPer12A VDD

From the drain voltage in picture 13 is possible to see that at 115Vac mains and full load the hold up time is greater then one line cycle. 5.8. SHORT CIRCUIT PROTECTION An important characteristic of every converter is the protection against output short circuit. The SMPS has to protect itself avoiding catastrophic failure. The most common and cheapest short circuit protection is achieved by means of the hiccup mode: when the output is shorted, the low impedance of the shorted output is reflected on the auxiliary winding, resulting in a low supply voltage for the controller which turns off. If the short circuit is still present, the auxiliary voltage is too low to supply the control, which works until the start up capacitor is discharged and doesnt work for the time needed to recharge it until the start-up voltage. Thus, even if the current during the working time is higher than in normal operation, the off-time provides for an average value of the current that can be thermally sustained by the circuit. So, the output rectifier, transformer winding and PCB tracks are not overstressed. Sometimes the hiccup mode is not activated because the transformer leakage inductance generates a voltage spike on the auxiliary winding capable to supply the control or the short circuit impedance reflected on the auxiliary winding is too high to reduce the auxiliary voltage below the undervoltage threshold. In both cases the circuit can be seriously damaged. To achieve a good protection against short circuit regardless of the transformer characteristics or short circuit impedance, the following solution has been implemented: the optotransistor used for the feedback is connected in series to the rectified auxiliary voltage supplying the VIPer12A. Therefore, if the output is shorted, the TL431 does not drive the optodiode of U3, the optotransistor is off too, and the VIPer12A is

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CH1: drain voltage CH2: output voltage CHA: output voltage magnification CH3: VIPer12A VDD

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not supplied, hence it starts to work in hiccup mode. The result is a short working time with an average short circuit output current of 600mA as shown in figure 15. The short circuit has been done by an active load. Figure 15: VDS, V DD and Vout during output short circuit test Vmains 265Vac-50Hz Figure 16: VDS, VDD with D9 shorted Vmains 265Vac-50Hz

CH1: drain voltage CH3: VIPer12A VDD CH4: output current

CH1: drain voltage CH3: VIPer12A VDD

The converter has been tested against a more dangerous event: the diode D9 has been shorted to simulate its failure (figure 16). Unlike the output short circuit where the energy charged in the transformer is delivered to the short circuit only during the flyback time, with the rectifier shorted the energy is delivered also during the drain conduction time. Even in this case the converter is protected and removing the short circuit the converter works properly without any degradation. During short circuit the drain voltage reaches 556Vpk and a margin of 174V respect to the maximum absolute BVDSS is still present. Other two tests have been done in short circuit: start up and turn off. These two tests have been performed in order to check the converter behavior in short circuit during a transition phase. The tests have been positive confirming the robustness of the SMPS. 5.9. OVER VOLTAGE PROTECTION A fault that can occur to a converter is the output overvoltage: if a component in the feedback loop fails or is disconnected, the converter loses control and usually the duty cycle increase to a maximum value, so the output voltage rises to high value damaging the power supply. To protect the converter against this kind of failure the zener diode D7 has been added between the auxiliary voltage and pin FB of VIPer12A. In this way, if the secondary feedback fails and the output voltage increases, the auxiliary voltage increases up to D7 threshold too. In this condition D7 works as a primary feedback limiting the duty cycle and the output voltage. The feedback failure has been simulated opening the control loop and turning on the power supply at maximum input mains. The tests have been done at minimum and maximum load.

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Figure 17: VDS, VDD and Vout during output short circuit test at start up Vmains 265Vac-50Hz Figure 18: VDS, VDD and Vout during output short circuit test at turn off Vmains 265Vac-50Hz

CH1: drain voltage CH2: output voltage CH3: VIPer12A VDD

CH1: drain voltage CH2: output voltage CH3: VIPer12A VDD

Figure 19: VDS, VDD and Vout at start up with R9 disconnected - Load=20mA Vmains 265Vac-50Hz

Figure 20: VDS, VDD and Vout at start up with R9

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CH1: drain voltage CH2: output voltage CH3: VIPer12A VDD

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disconnected - Load = 750mA Vmains 265Vac-50Hz

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CH1: drain voltage CH2: output voltage CH3: VIPer12A VDD

In both cases the converter works in hiccup mode, the output voltages obtained are not dangerous for rectifiers and capacitors used in the circuit. Of course, during a secondary control failure and the primary side protection working, the output voltage value depends on the load current.

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5.10. THERMAL TEST Because the converter reliability depends on the temperature stress, it is important to check the components operating temperature taking into account the maximum working ambient temperature and the derating applied to the maximum ratings. Hence, a thermal map of the converter has been done using an IR Camera, (figures 21 and 22) for both nominal input voltage mains at full load. The measures have been done at 25C ambient temperature. Figure 21: Thermal map at full load Vmains 115Vac-50Hz Figure 22: Thermal map at full load Vmains 230Vac-50Hz

The temperatures measured are within the components rating.

5.11. CONDUCTED NOISE MEASUREMENTS The pre-compliance test has been performed on the converter according to EN50022 class B. Because the emission noise level, measured at full load in peak detection mode is below the average limit at both nominal mains voltage, according to the EN rules it is not necessary to measure the conducted noise in quasi peak detection mode. Figure 23: Peak measurements Vmains 115Vac-50Hz

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Figure 24: Peak measurements Vmains 230Vac-50Hz

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6. PRIMARY REGULATION CONVERTER The second part of this document describes the test results of the circuit with primary regulation. The output current is 100mA at 3.3V; its simple configuration and the reduced number of components make this circuit particularly suitable for low-cost applications. Figure 25: Electrical schematic primary regulation

J2

4 3 2 1 OUT C13 10uF 50V 1 C11 100nF

C9 100uF-50V YXF

T1 24320007A

L1 22mH 0.4A

F1 FUSE 1A

C1 100nF

R1

0R

Vin: 90-264Vac

J1

JP1 0R

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U2 VIPER12ADIP

1 2

DRAIN DRAIN DRAIN DRAIN SOURCE SOURCE

5 6 7 8

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D1 1N4007

J4

VDD

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C6 2.2uF 63V

FB

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C2 4.7uF 400V SME

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R2 120K

R5 39R

R3 47K

C7 2.2uF 63V

so Ob 52 JP2 1 0R D5 BAV21 4 D7 BZX79C12 D4 BAV21

C3 1nF1KV

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R4 /L3

0R

C10 100nF

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U1 LE33CZ

IN

D9 BAT49

R9 0R

R10 2K2 C5 1n-Y1

D8 STTA106

C14 47nF

GND

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6.1. COMPONENT LIST Table 6: Component list for primary feedback SMPS
Reference

C1 C2 C3 C5 C6 C7 C9 C10 C11 C13 C14 D1 D4 D5 D7 D8 D9 F1 J1 J2 JP1 JP2 L1 R1 R2 R3 R4 R5 R9 R10 T1 U1 U2

Part Type 100nF 275Vac X2 4.7F 400V SME 1nF1KV 1nF 250V~ Y1 2.2F 63V GS 2.2F 63V GS 1000F-50V YXF 100nF 100nF 10F 50V 47nF 1N4007 BAV21 BAV21 BZX79C12 STTA106 BAT49 FUSE 1A MKS 2822-1-0-202 MKS 1854-6-0-404 0 0 22mH PLA10AS2230R4D2 0 120K 47K 0 39 0 2.2K 24320007A LE33CZ VIPer12ADIP

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Description X CAP ELCAP CERCAP CERCAP SAFETY ELCAP ELCAP ELCAP POLCAP POLCAP ELCAP POLCAP GENERAL PURPOSE DIODE SIGNAL DIODE SIGNAL DIODE ZENER DIODE ULTRAFAST RECTIFIER SCHOTTKY RECTIFIER FUSE 2 POLES CONNECTOR 4 POLES CONNECTOR JUMPER, WIRE JUMPER, WIRE FILTER COIL JUMPER, WIRE 1/4W RESISTOR 1/4W RESISTOR JUMPER, WIRE 1/4W RESISTOR JUMPER, WIRE 1/4W RESISTOR TRANSFORMER LINEAR REGULATOR SMPS CONTROLLER

Supplier EPCOS NIPPON CHEMICON MURATA CERA MITE CAPXON CAPXON RUBYCON EVOX-RIFA EVOX-RIFA ELNA EVOX-RIFA

GENERAL SEMICONDUCTOR PHILIPS PHILIPS PHILIPS STMicroelectronics STMicroelectronics WICKMANN STOCKO STOCKO

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MURATA BEYSCHLAG BEYSCHLAG BEYSCHLAG BEYSCHLAG ELDOR CORPORATION STMicroelectronics STMicroelectronics

6.2. TRANSFORMER SPECIFICATION The transformer is produced by Eldor Corporation. The characteristics and material list are in table 7.

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Table 7: Transformer specification Transformer code: 2432.0007A Primary inductance 3.3 mH 12% 200 turns; Wire 0.125mm; Type G2; class F Auxiliary winding 44 turns; Wire 0.125mm; Type G2; class F Secondary winding 20 turns; Wire 0.25 TIW Leakage inductance 4.4% of primary inductance Ferrite core E13/7/4 (EF12.6) N67 or equivalent Bobbin Manufactured by Eldor Corporation Safety EN60065

6.3. VOLTAGE REGULATION AND EFFICIENCY The first measurements made on the converter are voltage regulation and efficiency at nominal input voltage mains. Table 8: Output voltage and efficiency measurements Secondary voltage VC9 [V] 5.36 5.2 4.95 4.67 4.52 Secondary voltage VC9 [V] 5.30 5.15 4.92 4.65 4.50 3.3v Vout [V] 3.29 3.29 3.28 3.28 3.28 3.3v Vout [V] 3.29 3.29 3.29 3.29 3.28 Iout [mA] 20 30 50 80 100 Pout [W] 0.066 0.099 0.164 0.262 0.328 Pout Pin [W] 0.27 0.33 0.45 0.62 0.72 115vac

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The efficiency is lower compared to the converter with secondary regulation (table 5) for two reasons: the R-C-D clamp dissipates energy even at light load and there is a power loss on U1 due to the drop out voltage. It must be taken into account that the input power is always below 1W and the SMPS cost and complexity are reduced. Considering the secondary voltage indicated in the first column of table 8, the converter efficiency at full load is 62.7% at 115Vac and 54.8% at 230Vac. 6.4. WAVEFORMS Pictures 26 and 27 show the waveforms of current drain and voltage drain of VIPer12A during normal operation at full load.

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Iout [mA] 20 30 50 80 100

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24.7% 29.6% 36.6% 42.3% 45.7%

230vac Pin [W] 0.30 0.37 0.50 0.69 0.82 22.3% 27.0% 32.7% 37.9% 40.2%

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Figure 26: VDS and ID at full load Vmains 115Vac-50Hz Figure 27: VDS and ID at full load Vmains 230Vac-50Hz

CH1: drain voltage CH4: drain current

CH1: drain voltage CH4: drain current

Figure 27 shows the converter working in burst mode. The burst mode occurs when the voltage on C7 is high enough to keep D7 in conduction. In this way the IFB switches off the mosfet skipping some switching cycles until the voltage on C7 drops under the regulation point. The burst mode, skipping some cycles, reduces the losses, therefore decreasing the input power. For this converter the maximum drain voltage and diodes PIV have been checked for reliability too. In picture 28 the peak voltage drain is 445V at full load and at maximum input voltage, the margin with respect to VIPer12A BVDSS is 285V. Trace A shows the details of the drain voltage waveform. Figure 28: VDS and VD5 at full load Vmains 265Vac-50Hz

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Figure 29: VD9, VC9 and Vout at full load Vmains 265Vac-50Hz

CH1: drain voltage CHA: drain voltage magnification CH2: anode D5

CH1: anode D9 CH2: output ripple CH3: ripple voltage on C9

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In figure 29 the secondary circuit waveforms are shown: the voltage across the output rectifier, the LE33CZ input voltage and the output voltage measured after J2. Since the output current is 100mA, the schottky diode BAT49 has been chosen as output rectifier having a VRRM=80V and IF=500mA. The ripple voltage at the input pin of LE33CZ is around 200mVpkpk but the output voltage is free from ripple or spikes (trace 2, figure 29). 6.5. DYNAMIC LOAD TEST This test has been done to verify that the secondary voltage is always within the electrical parameters of U1: it must be above the minimum input voltage to avoid output undervoltage and it must be not too high to avoid excessive dissipation. The maximum drop out voltage for LE33CZ is 0.5V at 100mA, so the secondary voltage must be at least 3.9V, including some margin to compensate tolerance of the circuit.

Figure 30: Secondary voltage at load step from 50% to 100% - 60Hz Vmains 115Vac-50Hz

Figure 31: Secondary voltage at load step from 50% to 100% - 60Hz Vmains 230Vac-50Hz

CH2: output voltage CH3: voltage on C9 CH4: output current

As shown here above, the secondary voltage variation (trace 3) guarantees that no undervoltage or excessive dissipation may happen. 6.6. START UP AND TURN OFF TESTS The start up and turn off have been tested to verify the waveforms and voltages of the circuit during such transition. As shown in pictures 32 and 33 the converter works correctly during start up and turn off without overshoot or undershoot of the output voltage. This test has been done also at nominal input voltage of 115Vac with the same results.

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CH2: output voltage CH3: voltage on C9 CH4: output current

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Figure 32: VDS,VDD, Vout and VC9 during start up at full load Vmains 230Vac-50Hz Figure 33: VDS,VDD, Vout and VC9 during turn off at full load Vmains 230Vac-50Hz

CH1: drain voltage CH2: output voltage CHA: output voltage magnification CH3: VIPer12A VDD CH4: voltage on C9

CH1: drain voltage CH2: output voltage CHA: output voltage magnification CH3: VIPer12A VDD CH4: voltage on C9

6.7. SHORT CIRCUIT PROTECTION It is useless to do this test on the output because the voltage regulator U1 limits the output current protecting itself and the converter. For this reason the short circuit test have been done on C9 and D9: both tests have demonstrated that the converter is completely protected against short circuit. When the short circuit has been removed, the converter restarts the normal operation without degrading its performance. During short circuit the converter works in hiccup mode, in figure 34 it is possible to see that the average current delivered during short circuit on C9 is within the characteristics of the output rectifier. Figure 34: VDS,VDD and Iout during short circuit test on C9 Vmains 265Vac-50Hz

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Figure 35: VDS and VDD with D9 shorted Vmains 265Vac-50Hz

CH1: drain voltage CH3: VIPer12A VDD

CH4: output current

CH1: drain voltage CH3: VIPer12A VDD

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The last tests performed with C9 shorted, are start up and turn off at maximum input mains voltage. Even during these tests, the converter works correctly protecting itself. Figure 36: VDS,VDD and Vout during start up with Figure 37: VDS,VDD and Vout during turn off with C9 shorted Vmains 265Vac-50Hz C9 shorted Vmains 265Vac-50Hz

CH1: drain voltage CH2: output voltage CH3: VIPer12A VDD

CH1: drain voltage CH2: output voltage CH3: VIPer12A VDD

The maximum drain voltage measured during short circuit test is below 600V at all conditions, with a margin greater than 130V with respect to VIPer12A BVDSS. 6.8. THERMAL CONSIDERATION Due to the low power managed by this converter, there are no significant temperature increases on the circuit. The hottest component is the voltage regulator U1 with a temperature of 45C at full load and ambient temperature of 25C. 6.9. CONDUCTED NOISE MEASUREMENTS The pre-compliance test has been performed according to EN50022 class B. In figure 38 and 39, the test performed at nominal mains voltage and full load is shown. Because the emission noise level measured in peak detection mode is below the average limit in both cases, according to the EN rules, it is not necessary to measure the conducted noise in quasi peak detection mode. Figure 38: Peak measurements Figure 39: Peak measurements Vmains 115Vac-50Hz Vmains 230Vac-50Hz

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7. CONCLUSION The two converters with VIPer12A have been tested, both have good performances, fault protection and meet the EN55022 class B. Their low cost, reliability and compatibility with standard rules make them suitable for application in consumer market.

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics

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2003 STMicroelectronics - Printed in ITALY- All Rights Reserved.

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