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M.Tech. – I Semester Supplementary Examinations,
September, 2008
4.a) Draw the block diagram of a phase locked loop and briefly explain
the purpose of each of its blocks in PLL functioning.
b) Suggest the modifications in a classic PLL frequency synthesizer to
implement a fractional – N type frequency synthesizer.
Contd….2
Code No: 54107/MT ::2::
7.a) With the help of suitable circuit diagram, explain the operation of a
class B power amplifier to deliver RF power to a load. Derive an
expression for maximum conversion efficiency.
b) Discuss the demerits of a class B amplifier and suggest necessary
modifications to overcome the disadvantages of using it.
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