Effect of Voltage Scaled repeaters on delay analysis of CNT interconnects for VLSI Application

Abstract Resistance of Cu interconnects increases when it is scaled along with future technology nodes. Therefore, its performance as interconnect is degraded and conflict with the high performance requirement such as interconnects delay. In this paper performance of Single walled carbon nanotube bundle interconnect is examined and compare with Cu interconnect at various length on 32 nanometer technology node and the role of repeaters with power supply is also examined. It is found that CNT interconnect gives better performance than copper at intermediate and global interconnect level for future technology. Our analysis shows that for future technology nodes SWCNT bundles interconnect is a promising candidate. Keywords: Carbon nanotube (CNT), Single walled Carbon nanotube (SWCNT), Multi walled Carbon naotube (MWCNT), Simulation program with integrated circuit emphasis (SPICE).

II.

EQUIVALENT CIRCUIT OF THE CNTS

An isolated SWCNT on ground plane is shown in Fig.1.The separation between the nanotube and the ground is y, the diameter of the SWCNT is d.

I.

INTRODUCTION
Figure 1. Carbon nanotube, with diameter d, over a ground plane at a distance y below it.

The resistivity of Cu interconnect increases significantly due to grain boundary scattering, surface scattering and the presence of highly resistive diffusion barrier layer [1-2]. Therefore, its performance as interconnect degrades[34].Carbon nanotubes (CNTs) are graphene sheets rolled up into cylinders with a proper chirality and with diameter of the order of a nanometer (The direction in which CNTs are rolled up is known as chirality).There are two types of carbon nanotubes: single-walled Carbon nanotubes (SWCNTs) and multi-walled Carbon nanotubes (MWCNTs). Out of these two types of CNTs, the SWCNTs are preferable for use as interconnect [5]. However, because of its large resistance a single tube of SWCNT does not make it a good choice for use as interconnect. Alternatively, a parallel connection of a large number of SWCNTs can be used. Such SWCNT-bundles have proven to be of lower resistance than Cu-interconnects at advanced VLSI technology nodes. Previous works reported that how delay in SWCNT-interconnect is controlled by individual tube diameter [5-7]. The purpose of this paper is to analyze how ninety percent delay in SWCNT-interconnect is controlled by voltage scaled repeater insertion and compare the result with the Cu interconnect at various length. The paper is organized in four sections. CNT equivalent circuits are described and discussed in section II. SPICE simulation results are presented and analyzed in section III. Finally conclusions are drawn in section IV.

Fig.2 shows the equivalent circuit model for an isolated single-walled carbon nanotube of length less than its electron mean free path [5]. RF is an inherent resistance of the SWCNT. This resistance is independent of the length of the CNT and is approximately 6.45 K [8]. In the equivalent circuit this fundamental resistance (RF) is equally divided between the two contacts on either side of the nanotube. In practice, the observed d.c. resistance of a CNT (at low bias) is much higher than RF. It is due to the presence of imperfect metal-nanotube contacts which gives rise to an additional contact resistance. In the equivalent circuit, this additional imperfect contact resistance would appear in series with the fundamental resistance (RF), divided equally among the two end contacts as shown for RF. The observed resistance for CNTs has typically been in the range of 100K[9-10]. The capacitance associated with a CNT has two components, viz., Electrostatic and Quantum capacitance. The electrostatic capacitance is calculated by treating the CNT as a thin wire of diameter d, placed a distance y away from a ground plane (Fig.1), This capacitance is a logarithmic function of the ratio y/d [9]. The quantum capacitance represents the electrostatic energy during the period of current conduction. This capacitance is a function of the Fermi velocity of the electrons and is independent of the dimensions [10].

Figure 2. Equivalent circuit model [10] for an isolated SWCNT, length less than the mean free path of electrons, assuming ideal contacts.

There are two sources of CNT inductance. One of them is a magnetic inductance (LM) and the other is kinetic inductance (LK). The four parallel conducting channels in CNT give rise to an effective kinetic inductance of Lk/4. In case of inductance also one of them, LM is a function of CNT diameter while the other is a function of the Fermi velocity [10].
Figure 4. Variation of ninety percent average delay in SWCNT bundle and Copper Interconnect at different repeaters.

We calculated the bundle impedance parameters of Rbundle, CQbundle, CEbundle and Lbundle using the well-known expressions available in literature [5, 10]. Details of the calculations are not given for the sake of brevity. Fig.4 shows the SPICE variation of ninety percent average delay with number of repeaters, for a load of 1 pF and 1mm long interconnects, in 32nm technology. Result shows that delay in SWCNT bundle decreases with increase in number of repeaters for copper and bundle of SWCNT. For example, in Fig.4 we get optimum value of repeaters is 8 for SWCNT bundle whereas for Copper is 12. The insertion of repeaters is used to minimize the interconnect response time by justifying the effect of resistance and capacitance. The impedance parameters for copper interconnect are calculated using expressions given in [13]. The calculations show that inductance in an SWCNTbundle is negligible in comparison with its resistance and capacitance.

Figure 3. Equivalent circuit diagram for SWCNT bundle interconnect ( L>> L0CNT with Lbundle=LM/nCNT).

As mentioned previously for all practical purposes a CNTbundle is more preferable, the present analysis considers SWCNT-bundle as interconnect. The equivalent Circuits of an SWCNT-bundle for L > L0 is shown in Fig. 3. The resistances, inductances and capacitances of a bundle can be obtained from the impedance parameters of the isolated CNTs and the number of CNTs in the bundle [5, 10]. These equivalent circuits have been very useful in the assessment of the CNTs as interconnect for VLSI applications. III. SPICE SIMULATION RESULTS AND DISCUSSIONS

The equivalent circuit shown in Fig.3 is used to SPICEsimulate signal propagation down SWCNT-interconnect in 32nm technology [11] at a clock speed of 1.1MHz with Vdd=0.9v. For the sake of comparison copper-interconnects are simulated for the same technologies and clock speed. For simulation purpose copper interconnect is modeled by a equivalent circuit [12]. Copper-interconnect propagation delay as extracted from the simulation results normalizes corresponding SWCNT-interconnect propagation delays.

IV.

CONCLUSION

The influence of voltage scaled repeaters in SWCNTbundle interconnect is critically examined in this paper. SPICE simulation is used to compare SWCNT- interconnect delay with that of copper interconnects. The results show that SWCNT- bundle interconnect gives better performance in terms of ninety percent delay at semi global and global length of interconnects. Where as, number of repeaters decreases with power supply is scaled down. For better performance power supply should be balance. .
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REFERENCES
W. Steinhogl, G. Schindler, G. Steinlesberger, M. Traving, and M. Engelhardt, Comprehensive study of the resistivity of copper wires with lateral dimension Of 100nm and smaller, Journal of Applied Physics, vol. 97,p. 023706, 2005. P.G.Collins, M.Hersam, M.Arnold, R.Martel, and P.Avouris, Current saturation and electrical breakdown in multiwalled carbon nanotubes, phys.Rev.Lett., Vol.86 ,no.14,pp.3128-3131,Apr.2001. F. Kreupl, A. P. Graham , G. S. Duesberg , W. Steinhgl , M. Liebau , E. Unger , W. Hnlein, Carbon Nanotubes in Interconnect Applications, Microelectronic Engineering, pp. 399-408,2002. Jun Li, Qi Ye, Alan Cassell, Hou Tee Ng, Ramsey Stevens, Jie Han, and M. Meyyappan, "Bottom-up Approach for Carbon Nanotube Interconnects," Applied Physics Letters, Vol. 82, No.15, pp. 2491-2493, April 2003. N. Srivastava and K. Banerjee, Performance analysis of carbon nanotube interconnects for VLSI applications, IEEE/ACM Intl. Conf. on ICCAD, pp. 383- 390,2005. Y. Massoud and A. Nieuwoudt, Performance Analysis of Optimized Carbon Nanotube Interconnect, IEEE Symposium on Circuits And Systems, 2008, ISCAS-2008, pp.792-795. Mayank kumar Rai,Nivedita,G.Spandana,S.Sarkar. Control of SWCNT-interconnect Performance by Tube-diameter, Proc.IEEETencon2009 conf.,2009. Th. Hunger, B. Lengeler and J. Appenzeller, Transport in Ropes of Carbon Nanotubes:Contact Barriers and Luttinger Liquid Theory, Physical Review B, Vol. 69, 195406, 2004. W. Liang, M. Bockrath and D. Bozovic, Fabry-Perot interference in a Nanotube Electron Waveguide, Nature, Vol.411, pp. 665-669, 2001. P. J. Burke, Luttinger Liquid Theory as a Model of the Gigahertz Electrical Properties of Carbon Nanotubes, IEEE Trans. Nanotechnology, Vol. 1, No. 3, pp. 129-144, 2002. Predictive Technology Model .[Online]. Available: www.eas.asu.edu/~ptm/. Brajesh Kumar Kaushik, Sankar Sarkar and R.P. Agarwal Waveform Analysis and delay prediction for a CMOS gate driving RLC interconnect load, integration, the VLSI journal 40,pp.394405, 2007. Magdy A. El-Moursy, Eby G. Friedman Wire shaping of RLC interconnects integration, the VLSI journal 40, pp. 461472, 2007. R. Chandel, S Sarkar and R. P. Agarwal, Delay and Power Management of Voltage-scaled Repeater Driven Long Interconnects Int. J. Modeling and Simulation, Vol. 27, pp.333-339, 2007. M.A. El-Moursy, E.G. Friedman, Power characteristics of inductive interconnect, IEEE Trans. Very Large Scale Integration (VLSI) Syst. 12(12) pp. 12951306, 2004.

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[3] Figure 5. Ninety percent delay of SWCNT bundle with number of repeaters, at different values of power supply.

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[11] Figure 6. Ninety percent average delay of SWCNT bundle and Cu interconnect at different lengths. [12]

The insertions of voltage scaled repeaters in long interconnections have shown new and encouraging results in deep submicron technology nodes [14]. Fig.5 shows the variation of ninety percent average delay with different number of repeaters, at different supply voltages in 32 nanometer technology. It is seen that the number of repeaters decreases with power supply is scaled down from 1.1V to 0.7V. For instance, in Fig.5 when Vdd=1.1V, number of optimum repeaters is 8, whereas for Vdd=0.7V, number of repeaters is 4.

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