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1

Three-Dimensional Flux Vector Modulation of Four-Leg Sinewave Output Inverters

Dhaval C. Patel, Rajendra R. Sawant, Member, IEEE, and Mukul C. Chandorkar, Member, IEEE
+
Vdc

AbstractThe time-integral of the output voltage vector of a three-phase inverter is often termed as the inverter ux vector. This paper addresses the control of a three-phase fourleg sinewave output inverter having an LC lter at its output, by controlling the ux vector in three dimensions. Flux vector control has the property that the output lter resonance is actively damped by the output voltage control loop alone. Further, the inverter switching action inherently regulates the output voltage rapidly against dc bus voltage variations. Flux vector control of sinewave output inverters nds several applications in three-phase four-wire systems. This paper presents the ux modulation method for three-phase four-leg inverters feeding unbalanced and nonlinear loads. All the necessary steps for the digital implementation of the ux modulator are presented. The switching behavior of the modulator has been evaluated, which is useful for variable fundamental frequency applications of the inverters. To provide experimental validation, the modulator is implemented as a part of the control system for a stand-alone three-phase four-leg inverter with an LC lter at its output. Control system details are also provided. Experimental results indicate the effectiveness of the modulator and the control system in providing balanced voltages at the output of the LC lter even under highly unbalanced conditions with nonlinear loads. The resonance damping and voltage regulation properties of the modulator are also apparent from the experimental results. Index TermsIntegral space vector modulation, Flux modulation, Four-leg inverter.

Snp

Sap A

Sbp

Scp a Linear/Nonlinear b Balanced/Unbalanced c Load n

B C San Sbn Scn LC Filter

Fig. 1.

Snn

Four-Leg VSI

Ln

Four-leg sinewave output voltage inverter

I. I NTRODUCTION ONVENTIONAL three-phase three-wire inverters are suitable for supplying three-phase balanced loads such as induction motors. For unbalanced three-phase loads such as those formed by unequal single-phase loads connected to the three-phase system, inverters should be able to provide a path for the neutral current. There are two main ways for doing this with three-phase inverters. Inverters with split dc link capacitors [1] Inverters with fourth (neutral) leg [2][6] (see Fig. 1) The higher dc link utilization, requirement of smaller dc link capacitors and exibility in control are inherent advantages of four-leg inverters over split dc link capacitor inverters. Fourleg inverters can be used for applications such as stand-alone sinewave output inverters for non-linear unbalanced loads,

Manuscript submitted on February 10, 2009; revised May 22, 2009. Accepted for publication on July 14, 2009. Copyright c 2009 IEEE. Personal use of this material is permitted. However, permission to use this material for any other purposes must be obtained from the IEEE by sending a request to pubs-permissions@ieee.org Dhaval C. Patel, Rajendra R. Sawant, and Mukul C. Chandorkar are with Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai 400076 INDIA e-mail: (dcpatel81@iitb.ac.in; rrsawant@ee.iitb.ac.in; mukul@ee.iitb.ac.in)

distributed generation interfaces, microgrids, neutral current compensators and active lters [6]. Space vector modulation methods for four-leg inverters have been presented in [2][6]. Space vector modulation for four-leg inverters is complex [2], [6]. However, it has advantages such as low output distortion, suitability to digital implementation, constant switching frequency and good dc bus utilization [7]. The inverter ux vector is the time-integral of the inverter switching voltage vector. Inverter switching based on the control of the ux vector has several advantages in the control of sinewave output inverters having LC output lters. In contrast to voltage modulation control methods, the output voltage control loop alone with a ux modulator is sufcient to actively damp the output lter resonance [8]. Further, the inverter switching inherently regulates the output voltage against dc bus voltage variations. The method also lends itself to easy digital implementation on a processor or a eldprogrammable gate array (FPGA). Two-dimensional ux vector modulation of three-leg inverters was presented in [8], [9]. Grid connected applications of three-leg sinewave output inverters using ux vector modulation were discussed in [8]. A ux vector modulator for a fuel cell inverter was presented in [10]. An application for active lter was discussed in [11]. An undesirable feature of ux modulators is the variable inverter switching frequency that results from the tracking of the ux reference vector using inverter switching within a hysteresis band. The switching frequency characteristics of the ux modulator for a three-leg inverter were discussed in [8]. A solution to the problem of variable switching frequency was presented in [12], [13], which resulted in constant switching frequency. Charge modulator for current source inverter, an analogy of the ux modulator, was presented in [14]. A ux modulator designed in the synchronous reference frame was employed in [14][16]. A comparison of different modulators for inverter control was presented in [14]. An analysis of a ux modulator was presented in [17]. A voltage modulation index in the

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2

V14
1 Vd = 3 Vdc 0 V6 1 3 Vdc

V0 = Vdc V12
2 3 Vdc

TABLE I S WITCHING POSITION WITH CORRESPONDING PHASE VOLTAGES AND

TRANSFORMED VOLTAGES

V10 V4 V8 1 Vdc 3

Switch States 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111

Van 0 0 0 0 Vdc Vdc Vdc Vdc -Vdc -Vdc -Vdc -Vdc 0 0 0 0

Vbn 0 0 Vdc Vdc 0 0 Vdc Vdc -Vdc -Vdc 0 0 -Vdc -Vdc 0 0

Vcn 0 Vdc 0 Vdc 0 Vdc 0 Vdc -Vdc 0 -Vdc 0 -Vdc 0 -Vdc 0

Vq 0 1 3 Vdc 1 Vdc 3
2 3 Vdc 2 V 3 dc 1 V 3 dc 1 V 3 dc

Vd 0 1 Vdc
3 1 Vdc 3

V0 0
1 V 3 dc 1 V 3 dc 2 V 3 dc 1 V 3 dc 2 V 3 dc 2 V 3 dc

V2 0d q V0 V15 V13 V7 V5 V3 1 3 Vdc 2 Vq = 3 Vdc

Fig. 2.
1 3 Vdc

0 0
1 Vdc 3 1 Vdc 3

0 0 1 Vdc 3
1 3 Vdc 2 3 Vdc 2 V 3 dc 1 V 3 dc 1 V 3 dc

0 0
1 Vdc 3 1 Vdc 3

Vdc -Vdc 2 Vdc 3 2 Vdc 3 1 Vdc 3 2 Vdc 3 1 Vdc 3 1 Vdc 3 0

V11 2V V9 3 dc

0 0
1 Vdc 3 1 Vdc 3

0 V1

1 3 Vdc 2 Vdc 3

Vdc

Switching vectors in q d 0 coordinate space

linear region of ux modulator was derived in [17]. A different technique of implementation of ux modulator for three-phase inverters was shown in [18]. A special three-phase four-switch inverter with ux modulation was used for induction motor applications in [19]. Flux modulator was also implemented for multilevel inverters in [15]. A ux modulator with current control used for grid connected inverters was presented in [20]. An improved dynamic response of ux modulators in uninterruptible power supply (UPS) application with current control was demonstrated in [16]. All these methods were concerned with inverter control in two-dimensional space. The concept of two-dimensional inverter ux vector control for a three-phase three-wire system can be extended to three dimensional inverter ux vector control for a three-phase fourwire system [21]. Two-dimensional control is restricted to situations in which the reference ux vector is conned to the q d plane. With three-dimensional control the reference ux vector can be anywhere in the q d 0 space. This can be used effectively to control a four-leg inverter. This paper presents a three-dimensional ux vector modulator for four-leg sinewave output inverters used to feed nonlinear and unbalanced loads. The implementation steps are discussed in detail. The basic operation of the ux modulator was discussed in [21]. However, the important issue of switching behavior under hysteresis control was absent. The present paper addresses the switching behavior issue in detail. The switching performance is shown in the form of characteristic plots of inverter switching frequency with respect to inverter output frequency. These characteristics can be used to limit and optimize the switching frequencies for different operating frequencies of the inverter by adjusting the hysteresis band. Closed loop voltage control of an experimental four-leg inverter with an LC lter is implemented

using synchronous reference frame PI controllers for the q and d axis ux vector components. The experimental results indicate that the modulator and control system is very effective in providing balanced regulated output voltages even with highly unbalanced nonlinear loads. Filter resonance damping and good dynamic response are also apparent. II. T HREE -D IMENSIONAL S PACE V ECTORS FOR F OUR -L EG I NVERTER In four-leg inverters the load neutral wire is connected to the fourth leg as shown in the Fig. 1. This provides the exibility to control the neutral voltage and hence produces balanced voltages across the load. The maximum voltage across each phase is Vdc . This is an advantage in terms of dc link voltage utilization in comparison with a split dc link capacitor inverter. Although the fourth leg introduces complexity, it gives more exibility to control the voltage using advanced pulse width modulation techniques. In four-leg inverters with three-phase unbalanced loads, electrical variables in a b c coordinates can be transformed to q d 0 coordinates as follows. 1 1 1 Xa Xq 2 2 3 Xd 23 Xb (1) = 2/3 0 2 1 1 1 Xc X0 2 2 2 There are sixteen switch combinations possible in fourleg inverters. The switching vectors are represented by states [Sn ,Sa ,Sb ,Sc ] of the inverter legs. Each leg is denoted by 1 and 0, when upper switch and lower switch of the leg is closed respectively. The switch positions determine the phase to neutral voltages, which are transformed to qd0 coordinates using (1). Table I shows the phase to neutral voltages and the transformed q d 0 voltages for each inverter switching state. Fig. 2 shows the entries of Table I as vectors in the three-dimensional q d 0 space.

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3

Reference Flux Vector

d V14V6 V4 PSfrag replacements V1

Actual Flux Vector

TABLE II S ECTOR WITH CORRESPONDING LIMITS OF TANGENT SLOPE Limits of /3 2/3 4/3 5/3 0 tangent slope T < 2/3 T < T < 4/3 T < 5/3 T < 2 T < /3 Sectors I II III IV V VI

V7 V 5

Fig. 3.

Graphical representation of reference ux tracking

d
T3

III. F LUX M ODULATION

FOR

F OUR -L EG I NVERTER
III T4 IV V T5 (a) VI T6 II

Flux Vector Trajectory d T3 T2

T2 II

qd

A. Principle of the Flux Modulator The inverter ux vector is dened as

t

III I

q
T1 T4 IV V T5 T6 (b) VI

T1

(t) =
0

V d + (0)

(2)

In this, V is the inverter output voltage vector (Fig. 2.) In three-dimensional ux vector modulation, the vector is made to track a reference vector by choosing an appropriate sequence of inverter output voltage vectors. An inverter voltage vector is selected on the basis of the error between and , so that moves towards . Fig. 3 shows the actual ux vector tracking the reference ux vector in the three-dimensional q d 0 space. The ux vector error is sampled at regular intervals T , and the the inverter output voltage vector is chosen so as to keep the vector error within a tolerance band. This is detailed in the next section. B. Implementation of the Flux Modulator The ux modulator is implemented in discrete-time on a digital signal processor (DSP). The sampling time step for the discrete-time implementation is T . This is the time step at which the error between the reference and the actual ux vector, , is sampled for corrective action. In order to realize ux modulator for a four-leg inverter it is necessary to 1) identify the sector on the q d plane in which , the qd q d plane projection of the reference ux vector , is located, as shown in Table II and Fig. 4 2) generate the error bits for the q, d and 0axis component errors as shown in Table III 3) select the inverter voltage vector that reduces the errors in the q, d and 0axis components as shown in Tables IV and V. 1) Sector identication: The location of identies one qd of six sectors (I. . .VI) on the q d plane. This is shown in Table II and Fig. 4. The sector is identied by limits to the slope of the tangent to the trajectory of . These qd limits are given in Table II. It is important to note that, depending on the application, the trajectory of may or qd may not be a circle. In applications with balanced loads, the trajectory would typically be a circle. However, if the inverter has to produce balanced output voltages when unbalanced and nonlinear loads are present, the trajectory of will not be qd a circle. Both situations are shown in Fig. 4. In Fig. 4, the tangents are denoted as T1. . .T6 and the sectors as I. . .VI.

Fig. 4. Sector identication for (a) balanced and (b) unbalanced ux trajectories

2) Error bits generation: The errors in the q, d and 0axis ux vector components are q , d and q d 0 . These errors are used to determine three bits Sq , 0 Sd and S0 as shown in Table III. In this table, the subscript x stands for one of q, d and 0. The error tolerance band is h. 3) Inverter voltage vector selection: The sector information and error bits determined above are used to select an appropriate inverter voltage vector for output during the current time step. The selected vector reduces the error during the time step. There are eight possible inverter voltage vectors which can be selected for any given sector. These are given in Table IV. Further, there are eight possible combinations of the three error bits Sq , Sd and S0 . Each possible vector can correct for a
TABLE III E RROR BITS GENERATION Comparison of Vectors x h x x h x h < x < h x Error Bit Sx = 1 Sx = 0 S x = Sx Next Action Increase x Decrease x No Change

TABLE IV P OSSIBLE SWITCHING VECTORS FOR EACH SECTOR Sector I II III IV V VI Possible Vectors V5 V12 V13 V5 V6 V7 V3 V6 V7 V3 V10 V11 V9 V10 V11 V9 V12 V13

V0 V0 V0 V0 V0 V0

V1 V1 V1 V1 V1 V1

V4 V4 V2 V2 V8 V8

V14 V14 V14 V14 V14 V14

V15 V15 V15 V15 V15 V15

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PSfrag replacements
TABLE V F LUX MODULATOR SWITCHING TABLE Sector I S q Sd S0 000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 111 Vector V1 V14 V5 V4 V1 V14 V13 V12 V7 V6 V5 V4 V1 V14 V1 V14 V3 V2 V7 V6 V1 V14 V1 V14 Sector IV S q Sd S0 000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 111 Vector V3 V2 V1 V14 V11 V10 V1 V14 V1 V14 V1 V14 V11 V10 V9 V8 V1 V14 V1 V14 V9 V8 V13 V12
0.2 0.15 0.15 0.1 0

0.05 0.05

II

0 (Vs)

0.1 0.2 0.4 0.2

d (Vs) 0.2
Fig. 5.

0.1 0.4 0.5 0.3 0.1

0.3

0.5

q (Vs)

Inverter ux vector tracking for unbalanced reference

III

VI

2000

Switching frequency fsw (Hz)

1800 1600 1400 1200 1000 800 600 400 200 0 0 10 20 30 40

h = 0.01nom

2200 1

0.015nom 0.02nom 0.025nom 0.03nom

specic combination of error bits based on the following rules. Select an inverter voltage vector that can reduce the ux component errors in all three axes simultaneously. If no voltage vector can correct all three errors, select a vector which can correct any two errors without affecting the third error. If no voltage vector can correct two errors without affecting the third error, use 0axis vectors. Here 0axis vectors are V0 , V1 , V14 and V15 , shown in Fig. 2. From among the 0axis voltage vectors, use a vector which can reduce the 0axis error. These rules are tabulated as shown in Table V. The ux modulator described above is implemented on a digital signal processor. In the processor, the inverter ux components are updated at constant time intervals of T using Euler explicit integration as given below. q,k = q,k1 + Vq,k1 T d,k = d,k1 + Vd,k1 T 0,k = 0,k1 + V0,k1 T (3)

50

60

70

80

90

100

Fundamental frequency f (Hz)

Fig. 6. Switching frequency characteristics for different h

ux magnitudes are a = 0.4 Vs, b = 0.6 Vs and c = 0.05 Vs. The error tolerance band h = 0.01 Vs. The sampling interval T is 20 s. As seen in Fig. 5, the actual ux vector tracks the reference closely. The trajectory in the threedimensional q d 0 space is an ellipse that is inclined to the q d plane. IV. S WITCHING B EHAVIOR In the linear region, the relation between fundamental output voltage magnitude and the output frequency is given by V = (4)

Here, the subscript k refers to the sample number. The previous voltage vector components are calculated by the digital signal processor on the basis of the information of the previous switching state of the inverter and the dc bus voltage feedback. The ux vector reference, , is usually provided by the sinewave output voltage control loop of the control system. An example of the ux modulator working is shown in Fig. 5. For this example, the modulator is programmed on a 32bit oating point DSP. The a, b and cphase components of the reference ux were made intentionally unbalanced. Fig. 5 shows the inverter ux vector in three-dimensional space, for a dc bus voltage Vdc = 320 V. The angular velocity of the reference ux vector is 2 50 rs1 and the reference

in which V is the magnitude of the fundamental inverter output phase voltage, output angular frequency and is the magnitude of the reference ux vector. From Fig. 2, the spherical limit of the maximum peak fundamental output phase voltage possible in the linear range is 1 Vmax = Vdc 3 (5)

if the inverter delivers full load output voltage at the nominal output frequency nom , then nominal value of the reference ux is 1 Vdc,nom (6) nom = 3 nom

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5

2000

Switching frequency fsw (Hz)

ag replacements
2200 1

1.50nom 1.25nom 0.75nom 1.00nom 0.50nom

as T = 20 s. The ux reference magnitude is set as = nom , if nom max , if nom > max max (8)

1800 1600 1400 1200 1000 800 600 400 200 0 0 10 20 30 40 50 60 70 80 90 100

0.25nom

Fundamental frequency f (Hz)

Fig. 7. Switching frequency characteristics for different

Normalized switching frequency fsw /f

100 90 80 70 60 50 40 30 20 10 0 0 0.1

h = 0.01nom

0.015nom 0.02nom 0.025nom 0.03nom

where nom and max are calculated by (6) and (7), respectively. (8) ensures that the modulator remains in the linear region, over entire range of the fundamental frequency f . The curves of Fig. 6 are independent of the dc-bus voltage Vdc because the tolerance h is represented as a fraction of the nominal ux nom . Fig. 7 shows the averaged switching frequency fsw as a function of the output frequency f , with the reference ux magnitude as the parameter. The hysteresis band value is xed at h = 0.01nom and integration time step T = 20 s. Fig. 8 shows normalized switching characteristics derived from the variable hysteresis band characteristics shown in Fig. 6. These plots are useful during variable fundamental frequency applications of the inverter, as they permit the implementation of a variable hysteresis band to keep the switching frequency constant. V. F OUR -L EG S INEWAVE O UTPUT I NVERTER C ONTROL Fig. 9 shows the closed loop control system for a standalone four-leg sinewave output inverter with an LC lter. The inverter and lter are required to supply regulated and balanced sinusoidal voltages to unbalanced and nonlinear loads. As shown in Fig. 9, the reference voltage vector components are e e denoted by Eqref , Edref and E0ref . The superscript e denotes quantities in the synchronously rotating q e de reference frame. These are derived through transformation of phase reference voltages from the a b c frame. The q d plane component vector of the reference voltage vector is Eqd . This vector component is controlled by the twodimensional ux control method detailed in [8]. The gains of the q and daxis synchronous frame PI controllers shown in Fig. 9 are computed accordingly. The control of the 0axis voltage is given below. The model of an LC lter in q d 0 coordinate is Vqd0
d = Lqd0 dt iqd0 + Eqd0

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

110 Fig. 8.

Normalized output frequency f /fnom

Normalized switching characteristics

The maximum possible value of reference ux to get operation in the linear region is given by max = nom nom Vdc Vdc,nom (7)

The ux reference vector must be contained in a sphere of radius max centered at the origin. Here, Vdc,nom is the nominal dc-bus voltage, which can produce the nominal inverter output voltage at the nominal frequency and nominal ux reference magnitude nom . The maximum ux reference can be calculated using (7) on the basis of the dc-bus voltage feedback Vdc and the desired output frequency [8]. Simulations of switching frequency characteristics are presented here for a nominal frequency fnom = 50 Hz and nominal angular velocity nom = 2fnom . The dc bus voltage is assumed to be at its nominal value. Change of the switching state from ON to OFF and OFF to ON are considered as separate events in the counting of switching in all four legs. The number of switching events is averaged over ve fundamental cycles. Fig. 6 shows the averaged switching frequency fsw as a function of the output frequency f , with the hysteresis band h as the parameter. For Fig. 6, the integration time step is set

(9)

Lqd0

Lf = 0 0

0 Lf 0

0 0 Lf + 3Ln

(10)

Vqd0 , iqd0 and Eqd0 are inverter voltage, inverter output current and lter terminal voltage respectively. The state equations of the inverter and lter for the 0axis components are E0 e0 = +
2 0 f 0 1 0 2 f 0 0 1 Cf 0

E0 e0 v0 i0 (11)

nent e0 is associated with the 0axis voltage component

Equation (11) remains unchanged in synchronous reference 1 . The ux compoframe. The frequency f 0 =
Cf (Lf +3Ln )

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Eabc

6 e Eqref

+
e Edref

controller

PI

e qref qref ejt Switching Pulses dref e dref 0ref E0

e Eq

E0ref
+

controller

PI PI

FLUX MODULATOR

Vabc Lf Eabc iabc

+
FOUR LEG INVERTER

controller

Cf n
Load

Eq ejt Ed abc to qd0

Ln Eabc

e Ed

Fig. 9.

Stand-alone four-leg sinewave output inverter system

across the lter capacitor, and v0 is associated with the VCN 200 V/div 0axis voltage component at the inverter terminals. With a PI regulator, the close loop state equations for the 0axis component are 2 2 0 f 0 f 0 E0 E0 e0 e0 = 1 0 0 2 2 ki0 kp0 f 0 kp0 f 0 v0 v0 VBC 1 0 0 Cf E0refreplacements 200 V/div PSfrag E0ref (12) 0 0 + 0 1 ki0 kp0 kp0 Cf i0 The characteristic polynomial for this system is
2 2 Fs = s3 + kp0 f 0 s2 + f 0 (1 + ki0 ) s

VCN

VBC

(13)
Fig. 10.

Time

2 ms/div

This can be used to determine the PI regulator gains for a specied dynamic response. VI. E XPERIMENTAL R ESULTS To provide experimental validation, the ux modulator and voltage control system described above was implemented to control a stand-alone four-leg sinewave output inverter. The power circuit was built with four insulated gate bipolar transistor (IGBT) legs. The IGBT assembly was rated for 35 A rms current and 1200 V dc bus with 850 F/1200 V dc link capacitors. The LC lter components values were Lf = 3 mH, Ln = 3 mH and Cf = 200 F. The entire control system including the ux modulator was implemented on a platform with a Texas Instruments 32-bit oating point DSP TMS320VC33 with a 13.3 ns instruction cycle. The sampling time for the control system was T = 20 s. The synchronous reference frame PI controller gains for controlling Eqd were set at Kpq = 0.0023, Kiq = 0.175, Kpd = 0.000346, and Kid = 0.538. The gains for the 0-axis controller were Kp0 = 0.1 and Ki0 = 0.08. The sufxes p and i stand for proportional and integral gains respectively. The sufxes q, d and 0 stand for the q d 0 coordinates. Fig. 10 shows the phase voltage VCN and the line voltage VBC at the inverter terminals (Fig. 1.) These were obtained

Experimental phase and line voltage at inverter terminals

with only the ux modulator, for a 50 Hz output frequency, with balanced ux references. The q and daxis ux references each had a magnitude of 0.5 Vs, and the 0axis ux reference was 0 Vs. The value of the tolerance band h = 0.01 Vs. The inverter dc bus voltage was 320 V. Experiments were performed to test different load conditions, such as balanced/unbalanced and linear/nonlinear threephase loads. Here the waveforms for two different load conditions are shown. Fig. 11 shows waveforms for a three-phase diode bridge rectier load on the inverter. The dc side of the rectier has a lter capacitor and a resistive load. The upper three traces show phase voltages and the corresponding phase currents. The lowest trace shows the inverter dc link voltage. Initially the rectier was not connected to the inverter. It was switched on to the inverter at a certain time. Fig. 11 shows the noload, transient, and loaded steady state performance of the system. The high quality sinewave voltage output under no load shows the effectiveness of the active damping of the LC lter resonance.

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7

Ea
40 V/div

Ea

i eplacements 8aA/div
Eb
40 V/div

ia
Eb

PSfrag replacements

Load currents ia , ib , ic (A)

20

ia

ib

ic

10 0

ib

8 A/div

ib
Ec

Ec
40 V/div

30

10 20 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08

ic

8 A/div

ic
Vdc

Vdc
50 V/div

30

Time (s)

Time
Fig. 11.

20 ms/div

Fig. 14. Experimental load currents for unbalanced linear and nonlinear load 50 150

Experimental waveforms with three-phase rectier load

Ea

40 V/div 8 A/div

Ea

Magnitude (% of fundamental)

Fundamental (50 Hz) = 112.4 V peak Total Harmonic Distortion (THD) = 4.20 %

100 80 60 40 20 0 0 200 400 600 800 1000 1200 1400 1600 1800 2000

ia

ia
Eb

replacements b E ib

40 V/div 8 A/div

ib
Ec

Ec

40 V/div 8 A/div

Frequency (Hz)
Harmonic spectrum of the load voltage Ea

ic

ic
in

Fig. 15.

in
3.3 A/div

Vdc
50 V/div

Vdc

Time

20 ms/div

Fig. 12. Experimental waveforms with unbalanced linear load and threephase rectier

Vph
50 V/div

Vph

replacements
Vdc
50 V/div

Vdc

Time
Fig. 13.

200 ms/div

Experimental result of voltage regulation of ux modulator

Fig. 12 shows waveforms with unbalanced linear load and balanced nonlinear loads connected to the inverter. The upper three traces show phase voltages and the corresponding phase currents. The next trace shows the neutral current supplied by the inverter to the unbalanced load. The lowest trace shows the inverter dc link voltage. As in the previous experiment, the inverter was operated on no load initially. The load was switched on to the inverter subsequently. Voltage regulation of the ux modulator is shown in Fig. 13. Here the ux modulator was operated without the output voltage control loop. The reference ux magnitudes were set as a = 0.4, b = 0.4 and c = 0.4. The upper trace shows the output phase voltage across the LC lter capacitor. The lower trace shows the inverter dc link voltage. In the experiment, the dc link voltage was reduced from 330 V to 250 V. It is apparent that there is no change in the output voltage amplitude even after the dc link voltage is reduced. The performance of the four-leg inverter controlled by the control system shown in Fig. 9 is shown here by means of oscillograms and harmonic spectrum plots. Combinations of balanced and unbalanced, linear and nonlinear loads were connected to the inverter. The load on the inverter consisted of three single-phase diode bridge rectiers with unequal dc-side resistances, in parallel with unbalanced linear (resistance in series with inductance) load. This was a case of severe load unbalance, both for the linear and the nonlinear load. The peak of the distorted load current was about 20 A. Fig. 14 shows the three-phase load current oscillogram. The highly distorted

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0 This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication.
8

120
e e Voltages Eq , Ed , E0 (V)

100 80 60 40

e Eq

E0
20 0 0.01 0.02 0.03

e Ed

here is useful for a variable hysteresis band operation of the modulator. This paper has also described the implementation of a voltage control system to regulate the output sinewave voltages feeding unbalanced and nonlinear loads using the ux modulator. The paper has presented experimental validation of the modulator and control system. The results show that the ux modulator proposed here works satisfactorily under balanced and unbalanced, linear and nonlinear load conditions on the inverter.
0.05 0.06 0.07 0.08

20 0

0.04

R EFERENCES
[1] N.-V. Nho, M.-B. Kim, G.-W. Moon and M.-J. Youn, A novel carrier based PWM method in three phase four wire inverters, in Proc. of IEEE Ind. Electron. Society Conf., 2004, pp. 1458-1462. [2] R. Zhang, D. Boroyevich, V. H. Prasad, H. Mao, F. C. Lee and S. Dubovsky, A three-phase inverter with a neutral leg with space vector modulation, in Proc. IEEE APEC, 1997, pp. 857-863. [3] V. H. Prasad, D. Boroyevich and R. Zhang, Analysis and comparison of space vector modulation schemes for a four-leg voltage source inverter, in Proc. IEEE APEC, 1997, pp. 864-871. [4] R. Zhang, V. H. Prasad, D. Boroyevich and F. C. Lee, Three-dimensional space vector modulation for four-leg voltage-source converters, in IEEE Trans. Power Electron., vol. 17, no. 3, May 2002, pp. 314-326. [5] M. G. Villalva and E. Ruppert F., 3-D space vector PWM for threeleg four-wire voltage source inverters, in Proc. IEEE PESC, 2004, pp. 3946-3951. [6] R. R. Sawant and M. C. Chandorkar, A multifunctional four-leg gridconnected compensator, in IEEE Trans. Ind. Appl., vol. 45, no. 1, Jan/Feb 2009, pp. 249-259. [7] D. Shen, P. W. Lehn, Fixed-frequency space-vector-modulation control for three-phase four-leg active power lters, in IEE Proc.- Electric Power Appl., vol. 149, no. 4, July 2002, pp. 268-274. [8] M. Chandorkar, New techniques for inverter ux control, in IEEE Trans. Ind. Appl., vol. 37, no. 3, May/June 2001, pp. 880-887. [9] A. M. Trzynadlowski, M. Bech, F. Blaabjerg and J. Pedersen, An integral space-vector PWM technique for DSP-controlled voltage-source inverters, in IEEE Trans. Ind. Appl., vol. 35, no. 5, Sept./Oct. 1999, pp. 1091-1097. [10] F. Jurado, Novel Fuzzy Flux Control for Fuel-Cell Inverters, in IEEE Trans. Ind. Electron., vol. 52, no. 6, Dec. 2005, pp. 1707-1710. [11] S. Bhattacharya, A. Veltman, D. M. Divan and R. D. Lorenz, Fluxbased active lter controller, in IEEE Trans. Ind. Appl., vol. 32, no. 3, May/June 1996, pp. 491-502. [12] B. Shi, M. Chandorkar and G. Venkataramanan, Modeling and Design of a Regulator for Three Phase PWM Inverters with Constant Switching Frequency, in European Power Electron. Conf., Toulouse, France, 2003. [13] P. C. Loh and D. G. Holmes, A multidimensional variable band ux modulator for four-phase-leg voltage source inverters, in IEEE Trans. Power Electron., vol. 18, no. 2, March 2003, pp. 628-635. [14] P. C. Loh and D. G. Holmes, A variable band universal ux/charge modulator for VSI and CSI modulation, in IEEE Trans. Ind. Appl., vol. 38, no. 3, May/June 2002, pp. 695-705. [15] P. C. Loh and D. G. Holmes, Flux modulation for multilevel inverters, in IEEE Trans. Ind. Appl., vol. 38, no. 5, Sept./Oct. 2002, pp. 1389-1399. [16] P. C. Loh and G. H. H. Pang, High performance ux-based two-degreeof-freedom uninterruptible power supply, in IEE Proc.- Electric Power Appl., vol. 152, no. 4, July 2005, pp. 915-921. [17] M. Morimoto, S. Sato, K. Sumito and K. Oshitani, Voltage modulation factor of the magnetic ux control PWM method for inverter, in IEEE Trans. Ind. Electron., vol. 38, no. 1, Feb. 1991, pp. 57-61. [18] M. Morimoto, S. Sato, K. Sumito and K. Oshitani, Single-chip microcomputer control of the inverter by the magnetic ux control PWM method, in IEEE Trans. Ind. Electron., vol. 36, no. 1, Feb. 1989, pp. 42-47. [19] D. T. W. Liang and J. Li, Flux vector modulation strategy for a fourswitch three-phase inverter for motor drive applications, in Proc. IEEE PESC, 1997, pp. 612-617. [20] H. Xie, L. Angquist and H.-P. Nee, Novel ux modulated positive and negative sequence deadbeat current control of voltage source converters, in IEEE Power Engg. Society General Meeting, 2006, pp. 1-8. [21] D. C. Patel, R. R. Sawant and M. C. Chandorkar, Control of four-leg sinewave output inverter using ux vector modulation, in Proc. of IEEE Ind. Electron. Society Conf., 2008, pp. 629-634.

Time (s)
Fig. 16. Experimental load voltages in the synchronous reference frame

replacements

0.2 0.1

0 (Vs)

0.1 0.2 0.4 0.2 0 0.2 0 0.4 0.4 0.2 0.4

d (Vs) 0.2

q (Vs)

Fig. 17. Experimental inverter ux vector locus for unbalanced linear and nonlinear load

and unbalanced nature of the load is apparent from this. Fig. 15 shows the load voltage harmonic spectrum. It is apparent that all harmonics are negligibly small compared to e e the fundamental. Fig. 16 shows the load voltages Eq , Ed and E0 in the synchronous reference frame (refer Fig. 9.) e e The references were set to be Eqref = 110 V, Edref = 0 V and E0ref = 0 V. It is apparent that E0 is controlled close to zero, indicating that the zero sequence load voltage component is negligibly small. The control system orients the e load voltage vector so that the daxis voltage component Ed e is zero on average, and the qaxis component Eq has the desired magnitude. In order to achieve balanced sinusoidal load voltages in the presence of such severe load nonlinearity and unbalance, the inverter ux vector locus needs to deviate substantially from a circle lying in the q d plane. The inverter ux vector locus is shown in Fig. 17. VII. C ONCLUSION A ux vector modulation method has been proposed for the control of a sinewave output four-leg inverter. Digital processor implementation of the ux modulator for a four-leg inverter is simple. This paper has described the implementation details of the modulator. The switching behavior described

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9

Dhaval C. Patel received the B.E. degree in Power Electronics Engineering from the Saurashtra University, India in 2002 and the M.E. degree in Electrical Engineering with specialization in Power Electronics and Drives from the Gujarat University, India in 2004. Currently he is working toward the Ph.D. degree at the Department of Electrical Engineering, Indian Institute of Technology - Bombay, India. His current research interests are in the area of diagnosis and analysis of electical machines, power converters and modulation techniques for inverters.

Rajendra R. Sawant (M2000) was born in Maharashtra State, India on February 19, 1968. He received B. E. degree in Electrical Engineering from Marathwada University, Aurangabad, Maharashtra State in 1988, M. Tech. and Ph. D. degree from Power Electronics and Power Systems group, department of Electrical Engineering, Indian Institute of Technology-Bombay, India, in 1996 and 2009, respectively. He was involved in the development of Resonant Converter based Induction Heating Systems as a Power Electronics Consultant and Researcher from 1996 to 2002 with different small scale industries in Mumbai, India. He is involved in teaching Power Electronics and different basic subjects in Electrical Engineering for the last 18 Years in Mumbai University at the undergraduate and graduate level. Presently, he is working as a Professor and Head with the Dept. of Electronics and Telecom. at Rajiv Gandhi Institute of Technology, University of Mumbai, India. His research interest are active power lters and power conditioners, grid connected converter control, converters for distributed generations and micro-grid, resonant converters for induction heating systems, simulation of electric circuits and systems, etc.

Mukul C. Chandorkar (M84) received the B. Tech. degree from the Indian Institute of Technology - Bombay, the M. Tech. degree from the Indian Institute of Technology - Madras, and the Ph.D. degree from the University of Wisconsin-Madison, in 1984, 1987 and 1995 respectively, all in electrical engineering. He has several years of experience in the power electronics industry in India, Europe and the USA. During 1996-1999, he was with ABB Corporate Research Ltd., Baden-Daettwil, Switzerland. He is currently a professor in the electrical engineering department at the Indian Institute of Technology - Bombay. His technical interests include electric power quality compensation, drives, and the real-time simulation of electrical systems.

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Authorized licensed use limited to: Universidad Tecnica Federico Santa Maria. Downloaded on November 3, 2009 at 22:38 from IEEE Xplore. Restrictions apply.