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Analog signal processing Vs Digital Signal Processing

In analog processing system the information is represented as an analog quantity. ie; something

that varies continuously with time. This "something" can be voltage , current etc

signal that comes out of a microphone is analog in nature. The varying voltage from the microphone

is processed using an analog signal processing system known as "amplifier" , and reproduced through a speaker.

. for example, the

Where in Digital Signal Processing system , the information is represented in digital format. The signals that are to be processed is converted into numerical form before any processing. This conversion is known as sampling. The information contained in an analog signal is first converted to digital samples which are equally spaced in time. The figure below shows an analog signal and its sampled version.

Each of these samples are converted in to a numerical value and stored in the computer's memory. Processing is then done on these samples. The sampling in a Digital Signal Processing system is governed by a theorem known as sampling theorem.

Sampling theorem

According to sampling theorem, an analog signal can be exactly reconstructed from its samples

if the sampling rate is at least twice the highest frequency component present in the signal. This means, if the signal contains the highest frequency component of 1KHz, the sampling rate must be

at least 2 Kilo Samples/ Second. This sampling rate is also known as Nyquist rate.

sampling theorem is not satisfied

sample rate less than Nyquist rate. This leads to unacceptable distortion in the signal . this distortion is known as aliasing. Due to aliasing , the components present in the input signal whose frequency is higher Nyquist frequency will be sampled as a signal of lower frequency. And this aliased samples in turn corrupts the original signal which is lower than Nyquist frequency. Due to the

presence of aliasing , a signal that contains frequency components higher than Nyquist frequency can not be reconstructed from it's samples. The effect of aliasing is shown in the figure below.

What if

?

violation of sampling theorem means , sampling the signal at a

The signal shown in black color is the original signal. While the signal shown in violate color is the aliased signal because of improper sampling. From the figure it is obvious that the aliased signal will be present in the sampled data as a lower frequency signal. And this will affect the original content at that frequency.

It should be noted that the information in between two consecutive samples is lost forever. But still the entire signal can be reconstructed from the samples as long as Sampling theorem is satisfied.

Sampling and quantization

Sampling can be viewed theoretically as multiplying the original signal with a train of pulses with unit amplitude. This leaves the original signal with information at descrete points with magnitude of signal present in the original signal at that position. This is illustrated in the figure below.

This can be implemented using an AND gate as shown below.

Now samples of the input signal is taken at discrete points. But in order to manipulate the signal

with a microprocessor or micro controller, these pulses has to be converted in to numbers. Before this conversion, the pulses are quantized to some finite number of quantization levels. For example,

if the quantization levels are 0,1,2,3, etc

quantized to either 1 or 2. This in fact introduces a noise in the sampled signal. Such noise in known

as quantization noise.

Quantization (signal processing)

, a pulse with magnitude between 1 and 2 will be

Discrete signal

Digital signal (after quantization has occurred)

In digital signal processing, quantization is the process of approximating a continuous range of

values (or a very large set of possible discrete values) by a relatively small set of discrete symbols or integer values. More specifically, a signal can be multi­dimensional and quantization need not be applied to all dimensions. Discrete signals (a common mathematical model) need not be quantized, which can be a point of confusion.

A common use of quantization is in the conversion of a discrete signal (a sampled continuous

signal) into a digital signal by quantizing. Both of these steps (sampling and quantizing) are performed in analog­to­digital converters with the quantization level specified in bits. A specific example would be compact disc (CD) audio which is sampled at 44,100 Hz and quantized with 16

bits (2 bytes) which can be one of 65,536 (i.e. 2 16 ) possible values per sample.

In electronics, adaptive quantization is a quantization process that varies the step size based on the

changes of the input signal, as a means of efficient compression.Two approaches commonly used are forward adaptive quantization and backward adaptive quantization.

Mathematical description

Quantization is referred to as scalar quantization, since it operates on scalar (as opposed to multi­ dimensional vector) input data. In general, a scalar quantization operator can be represented as

whereng an integer result

that is sometimes referred to as the quantization index,

f(x) and g(i) are arbitrary real­valued functions.

The integer­valued quantization index i is the representation that is typically stored or transmitted, and then the final interpretation is constructed using g(i) when the data is later interpreted.

In computer audio and most other applications, a method known as uniform quantization is the most common. There are two common variations of uniform quantization, called mid­rise and mid­tread uniform quantizers.

If x is a real­valued number between ­1 and 1, a mid­rise uniform quantization operator that uses M bits of precision to represent each quantization index can be expressed as

.

In this case the f(x) and g(i) operators are just multiplying scale factors (one multiplier being the inverse of the other) along with an offset in g(i) function to place the representation value in the middle of the input region for each quantization index. The value 2 (M 1) is often referred to as the quantization step size. Using this quantization law and assuming that quantization noise is approximately uniformly distributed over the quantization step size (an assumption typically accurate for rapidly varying x or high M) and further assuming that the input signal x to be quantized is approximately uniformly distributed over the entire interval from ­1 to 1, the signal to noise ratio (SNR) of the quantization can be computed as

.

From this equation, it is often said that the SNR is approximately 6 dB per bit.

For mid­tread uniform quantization, the offset of 0.5 would be added within the floor function instead of outside of it.

Sometimes, mid­rise quantization is used without adding the offset of 0.5. This reduces the signal to noise ratio by approximately 6.02 dB, but may be acceptable for the sake of simplicity when the step size is small.

In digital telephony, two popular quantization schemes are the 'A­law' (dominant in Europe) and ' μ ­ law' (dominant in North America and Japan). These schemes map discrete analog values to an 8­bit scale that is nearly linear for small values and then increases logarithmically as amplitude grows. Because the human ear's perception of loudness is roughly logarithmic, this provides a higher signal to noise ratio over the range of audible sound intensities for a given number of bits.

Nyquist–Shannon sampling theorem

Fig: Hypothetical spectrum of a bandlimited signal as a function of frequency

The Nyquist–Shannon sampling theorem is a fundamental result in the field of information theory, in particular telecommunications and signal processing. Sampling is the process of converting a signal (for example, a function of continuous time or space) into a numeric sequence (a function of discrete time or space). The theorem states:[1]

If a function x(t) contains no frequencies higher than B cps, it is completely determined by giving its ordinates at a series of points spaced 1/(2B) seconds apart.

In essence the theorem shows that an analog signal that has been sampled can be perfectly reconstructed from the samples if the sampling rate exceeds 2B samples per second, where B is the highest frequency in the original signal. If a signal contains a component at exactly B hertz, then samples spaced at exactly 1/(2B) seconds do not completely determine the signal, Shannon's statement notwithstanding.

More recent statements of the theorem are sometimes careful to exclude the equality condition; that is, the condition is if x(t) contains no frequencies higher than or equal to B; this condition is equivalent to Shannon's except when the function includes a steady sinusoidal component at exactly frequency B.

The assumptions necessary to prove the theorem form a mathematical model that is only an idealization of any real­world situation. The conclusion that perfect reconstruction is possible is mathematically correct for the model but only an approximation for actual signals and actual sampling techniques.

The theorem also leads to a formula for reconstruction of the original signal. The constructive proof of the theorem leads to an understanding of the aliasing that can occur when a sampling system does not satisfy the conditions of the theorem.

The Nyquist–Shannon sampling theorem is also known to be a sufficient condition. The field of Compressed sensing provides a stricter sampling condition when the underlying signal is known to be sparse. Compressed sensing specifically yields a sub­Nyquist sampling criterion.

Downsampling

When a signal is downsampled, the sampling theorem can be invoked via the artifice of resampling a hypothetical continuous­time reconstruction. The Nyquist criterion must still be satisfied with respect to the new lower sampling frequency in order to avoid aliasing. To meet the requirements of the theorem, the signal must usually pass through a low­pass filter of appropriate cutoff frequency as part of the downsampling operation. This low­pass filter, which prevents aliasing, is called an anti­aliasing filter.

Critical frequency

Fig: A family of sinusoids at the critical frequency, all having the same sample sequences of alternating +1 and –1. That is, they all are aliases of each other, even though their frequency is not above half the sample rate.

The Nyquist rate is defined as twice the bandwidth of the continuous­time signal. The sampling frequency must be strictly greater than the Nyquist rate of the signal to achieve unambiguous representation of the signal. This constraint is equivalent to requiring that the system's Nyquist frequency (also known as critical frequency, and equal to half the sample rate) be strictly greater than the bandwidth of the signal. If the signal contains a frequency component at precisely the Nyquist frequency then the corresponding component of the sample values cannot have sufficient information to reconstruct the Nyquist­frequency component in the continuous­time signal because of phase ambiguity. In such a case, there would be an infinite number of possible and different sinusoids (of varying amplitude and phase) of the Nyquist­frequency component that are represented by the discrete samples.

As an example, consider this family of signals at the critical frequency:

Where the samples

are in every case just alternating –1 and +1, for any phase θ . There is no way to determine either the amplitude or the phase of the continuous­time sinusoid x(t) that x(nT) was sampled from. This ambiguity is the reason for the strict inequality of the sampling theorem's condition.

Analog­to­digital converter

An analog­to­digital converter (abbreviated ADC, A/D or A to D) is a device which converts continuous signals to discrete digital numbers. The reverse operation is performed by a digital­to­ analog converter (DAC).

Typically, an ADC is an electronic device that converts an input analog voltage (or current) to a digital number. However, some non­electronic or only partially electronic devices, such as rotary encoders, can also be considered ADCs. The digital output may use different coding schemes, such as binary, Gray code or two's complement binary.

Concepts

Resolution

The resolution of the converter indicates the number of discrete values it can produce over the range of analog values. The values are usually stored electronically in binary form, so the resolution is usually expressed in bits. In consequence, the number of discrete values available, or "levels", is usually a power of two. For example, an ADC with a resolution of 8 bits can encode an analog input to one in 256 different levels, since 2 8 = 256. The values can represent the ranges from 0 to 255 (i.e. unsigned integer) or from ­128 to 127 (i.e. signed integer), depending on the application.

Resolution can also be defined electrically, and expressed in volts. The voltage resolution of an ADC is equal to its overall voltage measurement range divided by the number of discrete intervals as in the formula:

Where:

Q is resolution in volts per step (volts per output code),

E FSR is the full scale voltage range = V RefHi V RefLo ,

M is the ADC's resolution in bits, and

N is the number of intervals, given by the number of available levels (output codes), which is:

N = 2 M

Some examples may help:

 • Example 1 • Full scale measurement range = 0 to 10 volts • ADC resolution is 12 bits: 2 12 = 4096 quantization levels (codes) • ADC voltage resolution is: (10V ­ 0V) / 4096 codes = 10V / 4096 codes 0.00244 volts/code 2.44 mV/code •

Example 2

Full scale measurement range = ­10 to +10 volts

ADC resolution is 14 bits: 2 14 = 16384 quantization levels (codes)

ADC voltage resolution is: (10V ­ (­10V)) / 16384 codes = 20V / 16384 codes

Example 3

0.00122 volts/code

1.22 mV/code

Full scale measurement range = 0 to 8 volts

ADC resolution is 3 bits: 2 3 = 8 quantization levels (codes)

ADC voltage resolution is: (8 V 0 V)/8 codes = 8 V/8 codes = 1 volts/code = 1000 mV/code

In practice, the smallest output code ("0" in an unsigned system) represents a voltage range which is 0.5X of the ADC voltage resolution (Q)(meaning half­wide of the ADC voltage Q ) while the largest output code represents a voltage range which is 1.5X of the ADC voltage resolution (meaning 50% wider than the ADC voltage resolution). The other N 2 codes are all equal in width and represent the ADC voltage resolution (Q) calculated above. Doing this centers the code on an input voltage that represents the Mth division of the input voltage range. For example, in Example 3, with the 3­bit ADC spanning an 8 V range, each of the N divisions would represent 1 V, except the 1st ("0" code) which is 0.5 V wide, and the last ("7" code) which is 1.5 V wide. Doing this the "1" code spans a voltage range from 0.5 to 1.5 V, the "2" code spans a voltage range from 1.5 to 2.5 V, etc. Thus, if the input signal is at 3/8ths of the full­scale voltage, then the ADC outputs the "3" code, and will do so as long as the voltage stays within the range of 2.5/8ths and 3.5/8ths. This practice is called "Mid­Tread" operation. This type of ADC can be modeled mathematically as:

The exception to this convention seems to be the Microchip PIC processor, where all M steps are equal width. This practice is called "Mid­Rise with Offset" operation.

In practice, the useful resolution of a converter is limited by the best signal­to­noise ratio that can be achieved for a digitized signal. An ADC can resolve a signal to only a certain number of bits of resolution, called the "effective number of bits" (ENOB). One effective bit of resolution changes the signal­to­noise ratio of the digitized signal by 6 dB, if the resolution is limited by the ADC. If a preamplifier has been used prior to A/D conversion, the noise introduced by the amplifier can be an important contributing factor towards the overall SNR.

Response type

Most ADCs are of a type known as linear, although analog­to­digital conversion is an inherently non­linear process (since the mapping of a continuous space to a discrete space is a piecewise­ constant and therefore non­linear operation). The term linear as used here means that the range of the input values that map to each output value has a linear relationship with the output value, i.e.,

that the output value k is used for the range of input values from

m(k + b)

to

m(k + 1 + b),

where m and b are constants. Here b is typically 0 or 0.5. When b = 0, the ADC is referred to as mid­rise, and when b = 0.5 it is referred to as mid­tread.

If the probability density function of a signal being digitized is uniform, then the signal­to­noise ratio relative to the quantization noise is the best possible. Because this is often not the case, it's usual to pass the signal through its cumulative distribution function (CDF) before the quantization. This is good because the regions that are more important get quantized with a better resolution. In the dequantization process, the inverse CDF is needed.

This is the same principle behind the companders used in some tape­recorders and other communication systems, and is related to entropy maximization. (Never confuse companders with compressors!)

For example, a voice signal has a Laplacian distribution. This means that the region around the lowest levels, near 0, carries more information than the regions with higher amplitudes. Because of this, logarithmic ADCs are very common in voice communication systems to increase the dynamic range of the representable values while retaining fine­granular fidelity in the low­amplitude region.

An eight­bit a­law or the μ ­law logarithmic ADC covers the wide dynamic range and has a high resolution in the critical low­amplitude region, that would otherwise require a 12­bit linear ADC.

Accuracy

An ADC has several sources of errors. Quantization error and (assuming the ADC is intended to be linear) non­linearity is intrinsic to any analog­to­digital conversion. There is also a so­called aperture error which is due to a clock jitter and is revealed when digitizing a time­variant signal (not a constant value).

These errors are measured in a unit called the LSB, which is an abbreviation for least significant bit. In the above example of an eight­bit ADC, an error of one LSB is 1/256 of the full signal range, or about 0.4%.

Quantization error

Quantization error is due to the finite resolution of the ADC, and is an unavoidable imperfection in all types of ADC. The magnitude of the quantization error at the sampling instant is between zero and half of one LSB.

In the general case, the original signal is much larger than one LSB. When this happens, the quantization error is not correlated with the signal, and has a uniform distribution. Its RMS value is

the standard deviation of this distribution, given by ADC example, this represents 0.113% of the full signal range.

At lower levels the quantizing error becomes dependent of the input signal, resulting in distortion.

. In the eight­bit

This distortion is created after the anti­aliasing filter, and if these distortions are above 1/2 the sample rate they will alias back into the audio band. In order to make the quantizing error independent of the input signal, noise with an amplitude of 1 quantization step is added to the signal. This slightly reduces signal to noise ratio, but completely eliminates the distortion. It is known as dither.

Non­linearity

All ADCs suffer from non­linearity errors caused by their physical imperfections, resulting in their output to deviate from a linear function (or some other function, in the case of a deliberately non­ linear ADC) of their input. These errors can sometimes be mitigated by calibration, or prevented by testing.

Important parameters for linearity are integral non­linearity (INL) and differential non­linearity (DNL). These non­linearities reduce the dynamic range of the signals that can be digitized by the ADC, also reducing the effective resolution of the ADC.

Conversion from analog to digital form inherently involves comparator action where the value of the analog voltage at some point in time is compared with some standard. A common way to do that is to apply the analog voltage to one terminal of a comparator and trigger a binary counter which drives a DAC. The output of the DAC is applied to the other terminal of the comparator. Since the output of the DAC is increasing with the counter, it will trigger the comparator at some point when its voltage exceeds the analog input. The transition of the comparator stops the binary counter, which at that point holds the digital value corresponding to the analog voltage.

Illustration of 4­bit SAC with 1 volt step size (after Tocci, Digital Systems).

The successive approximation ADC is much faster than the digital ramp ADC because it uses digital logic to converge on the value closest to the input voltage. A comparator and a DAC are used in the process.

Illustrated is a 3­bit flash ADC with resolution 1 volt (after Tocci). The resistor net and comparators provide an input to the combinational logic circuit, so the conversion time is just the propagation delay through the network ­ it is not limited by the clock rate or some convergence sequence. It is the fastest type of ADC available, but requires a comparator for each value of output (63 for 6­bit, 255 for 8­bit, etc.) Such ADCs are available in IC form up to 8­bit and 10­bit flash ADCs (1023 comparators) are planned. The encoder logic executes a truth table to convert the ladder of inputs to the binary number output.

Digital­to­analog converter

In electronics, a digital­to­analog converter (DAC or D­to­A) is a device for converting a digital

(usually binary) code to an analog signal (current, voltage or electric charge).

An analog­to­digital converter (ADC) performs the reverse operation.

Basic ideal operation

Ideally sampled signal. Signal of a typical interpolating DAC output

A DAC converts an abstract finite­precision number (usually a fixed­point binary number) into a

concrete physical quantity (e.g., a voltage or a pressure). In particular, DACs are often used to

convert finite­precision time series data to a continually­varying physical signal.

A typical DAC converts the abstract numbers into a concrete sequence of impulses that are then

processed by a reconstruction filter uses some form of interpolation to fill in data between the impulses. Other DAC methods (e.g., methods based on Delta­sigma modulation) produce a pulse­ density modulated signal that can then be filtered in a similar way to produce a smoothly­varying signal.

By the Nyquist–Shannon sampling theorem, sampled data can be reconstructed perfectly provided that its bandwidth meets certain requirements (e.g., a baseband signal with bandwidth less than the Nyquist frequency). However, even with an ideal reconstruction filter, digital sampling introduces quantization error that makes perfect reconstruction practically impossible. Increasing the digital resolution (i.e., increasing the number of bits used in each sample) or introducing sampling dither can reduce this error.

Practical operation

Instead of impulses, usually the sequence of numbers update the analogue voltage at uniform sampling intervals.

These numbers are written to the DAC, typically with a clock signal that causes each number to be latched in sequence, at which time the DAC output voltage changes rapidly from the previous value

 to the value represented by the currently latched number. The effect of this is that the output voltage is held in time at the current value until the next input number is latched resulting in a piecewise

constant or 'staircase' shaped output. This is equivalent to a zero­order hold operation and has an

effect on the frequency response of the reconstructed signal.

Piecewise constant signal typical of a zero­order (non­interpolating) DAC output.

The fact that practical DACs output a sequence of piecewise constant values or rectangular pulses would cause multiple harmonics above the nyquist frequency. These are typically removed with a low pass filter acting as a reconstruction filter.

However, this filter means that there is an inherent effect of the zero­order hold on the effective frequency response of the DAC resulting in a mild roll­off of gain at the higher frequencies (often a 3.9224 dB loss at the Nyquist frequency) and depending on the filter, phase distortion. This high­ frequency roll­off is the output characteristic of the DAC, and is not an inherent property of the sampled data.

Applications

Audio

Most modern audio signals are stored in digital form (for example MP3s and CDs) and in order to be heard through speakers they must be converted into an analog signal. DACs are therefore found

Specialist stand­alone DACs can also be found in high­end hi­fi systems. These normally take the digital output of a CD player (or dedicated transport) and convert the signal into a line­level output that can then be fed into a pre­amplifier stage.

Similar digital­to­analog converters can be found in digital speakers such as USB speakers, and in sound cards.

Video

Video signals from a digital source, such as a computer, must be converted to analog form if they are to be displayed on an analog monitor. As of 2007, analog inputs are more commonly used than digital, but this may change as flat panel displays with DVI and/or HDMI connections become more widespread. A video DAC is, however, incorporated in any Digital Video Player with analog outputs. The DAC is usually integrated with some memory (RAM), which contains conversion tables for gamma correction, contrast and brightness, to make a device called a RAMDAC.

A device that is distantly related to the DAC is the digitally controlled potentiometer, used to control

an analog signal digitally.

DAC types

The most common types of electronic DACs are:

Four­Bit D/A Converter

One way to achieve D/A conversion is to use a summing amplifier.

This approach is not satisfactory for a large number of bits because it requires too much precision in the summing resistors. This problem is overcome in the R­2R network DAC.

Summing Amplifier

This is an example of an inverting amplifier of gain=1 with multiple inputs. More than two inputs can be used, for example in an audio mixer circuit. The input resistors can be unequal, giving a weighted sum.

The summing amplifier with the R­2R ladder of resistances shown produces the output

where the D's take the value 0 or 1. The digital inputs could be TTL voltages which close the switches on a logical 1 and leave it grounded for a logical 0. This is illustrated for 4 bits, but can be extended to any number with just the resistance values R and 2R.

the Pulse Width Modulator, the simplest DAC type. A stable current or voltage is switched into a low pass analog filter with a duration determined by the digital input code. This technique is often used for electric motor speed control, and is now becoming common in high­fidelity audio.

Oversampling DACs or Interpolating DACs such as the Delta­Sigma DAC, use a pulse density conversion technique. The oversampling technique allows for the use of a lower resolution DAC internally. A simple 1­bit DAC is often chosen because the oversampled result is inherently linear. The DAC is driven with a pulse density modulated signal, created

with the use of a low­pass filter, step nonlinearity (the actual 1­bit DAC), and negative feedback loop, in a technique called delta­sigma modulation. This results in an effective high­pass filter acting on the quantization (signal processing) noise, thus steering this noise out of the low frequencies of interest into the high frequencies of little interest, which is called noise shaping (very high frequencies because of the oversampling). The quantization noise at these high frequencies are removed or greatly attenuated by use of an analog low­ pass filter at the output (sometimes a simple RC low­pass circuit is sufficient). Most very high resolution DACs (greater than 16 bits) are of this type due to its high linearity and low cost. Higher oversampling rates can either relax the specifications of the output low­pass filter and enable further suppression of quantization noise. Speeds of greater than 100 thousand samples per second (for example, 192kHz) and resolutions of 24 bits are attainable with Delta­Sigma DACs. A short comparison with pulse width modulation shows that a 1­bit DAC with a simple first­order integrator would have to run at 3 THz (which is physically unrealizable) to achieve 24 meaningful bits of resolution, requiring a higher order low­pass filter in the noise­shaping loop. A single integrator is a low pass filter with a frequency response inversely proportional to frequency and using one such integrator in the noise­ shaping loop is a first order delta­sigma modulator. Multiple higher order topologies (such as MASH) are used to achieve higher degrees of noise­shaping with a stable topology.

the Binary Weighted DAC, which contains one resistor or current source for each bit of the DAC connected to a summing point. These precise voltages or currents sum to the correct output value. This is one of the fastest conversion methods but suffers from poor accuracy because of the high precision required for each individual voltage or current. Such high­ precision resistors and current­sources are expensive, so this type of converter is usually limited to 8­bit resolution or less.

the R­2R ladder DAC, which is a binary weighted DAC that uses a repeating cascaded structure of resistor values R and 2R. This improves the precision due to the relative ease of producing equal valued matched resistors (or current sources). However, wide converters perform slowly due to increasingly large RC­constants for each added R­2R link.

the Thermometer coded DAC, which contains an equal resistor or current source segment for each possible value of DAC output. An 8­bit thermometer DAC would have 255 segments, and a 16­bit thermometer DAC would have 65,535 segments. This is perhaps the fastest and highest precision DAC architecture but at the expense of high cost. Conversion speeds of >1 billion samples per second have been reached with this type of DAC.

Hybrid DACs, which use a combination of the above techniques in a single converter. Most DAC integrated circuits are of this type due to the difficulty of getting low cost, high speed and high precision in one device.

the Segmented DAC, which combines the thermometer coded principle for the most significant bits and the binary weighted principle for the least significant bits. In this way, a compromise is obtained between precision (by the use of the thermometer coded principle) and number of resistors or current sources (by the use of the binary weighted principle). The full binary weighted design means 0% segmentation, the full thermometer coded design means 100% segmentation.

DAC performance

DACs are at the beginning of the analog signal chain, which makes them very important to system performance. The most important characteristics of these devices are:

Resolution: This is the number of possible output levels the DAC is designed to reproduce. This is usually stated as the number of bits it uses, which is the base two logarithm of the

number of levels. For instance a 1 bit DAC is designed to reproduce 2 (2 1 ) levels while an 8 bit DAC is designed for 256 (2 8 ) levels. Resolution is related to the Effective Number of Bits (ENOB) which is a measurement of the actual resolution attained by the DAC.

Maximum sampling frequency: This is a measurement of the maximum speed at which the DACs circuitry can operate and still produce the correct output. As stated in the Nyquist– Shannon sampling theorem, a signal must be sampled at over twice the frequency of the desired signal. For instance, to reproduce signals in all the audible spectrum, which includes frequencies of up to 20 kHz, it is necessary to use DACs that operate at over 40 kHz. The CD standard samples audio at 44.1 kHz, thus DACs of this frequency are often used. A common frequency in cheap computer sound cards is 48 kHz – many work at only this frequency, offering the use of other sample rates only through (often poor) internal resampling.

monotonicity: This refers to the ability of DACs analog output to increase with an increase in digital code or the converse. This characteristic is very important for DACs used as a low frequency signal source or as a digitally programmable trim element.

THD+N: This is a measurement of the distortion and noise introduced to the signal by the DAC. It is expressed as a percentage of the total power of unwanted harmonic distortion and noise that accompany the desired signal. This is a very important DAC characteristic for dynamic and small signal DAC applications.

Dynamic range: This is a measurement of the difference between the largest and smallest signals the DAC can reproduce expressed in decibels. This is usually related to DAC resolution and noise floor.

Other measurements, such as Phase distortion and Sampling Period Instability, can also be very important for some applications.