What is an ALU?

ALU stands for the Arithmetic logic unit and it is an internal part of the processor which is used for all the mathematical and logical operations. The operations of the ALU includes multiplying the binary values and performing the logical operations such as AND, OR and XOR, integer arithmetic operations and Bit-shifting operations etc. ALU is the fundamental building block of the processor. Application of ALU
Power consumption is a critical design issue in embedded processor design. One of common components in the processor is the Arithmetic and Logic Unit (ALU). Usually, ALUs are designed with a combinational logic circuit containing a number of functional components for different arithmetic and logic operations. An ALU can be constructed with a tree or a chain structure. Existing approaches to reduce power often achieve power reduction at the cost of increased design complexity, thus resulting in delay and area overheads. In this paper, we present a customization approach for the chain-structure based ALU design by repositioning functional components in the chain. The approach can be easily integrated into a processor design environment to effectively reduce ALU power consumption for a given application. We have applied our approach to a set of benchmarks. Ourexperimental results show that the power savings range from 43.5% to 49.6%; on average, 46.9% of ALU power reduction can be achieved. Most importantly, this achievement is at cost of neither hardware complexity nor processor performance, and the implementation is extremely straightforward

Functional block diagram of ALU.

Figure 1: Block diagram of the 4-bit ALU.

74LS382/74HC382 (Block symbol of ALU chip)

ADD operation,
((7 + 5)/9)*3 and (7 + 5)/(9 / 3) are the only solutions (using operations +, -, *, /, and ^). I did a brute force computer search through all 5 distinct parenthesizations and 64 variations on operations. This does not include the unary -. Edit: I was curious, so I tried allowing negatives. There are 112 solutions if you allow unary operations. Most of these are variations on the same few operations and could be unified to a single operation by applying commutativity and associativity in various places. ((7+(-5))+(-9))+3 = -4 7+((-5)+((-9)+3)) = -4 7+(((-5)+(-9))+3) = -4 (7+((-5)+(-9)))+3 = -4 (7+(-5))+((-9)+3) = -4 (((-7)+5)+9)+(-3) = 4 (-7)+(5+(9+(-3))) = 4 (-7)+((5+9)+(-3)) = 4 ((-7)+(5+9))+(-3) = 4

SUBTRACT operations

Intersect, Join and Subtract Operations

Overview of Intersect Operations
An Intersect operation takes the records that two tables have in common and uses them to create a new table. For example, you have two tables containing customer data. One contains customer identification numbers and names, the other contains customer identification numbers and telephone numbers, as shown in the following diagram: Master Table

Customer ID

Name

001

Wayne Coyne

002

Franz Kline

003

Alison Krauss

004

Jane Smith

005

Erica Noonan

006

Jim Jackson

Transaction Table

Customer ID

Telephone No

001

555-1911

002

555-3323

003

555-9834

004

555-2634

By using an Intersect operation, you can create a table of customers that contains both names and telephone numbers. Any record from the master table which does not match a record in the transaction table is excluded from the result table. Result Table

Customer ID

Name

Telephone No

001

Wayne Coyne

555-1911

, XOR operation

Binary XOR Operation

The binary XOR (exclusive OR) operation has two inputs and one output. It is like the ADD operation which takes two arguments (two inputs) and produces one result (one output). The inputs to a binary XOR operation can only be 0 or 1 and the result can only be 0 or 1 The binary XOR operation (also known as the binary XOR function) will always produce a 1 output if either of its inputs is 1 and will produce a 0output if both of its inputs are 0 or 1. If we call the inputs A and B and the output C we can show the XOR function as:
A 0 0 1 1 XOR XOR XOR XOR B C 0 -> 0 1 -> 1 0 -> 1 1 -> 0

The PIC machine code XOR instruction operates on 8 sets of inputs and outputs in parallel.

If we XOR two input bytes together on the PIC we get an output byte. If we give each bit within a byte a number we can see that each bit in the output is the result of the XOR function on two corresponds bits of the input

XOR

A connective in logic known as the "exclusive or," or exclusive disjunction. It yields true if exactly one (but not both) of two conditions is true. The XOR operation does not have a standard symbol, but is sometimes denoted (this work) or (Simpson 1987, pp. 539 and 550-554). is read " aut ," where

"aut" is Latin for "or, but not both." The circuit diagram symbol for an XOR gate is illustrated above. In set theory, is typically called the symmetric difference. The XOR function is implemented

as Xor[predicate1, predicate2, ...]. The binary XOR operation using AND and OR gates as (1 ) (2 ) where denotes AND and denotes OR, and can be implemented using onlyNOT and NAND gates as (3 ) (Simpson 1987), where denotes NAND. is identical to nonequivalence . can be implemented

The binary XOR operator has the following truth table.

T T F T F T F T T F F F

The binomial coefficient

mod 2 can be computed using the XOR operation XOR

, making Pascal's

triangle mod 2 very easy to construct. For multiple arguments, XOR is defined to be true if an odd number of its arguments are true, and false otherwise. This definition is quite common in computer science, where XOR is usually thought of as addition modulo 2. In this context, it arises in polynomial algebra modulo 2, arithmetic circuits with a full adder, and in parity generating or checking. While this means that the multiargument "XOR" can no longer be thought of as "the exclusive OR" operation, this form is rarely used in mathematical logic and so does not cause very much confusion. The XOR operation is associative, so is the same as . Computation of the

multiargument XOR requires evaluation of all its arguments to determine the truth value, and hence there is no "lazy" special evaluation form (as there is for AND and OR). The ternary XOR operator therefore has the following truth table.

T T T T T T F F T F T F T F F T F T T F F T F T

F F T T F F F F

8.4 The OR operation

The OR operation (occasionally called the inclusive-OR operation to distinguish it more clearly from the exclusive-OR operation which I shall be introducing shortly) combines binary words bit by bit according to the rules: 0 OR 0 = 0 0 OR 1 = 1 1 OR 0 = 1 1 OR 1 = 1 In other words, the result is 1 when either bit is 1 or when both bits are 1; alternatively, the result is only 0 when both bits are 0. Again, you may prefer to think of it like this: when one bit is 1 or the other bit is 1 the result is 1.

Example 11
Find the result of 1101 1011 OR 1011 1010. Answer The bits in the two words are combined according to the above rules, working along the two words. For instance, the rightmost bit of the result is derived from 1 OR 0 = 1. Doing this for all the bits gives:

so the result is 1111 1011. The OR operation can be used to cause a particular bit in a data word to be set to 1 when required. Think back to the way a single 8-bit word could be used to hold the seven Boolean variables that represent whether the seven segments in a 7-segment display are lit, as introduced in Section 2.6. Imagine that for some purpose the decimal point needs to be lit no matter what number is currently being displayed. The bit corresponding to the decimal point on the display is bit 0, so if an OR operation is carried out between the 8-bit word currently holding the Boolean variables for the 7-segment display and 000 0001 then the result will be to leave the leftmost seven bits unchanged but set bit 0 to 1, which will in turn cause the decimal point to light.

And operation

AND
A bitwise AND takes two binary representations of equal length and performs the logical AND operation on each pair of corresponding bits. For each pair, the result is 1 if the first bit is 1 AND the second bit is 1; otherwise, the result is 0. For example: 0101 (decimal 5) AND 0011 (decimal 3) = 0001 (decimal 1) This may be used to determine whether a particular bit is 1 or 0. For example, given a bit pattern: 0011 (decimal 3), determining whether the second bit is 1 may be done by using a bitwise AND with a bit pattern containing 1 only in that bit: 0011 (decimal 3) AND 0010 (decimal 2) = 0010 (decimal 2) Because the result 0010 is non-zero, we know the second bit in the original pattern was 1. This is often called bit masking. (By analogy, the use of masking tape covers, or masks, portions that should not be altered or portions that are not of interest. In this case, the 0 values mask the bits that are not of interest.) If we store the result, this may also be used to clear selected bits in a register. Given the example: 0110 (decimal 6), the second bit may becleared (i.e. set to 0) by using a bitwise AND with the pattern that has a zero only in the selected bit: 0110 (decimal 6) AND 1101 (decimal 13) = 0100 (decimal 4)

Preset operation
Single Preset Operation, sometimes referred to as "Wide Mode", is an expansion of Two Preset lighting desks, which enables the use of both banks of faders to set a single scene. This scene is then stored into a temporary memory, whilst the next scene is set upblind. The crossfade control then fades in the new scene, and a Preset control button is pressed to store the new scene in the memories. Once this has been performed, the next scene can be set up blind ready for activation at the cue point.