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Product Specification
PowerMOS transistor
BUK444-200A/B
GENERAL DESCRIPTION
N-channel enhancement mode field-effect power transistor in a plastic full-pack envelope. The device is intended for use in Switched Mode Power Supplies (SMPS), motor control, welding, DC/DC and AC/DC converters, and in general purpose switching applications.
PINNING - SOT186
PIN 1 2 3 gate drain source DESCRIPTION
PIN CONFIGURATION
case
SYMBOL
d
case isolated
1 2 3
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS VDGR VGS ID ID IDM Ptot Tstg Tj PARAMETER Drain-source voltage Drain-gate voltage Gate-source voltage Drain current (DC) Drain current (DC) Drain current (pulse peak value) Total power dissipation Storage temperature Junction Temperature CONDITIONS RGS = 20 k Ths = 25 C Ths = 100 C Ths = 25 C Ths = 25 C MIN. - 55 -200A 5.3 3.3 21 25 150 150 MAX. 200 200 30 -200B 4.7 3.0 19 UNIT V V V A A A W C C
THERMAL RESISTANCES
SYMBOL Rth j-hs Rth j-a PARAMETER Thermal resistance junction to heatsink Thermal resistance junction to ambient CONDITIONS with heatsink compound MIN. TYP. 55 MAX. 5 UNIT K/W K/W
April 1993
Rev 1.100
Philips Semiconductors
Product Specification
PowerMOS transistor
BUK444-200A/B
STATIC CHARACTERISTICS
Ths = 25 C unless otherwise specified SYMBOL V(BR)DSS VGS(TO) IDSS IDSS IGSS RDS(ON) PARAMETER Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current Zero gate voltage drain current Gate source leakage current Drain-source on-state resistance CONDITIONS VGS = 0 V; ID = 0.25 mA VDS = VGS; ID = 1 mA VDS = 200 V; VGS = 0 V; Tj = 25 C VDS = 200 V; VGS = 0 V; Tj =125 C VGS = 30 V; VDS = 0 V VGS = 10 V; BUK444-200A BUK444-200B ID = 3.5 A MIN. 200 2.1 TYP. 3.0 1 0.1 10 0.35 0.4 MAX. 4.0 10 1.0 100 0.4 0.5 UNIT V V A mA nA
DYNAMIC CHARACTERISTICS
Ths = 25 C unless otherwise specified SYMBOL gfs Ciss Coss Crss td on tr td off tf Ld Ls PARAMETER Forward transconductance Input capacitance Output capacitance Feedback capacitance Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time Internal drain inductance Internal source inductance CONDITIONS VDS = 25 V; ID = 3.5 A VGS = 0 V; VDS = 25 V; f = 1 MHz VDD = 30 V; ID = 2.9 A; VGS = 10 V; RGS = 50 ; Rgen = 50 Measured from drain lead 6 mm from package to centre of die Measured from source lead 6 mm from package to source bond pad MIN. 3.5 TYP. 5.0 700 100 50 12 45 80 40 4.5 7.5 MAX. 850 160 80 20 70 120 60 UNIT S pF pF pF ns ns ns ns nH nH
Cisol
12
pF
April 1993
Rev 1.100
Philips Semiconductors
Product Specification
PowerMOS transistor
BUK444-200A/B
PD%
100
ID / A
BUK444-200A,B
10
R
( DS
)=
VD
S/
ID
A B
tp = 10 us
100 us 1 ms
DC
10 ms 100 ms
20
40
60
80 Ths / C
100
120
140
Fig.3. Safe operating area. Ths = 25 C ID & IDM = f(VDS); IDM single pulse; parameter tp
Zth / (K/W) D= 0.5 1 0.2 0.1 0.05 0.1 0.02 P D tp D= tp T t 1E+01 BUKx44-lv
10
20
40
60
80 Ths / C
100
120
140
0.01 1E-07
T 1E-01
Fig.2. Normalised continuous drain current. ID% = 100ID/ID 25 C = f(Ths); conditions: VGS 10 V
April 1993
Rev 1.100
Philips Semiconductors
Product Specification
PowerMOS transistor
BUK444-200A/B
20
ID / A VGS / V = 20 10
BUK444-200A 8
6 5
gfs / S
BUK454-200A
15 7 10 6
2 4 3
5 5 0 4 20
1 0 0 2 4 6 8 10 12 ID / A 14 16 18 20
10 12 VDS / V
14
16
18
1.5
1.0
2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0
10 0.5 20
10 12 ID / A
14
16
18
20
20
40 60 Tj / C
80
20
Tj / C = 15
25
150
3 typ.
10
min. 2
4 VGS / V
10
-60
-40
-20
20
40 60 Tj / C
80
100
120
140
Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS
April 1993
Rev 1.100
Philips Semiconductors
Product Specification
PowerMOS transistor
BUK444-200A/B
1E-01
ID / A
SUB-THRESHOLD CONDUCTION
20
IF / A
BUK454-200A
1E-02
15
1E-03 2% typ 98 %
10
1E-04
Tj / C = 150 5 25
1E-05
1E-06 0 1 2 VGS / V 3 4
0 0 1 VSDS / V 2
10000
C / pF
1000 Ciss
80 70 60 50
100
Coss Crss
40 30 20 10 0
10 0 20 VDS / V 40
20
40
60
80 100 Ths / C
120
140
Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
12 10 8 6 4 2 0
VGS / V
+
L VDS VGS 0 RGS T.U.T. R 01 shunt
VDD
160
-ID/100
12
16 QG / nC
20
24
28
Fig.13. Typical turn-on gate-charge characteristics. VGS = f(QG); conditions: ID = 9 A; parameter VDS
Fig.16. Avalanche energy test circuit. 2 WDSS = 0.5 LID BVDSS /(BVDSS VDD )
April 1993
Rev 1.100
Philips Semiconductors
Product Specification
PowerMOS transistor
BUK444-200A/B
MECHANICAL DATA
Dimensions in mm Net Mass: 2 g
0.9 0.5
seating plane
4.4
13.5 min 1 0.4 M 2 3 0.9 0.7 2.54 5.08 top view 1.3
0.55 max
Fig.17. SOT186; The seating plane is electrically isolated from all terminals.
Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for F-pack envelopes. 3. Epoxy meets UL94 V0 at 1/8".
April 1993
Rev 1.100
Philips Semiconductors
Product Specification
PowerMOS transistor
BUK444-200A/B
DEFINITIONS
Data sheet status Objective specification Product specification Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 1996 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. This data sheet contains target or goal specifications for product development. This data sheet contains final product specifications. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
April 1993
Rev 1.100
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