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CYCLE SLIPS

Not all coherent technology is created equal

by Bo Gowan and Kim Roberts originally posted on the Ciena Insights blog The early success of Cienas coherent optical technology, including strong customer adoption worldwide, has motivated many optical systems vendors to bring to market their own coherent solutions to provide a path for optical transport speeds of 100G, 400G and even 1Tbps. However, now that the entire optical vendor market is scampering to implement this key technology, a challenge has come to the surface. Specifically, some coherent optical platforms can cause customers to experience transmission errors, critical system failures and greatly shortened reach.

Cycle slip isnt an insurmountable obstacle. But it is a real problem that, if not handled, can afflict carrier networks with significant CAPEX and OPEX costs at least and critical network failures at worst.
Kim Roberts
Senior Director of Signal Processing Ciena

Kim Roberts

And its all caused by a problem youve likely never heard ofcycle slips. Now for some good news: With more than ten years of development behind us, Ciena has engineered our coherent products from the ground up to eliminate failures due to cycle slips. Cycle slip isnt an insurmountable obstacle. But it is a real problem that, if not properly handled, can afflict carrier networks with significant CAPEX and OPEX costs at least and critical network failures at worst, said Cienas Kim Roberts. Kim is Cienas senior director of signal processing, and a legend in the industry with 106 patents related to optical technology. I recently talked to Kim in order to better understand the details behind the issue of coherent cycle slips, which is a relatively unknown topic outside of the most technical R&D circles. Coherent cycle slips occur when the timing of the coherent transmitter and coherent receiver go out of alignment. This timing misalignment originates at the core of what coherent technology is all aboutoptical phase modulation. Phase modulation is a way of applying intelligence to an optical wavelength so that more data can be transmitted without the need to increase the rate at which the light signal is switched on and off (which reaches its practical limits at around 10Gbps). Figure 1 shows this visually, that in one polarization of one wavelength there are four QPSK symbols that can be communicated. The four blue dots fall into clearly separate quadrants, allowing the coherent receiver to easily identify which symbol has been received, and decode the two bits. But what happens when there is an error in the numbering of the quadrants? Issues such as laser phase noise, frequency error, and nonlinear cross-phase modulation (XPM), can act on the transmission in a way that rotates the quadrant axis, and so the axis have to be dynamically tracked. With increased distances and fiber impairments, these clearly separated quadrants can begin to blur as signals stray from their intended destination. To some degree, this noise can be tolerated and individual bit errors corrected. But not always.

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Figure 1. Proper phase modulation of an optical signal.

In some instances, the tracking of the rotation of the axis can have a 90 degree mistake. This is the genesis of the cycle slip, as the coherent receiver then begins to decode using incorrect quadrantsout of cycle with the coherent transmitter (see Figure 2). While the transmitted symbols are encoding carrier information, the cycle slip is not visible in any one quadrant, and so it will persist until redundant symbols such as framing bytes are transmitted. This causes a large burst of bit errors that may not be able to be corrected using forward error correction (FEC), resulting in a large hit to carrier traffic.

Another Band-aid solution is to put differential decoding in the coherent chipset, which mitigates cycle slips but causes a significant degradation in the achievable reach. The real solution? A complete redesign of the coherent chipset. Fortunately for Ciena and our customers, the early commitment and investment we made in coherent means we identified and addressed problems like Cycle Slip early in our development process. Cienas WaveLogic coherent optical processors are designed to specifically counteract Cycle Slip using digital signal processing (DSP) that includes an advanced carrier recovery scheme, coupled with unique Forward Error Correction (FEC) algorithms. When we first started developing the coherent optical product back in 2001, we 10 (11) knew that cycle slip was a problem faced by the wireless industry when phase modulation was used. said Kim. We had the advantage of having very experienced wireless R&D engineers as part of our development team, so we (10) were able to address cycle slip as part of 00 the core solution. Our equipment even counts the number of cycle slips rotated by 90 occurring, while ensuring that there are no carrier bit errors. We generally do not select the built-in differential decoding option, which can resolve cycle slips but only at the cost of doubling bit errors.

Bit Errors 01 Q 11

Cycle Slip (01) 11 Q

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Reference

Phase & amplitude noise


Figure 2. Cycle slip illustration with QPSK

To compound matters, a cycle slip problem may not be visible upon first installation, and only show up as the line ages, the temperature of the cable changes, or other wavelengths are added. There are workarounds for a system with a cycle slip problem, but they involve either transmitting at dramatically shorter distances or with fewer channels. Both of these are costly band-aids that carriers cant afford. By transmitting at shorter distances, the unwanted cross-phase modulation (XPM) can be reduced, but the result is the need to regenerate the signal more often and at greater cost. Likewise, packing fewer channels on a fiber strand allows for guard bands that can reduce XPM and the incidence of cycle slip, but results in reduced fiber and spectrum efficiency.

Kim noted that While BPSK and QPSK formats are susceptible to cycle slips, larger constellations such as 8-PSK and 16-QAM are even more sensitive. As one moves on to 400G and Terabit speeds, cycle slips can become a debilitating issue. A poor design will allow cycle slips to cause failures, or significantly penalize reach. Issues like Cycle Slip show the value in Cienas field-proven coherent solution that has been meticulously developed and scrutinized for more than 10 years. Other optical vendors may claim that they are developing similar coherent 100G solutions, but will their rush-to-market and lack of deployment experience result in a solution that you can trust with your network?

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