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6.

Contents:

Howe and Sodini, Ch. 4, §4.5-4.6

6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 11-2

Key questions

• What is the topology of a small-signal equivalent cir-

cuit model of the MOSFET?
• What are the key dependencies of the leading model
elements in saturation?
6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 11-3

cuit model

Regimes of operation of MOSFET:

VDSsat=VGS-VT
ID
linear saturation
ID

VDS VGS

VGS VBS
VGS=VT
0
0 VDS
cutoff
• Cut-oﬀ:

ID = 0

• Linear:
W VDS
ID = µnCox (VGS − − VT )VDS
L 2
• Saturation:
W
ID = IDsat = µnCox (VGS −VT )2 [1+λ(VDS −VDSsat)]
2L
Eﬀect of back bias:
� �
VT (VBS ) = VT o + γ( −2φp − VBS − −2φp )
6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 11-4

In many applications, interested in response of device to

a small-signal applied on top of bias:

ID+id
+
v
- ds

+ VDS
vgs + v
- - bs
VGS VBS

Key points:

• Small-signal is small
⇒ response of non-linear components becomes linear
• Can separate response of MOSFET to bias and small
signal.
• Since response is linear, superposition can be used

⇒ eﬀects of diﬀerent small signals are independent

from each other
6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 11-5

MOSFET
small-signal
equivalent
circuit model
ID+id ID id
+ +
v v
- ds - ds

+ VDS = VDS +
vgs + +
v vgs + v
- - bs - - bs
VGS VBS VGS VBS

Mathematically:

iD (VGS + vgs, VDS + vds, VBS + vbs) 

∂ID ∂ID ∂ID
ID (VGS , VDS , VBS )+ | vgs + | vds + | vbs
∂VGS Q ∂VDS Q ∂VBS Q
where Q ≡ bias point (VGS , VDS , VBS )

Small-signal id:
id  gm vgs + govds + gmb vbs
Deﬁne:

gm ≡ transconductance [S]
go ≡ output or drain conductance [S]
gmb ≡ backgate transconductance [S]

Then:
∂ID ∂ID ∂ID
gm  |Q go  |Q gmb  |Q
∂VGS ∂VDS ∂VBS
6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 11-6

2 Transconductance

In saturation regime:

W
ID = µnCox (VGS − VT )2 [1 + λ(VDS − VDSsat)]
2L

Then (neglecting channel length modulation):

∂ID W
gm = |  µnCox (VGS − VT )
∂VGS Q L

Rewrite in terms of ID :

W
gm = 2 � µnCox ID
L

gm gm

saturation

saturation

cut-off
0 0
0 VT VGS 0 ID
6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 11-7

Equivalent circuit model representation of gm :

id
G D
+

vgs gmvgs
-
S

B
6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 11-8

2 Output conductance

In saturation regime:

W
ID = µnCox (VGS − VT )2 [1 + λ(VDS − VDSsat)]
2L

Then:

∂ID W ID
go = |Q = µnCox (VGS − VT )2 λ  λID ∝
∂VDS 2L L

Output resistance is inverse of output conductance:

1 L

ro = ∝
go ID

go go

saturation
saturation

cut-off
0 0
0 VT VGS 0 ID
6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 11-9

Equivalent circuit model representation of go:

id
G D
+

vgs ro
-
S

B
6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 11-10

2 Backgate transconductance

In saturation regime (neglect channel-length modulation):

W
ID  µnCox (VGS − VT )2
2L
Then:
∂ID W ∂VT
gmb = | = µnCox (VGS − VT )(− | )
∂VBS Q L ∂VBS Q

Since:
� �
VT (VBS ) = VT o + γ( −2φp − VBS − −2φp )

Then:
∂VT −γ
| = �
∂VBS Q 2 −2φp − VBS

All together:
γgm
gmb = �
2 −2φp − VBS

gmb inherits all dependencies of gm

6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 11-11

Body of MOSFET is a true gate: output characteristics

for diﬀerent values of VBS (VBS = 0 − (−3) V, ∆VBS =
−0.5 V , VGS = 2 V ):

Equivalent circuit model representation of gmb :

id
G D
+

vgs gmbvbs
-
S
-
vbs
+
B
6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 11-12

Complete MOSFET small-signal equivalent circuit model

for low frequency:

id
G D
+

vgs gmvgs gmbvbs ro

-
S
-
vbs
+
B
6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 11-13

cuit model

Cfringe gate
Cfringe
source n+ drain
Cgs,i

n+ Cov Cov n+
Cjsw Csb,i Cjsw
Cj Cj
p
body

Cgs ≡ intrinsic gate capacitance

+ overlap capacitance, Cov (+fringe)

(+fringe)

Csb ≡ source junction depletion capacitance

+sidewall (+channel-substrate capacitance)

Cdb ≡ drain junction depletion capacitance

+sidewall
6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 11-14

Complete MOSFET high-frequency small-signal equiva-

lent circuit model:

Cgd
id
G
D
+

-
S
-
vbs Csb
+
B
Cdb

Plan for development of capacitance model:

– compute gate charge QG = −(QN + QB )
– compute how QG changes with VGS
6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 11-15

Inversion layer charge in saturation

L �
VGS −VT dy
QN (VGS ) = W 0 Qn (y)dy =W 0 Qn(Vc ) dVc
dVc

But:

dVc ID
=−
dy W µnQn(Vc )

Then:

W 2Lµn � VGS −VT 2

QN (VGS ) = − 0 Qn(Vc )dVc
ID

Remember:

Qn(Vc ) = −Cox (VGS − Vc − VT )

Then:

W 2Lµn Cox
2 �
VGS −VT 2
QN (VGS ) = − 0 (V GS − V c − V T ) dVc
ID
6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 11-16

Do integral, substitute ID in saturation and get:

2
QN (VGS ) = − W LCox (VGS − VT )
3

Gate charge:

Intrinsic gate-to-source capacitance:

dQG 2
Cgs,i = = W LCox
dVGS 3

2
Cgs = W LCox + W Cov
3

Gate-to-drain capacitance - only overlap capacitance:

Cgd = W Cov
6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 11-17

polysilicon gate
body source drain
gate

n+

p+ n+ n+

n
channel

gate length

gate width
p+ p n+ n+ n+

n+ STI edge

Body-to-source capacitance = source junction capacitance:

qsNa
Csb = Cj +Cjsw = W L dif f �
� +(2Ldif f +W )CJ SW
2(φB − VBS )

Body-to-drain capacitance = drain junction capacitance:

qs Na
Cdb = Cj +Cjsw = W L dif f �
� +(2Ldif f +W )CJ SW
2(φB − VBD )
6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 11-18

Key conclusions

MOSFET:

Cgd id
G D
+

-
S
-
vbs Csb
+
B

Cdb

In saturation:

W �
gm ∝ ID �

L

ID
go ∝
L

Cgs ∝ W LCox