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OP07, the AD706 is better suited for today’s higher density TYPICAL JFET AMP
boards. 1
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
may result from its use. No license is granted by implication or otherwise Tel: 781/329-4700 www.analog.com
under any patent or patent rights of Analog Devices. Fax: 781/326-8703 © Analog Devices, Inc., 2002
AD706–SPECIFICATIONS (@ T = +25C, V A CM = 0 V and 15 V dc, unless otherwise noted)
AD706J AD706K
Parameter Conditions Min Typ Max Min Typ Max Units
INPUT OFFSET VOLTAGE
Initial Offset 30 100 10 50 mV
Offset TMIN to TMAX 40 150 25 100 mV
vs. Temp, Average TC 0.2 1.5 0.2 0.6 mV/∞C
vs. Supply (PSRR) VS = ± 2 V to ± 18 V 110 132 112 132 dB
TMIN to TMAX VS = ± 2.5 V to ± 18 V 106 126 108 126 dB
Long Term Stability 0.3 0.3 mV/Month
INPUT BIAS CURRENT1
VCM = 0 V 50 200 30 110 pA
VCM = ± 13.5 V 250 160 pA
vs. Temp, Average TC 0.3 0.2 pA/∞C
TMIN to TMAX VCM = 0 V 300 200 pA
TMIN to TMAX VCM = ± 13.5 V 400 300 pA
INPUT OFFSET CURRENT VCM = 0 V 30 150 30 100 pA
VCM = ± 13.5 V 250 200 pA
vs. Temp, Average TC 0.6 0.4 pA/∞C
TMIN to TMAX VCM = 0 V 80 250 80 200 pA
TMIN to TMAX VCM = ± 13.5 V 80 350 80 300 pA
MATCHING CHARACTERISTICS
Offset Voltage 150 75 mV
TMIN to TMAX 250 150 mV
Input Bias Current2 300 150 pA
TMIN to TMAX 500 250 pA
Common-Mode Rejection 106 110 dB
TMIN to TMAX 106 108 dB
Power Supply Rejection 106 110 dB
TMIN to TMAX 104 106 dB
Crosstalk @ f = 10 Hz
(Figure 19a) RL = 2 kW 150 150 dB
FREQUENCY RESPONSE
Unity Gain Crossover
Frequency 0.8 0.8 MHz
Slew Rate G = –1 0.15 0.15 V/ms
TMIN to TMAX 0.15 0.15 V/ms
INPUT IMPEDANCE
Differential 40储2 40储2 MW储pF
Common Mode 300储2 300储2 GW储pF
INPUT VOLTAGE RANGE
Common-Mode Voltage ± 13.5 ± 14 ± 13.5 ± 14 V
Common-Mode Rejection
Ratio VCM = ± 13.5 V 110 132 114 132 dB
TMIN to TMAX 108 128 108 128 dB
INPUT CURRENT NOISE 0.1 Hz to 10 Hz 3 3 pA p-p
f = 10 Hz 50 50 fA/÷Hz
INPUT VOLTAGE NOISE 0.1 Hz to 10 Hz 0.5 0.5 1.0 mV p-p
f = 10 Hz 17 17 nV/÷Hz
f = 1 kHz 15 22 15 22 nV/÷Hz
OPEN-LOOP GAIN VO = ± 12 V
RLOAD = 10 kW 200 2000 400 2000 V/mV
TMIN to TMAX 150 1500 300 1500 V/mV
VO = ± 10 V
RLOAD = 2 kW 200 1000 300 1000 V/mV
TMIN to TMAX 150 1000 200 1000 V/mV
OUTPUT CHARACTERISTICS
Voltage Swing RLOAD = 10 kW ± 13 ± 14 ± 13 ± 14 V
TMIN to TMAX ± 13 ± 14 ± 13 ± 14 V
Current Short Circuit ± 15 ± 15 mA
Capacitive Load
Drive Capability Gain = +1 10,000 10,000 pF
–2– REV. D
AD706
AD706J AD706K
Parameter Conditions Min Typ Max Min Typ Max Units
POWER SUPPLY
Rated Performance ± 15 ± 15 V
Operating Range ± 2.0 ± 18 ± 2.0 ± 18 V
Quiescent Current, Total 0.75 1.2 0.75 1.2 mA
TMIN to TMAX 0.8 1.4 0.8 1.4 mA
TRANSISTOR COUNT # of Transistors 90 90
NOTES
l
Bias current specifications are guaranteed maximum at either input.
2
Input bias current match is the difference between corresponding inputs (I B of –IN of Amplifier #1 minus I B of –IN of Amplifier #2).
DVOS #1 DVOS # 2
CMRR match is the difference between for amplifier #1 and for amplifier #2 expressed in dB.
DVCM DVCM
DVOS #1 DVOS # 2
PSRR match is the difference between for amplifier #l and for amplifier #2 expressed in dB.
DVSUPPLY DVSUPPLY
All min and max specifications are guaranteed.
Specifications subject to change without notice.
–INPUT A 2
7 OUTPUT B
+INPUT A 3
6 –INPUT B
–VS 5
4 +INPUT B
0.074 (1.88)
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. WARNING!
Although the AD706 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
ESD SENSITIVE DEVICE
precautions are recommended to avoid performance degradation or loss of functionality.
REV. D –3–
AD706–Typical Performace Characteristics (@ +25C, V = 15 V, unless otherwise noted) S
NUMBER OF UNITS
NUMBER OF UNITS
600 600 600
0 0 0
–80 –40 0 40 80 –160 –80 0 80 160 –120 –60 0 60 120
INPUT OFFSET VOLTAGE – V INPUT BIAS CURRENT – pA INPUT OFFSET CURRENT – pA
Figure 2. Typical Distribution of Input Figure 3. Typical Distribution of Figure 4. Typical Distribution of
Offset Voltage Input Bias Current Input Offset Current
VS 35 100
INPUT COMMON-MODE VOLTAGE LIMIT – Volts
–0.5
(REFERRED TO SUPPLY VOLTAGES)
30
OUTPUT VOLTAGE – Volts p-p
SOURCE RESISTANCE
0.5 5
–VS 0 0.1
0 5 10 15 20 1k 10k 100k 1M 1k 10k 100k 1M 10M 100M
SUPPLY VOLTAGE – Volts FREQUENCY – Hz SOURCE RESISTANCE –
Figure 5. Input Common-Mode Figure 6. Large Signal Frequency Figure 7. Offset Voltage Drift vs.
Voltage Range vs. Supply Voltage Response Source Resistance
200 4 60
SAMPLE SIZE: 375
CHANGE IN OFFSET VOLTAGE – V
–55C TO 125C
40
INPUT BIAS CURRENT – pA
160
3
NUMBER OF UNITS
20 POSITIVE IB
120
2 0
80
–20
1
40 NEGATIVE IB
–40
0 0 –60
–0.8 –0.4 0 0.4 0.8 0 1 2 3 4 5 –15 –10 –5 0 5 10 15
OFFSET VOLTAGE DRIFT – V/C WARM-UP TIME – Minutes COMMON-MODE VOLTAGE – Volts
Figure 8. Typical Distribution of Figure 9. Change in Input Offset Figure 10. Input Bias Current vs.
Offset Voltage Drift Voltage vs. Warm-Up Time Common-Mode Voltage
–4– REV. D
AD706
1000 1000
100 10k
10 10 20M
VOUT
1 1
1 10 100 1000 1 10 100 1000 0 5 10
FREQUENCY – Hz FREQUENCY – Hz TIME – Seconds
Figure 11. Input Noise Voltage Figure 12. Input Noise Current Figure 13. 0.1 Hz to 10 Hz Noise
Spectral Density Spectral Density Voltage
+140 160
QUIESCENT CURRENT – A
+100 120
CMRR – dB
PSRR – dB
800 +80 100
+125C – PSRR
+60 80
+25C
+ PSRR
700 +40 60
+20 40
–55C
600 0 20
0 5 10 15 20 0.1 1 10 100 1k 10k 100k 1M 0.1 1 10 100 1k 10k 100k 1M
SUPPLY VOLTAGE – Volts FREQUENCY – Hz FREQUENCY – Hz
Figure 14. Quiescent Supply Current Figure 15. Common-Mode Rejection Figure 16. Power Supply Rejection
vs. Supply Voltage Ratio vs. Frequency Ratio vs. Frequency
120 30 –0.5
OPEN-LOOP VOLTAGE GAIN – dB
–55C
OPEN-LOOP VOLTAGE GAIN
100 60 –1.0
+25C PHASE
80 90 –1.5
+125C
1M 60 120
40 150 +1.5
GAIN
20 180 +1.0
0 210 +0.5
Figure 17. Open-Loop Gain vs. Load Figure 18. Open-Loop Gain and Figure 19. Output Voltage Swing vs.
Resistance vs. Load Resistance Phase Shift vs. Frequency Supply Voltage
REV. D –5–
AD706
–80 1000
–100
10
CROSSTALK – dB
AV = –1000
–120 1
AV = + 1
0.1
–140
0.01
IOUT = +1mA
–160 0.001
10 100 1k 10k 100k 1 10 100 1k 10k 100k
FREQUENCY – Hz FREQUENCY – Hz
Figure 20a. Crosstalk vs. Frequency Figure 21. Magnitude of Closed-Loop Output Impedance
vs. Frequency
+VS 0.1F
RF
+VS
2
VOUT #1
1/2 1
AD706 0.1F
20V p-p
3
4 8
0.1F VOUT
RL 1/2
SINE WAVE 2k AD706
GENERATOR
VIN 4
–VS RL
CL
2k
0.1F
20k SQUARE
WAVE –VS
+VS INPUT
1F 0.1F Figure 22a. Unity Gain Follower (For Large Signal
2.21k
8 Applications, Resistor RF Limits the Current
6
VOUT #2 Through the Input Protection Diodes)
1/2 7
AD706
5
V #2
CROSSTALK = 20 LOG10 OUT –20dB
VOUT #1
Figure 22b. Unity Gain Follower Figure 22c. Unity Gain Follower Figure 22d. Unity Gain Follower
Large Signal Pulse Response, RF = Small Signal Pulse Response, RF = Small Signal Pulse Response, RF =
10 kW, CL = 1,000 pF 0 W, CL = 100 pF 0 W, CL = 1000 pF
–6– REV. D
AD706
10k
+VS
+
0.1F
10k
VIN – 8
VOUT
1/2
AD706
+ 4 RL
CL
2.5k
SQUARE 0.1µF
WAVE
INPUT –VS
Figure 23b. Unity Gain Inverter Large Figure 23c. Unity Gain Inverter Small Figure 23d. Unity Gain Inverter Small
Signal Pulse Response, CL = 1,000 pF Signal Pulse Response, CL = 100 pF Signal Pulse Response, CL = 1000 pF
Figure 24 shows an in-amp circuit that has the obvious advan- increases with gain, once initial trimming is accomplished—but
tage of requiring only one AD706, rather than three op amps, CMR is still dependent upon the ratio matching of Resistors R1
with subsequent savings in cost and power consumption. The through R4. Resistor values for this circuit, using the optional
transfer function of this circuit (without RG) is: gain resistor, RG, can be calculated using:
Ê R4ˆ R1= R4 = 49.9 kW
VOUT = (VIN #1 - VIN #2 ) Á1+ ˜
Ë R3¯ 49.9 kW
R2 = R3 =
for R1 = R4 and R2 = R3 0.9 G -1
99.8 kW
Input resistance is high, thus permitting the signal source to RG =
have an unbalanced output impedance. 0.06 G
where G = Desired Circuit Gain
RG (OPTIONAL) Table I provides practical 1% resistance values. (Note that
R1 R2 R3 R4 without resistor RG, R2 and R3 = 49.9 kW/G–1.)
49.9k 49.9k
+VS
Table I. Operating Gains of Amplifiers A1 and A2 and
0.1F
8 1/2 Practical 1% Resistor Values for the Circuit of Figure 24
2 – AD706
RP* A1 1 5 – Circuit Gain Gain of A1 Gain of A2 R2, R3 R1, R4
3 + A2 7
VIN#1 1k 1/2
AD706 6 + 4
OUTPUT 1.10 11.00 1.10 499 kW 49.9 kW
RP* 1.33 4.01 1.33 150 kW 49.9 kW
0.1F
VIN#2 1k –VS 1.50 3.00 1.50 100 kW 49.9 kW
VOUT = (VIN#1 – VIN#2) (1+ R4 ) + ( 2R4 ) 2.00 2.00 2.00 49.9 kW 49.9 kW
FOR R1 = R4, R2 = R3 R3 RG
10.1 1.11 10.10 5.49 kW 49.9 kW
101.0 1.01 101.0 499 W 49.9 kW
*OPTIONAL INPUT PROTECTION RESISTOR FOR GAINS GREATER
THAN 100 OR INPUT VOLTAGES EXCEEDING THE SUPPLY VOLTAGE. 1001 1.001 1001 49.9 W 49.9 kW
Figure 24. A Two Op-Amp Instrumentation Amplifier For a much more comprehensive discussion of in-amp applica-
Furthermore, the circuit gain may be fine trimmed using an tions, refer to the Instrumentation Amplifier Applications Guide—
optional trim resistor, RG. Like the three op-amp circuit, CMR available free from Analog Devices, Inc.
REV. D –7–
AD706
C1 +VS
R1 R2 C3
1M 1M 0.1F
3 + R3 R4
INPUT
C2 1/2 1M 1M 8
AD706 1 5 +
1/2
2 – 4 C4 AD706 7 OUTPUT
*WITHOUT THE NETWORK, 6 –
PINS 1 & 2, AND 6 & 7 OF THE 0.1F
AD706 ARE TIED TOGETHER. –VS
CAPACITORS C1 & C2
ARE SOUTHERN ELECTRONICS R5 C5 R6 C6
2M 2M 0.01F
MPCC, POLYCARB 5%, 50 VOLT 0.01F
OPTIONAL BALANCE
RESISTOR NETWORKS*
–120
–180
–40 0 +40 +80 +120
TEMPERATURE – C
Table II. 1 Hz, 4-Pole, Low Pass Filter Recommended Component Values
Section 1 Section 2
Desired Low Frequency Frequency C1 C2 C3 C4
Pass Response (Hz) Q (Hz) Q (F) (F) (F) (F)
Bessel 1.43 0.522 1.60 0.806 0.116 0.107 0.160 0.0616
Butterworth 1.00 0.541 1.00 1.31 0.172 0.147 0.416 0.0609
0.1 dB Chebychev 0.648 0.619 0.948 2.18 0.304 0.198 0.733 0.0385
0.2 dB Chebychev 0.603 0.646 0.941 2.44 0.341 0.204 0.823 0.0347
0.5 dB Chebychev 0.540 0.705 0.932 2.94 0.416 0.209 1.00 0.0290
1.0 dB Chebychev 0.492 0.785 0.925 3.56 0.508 0.206 1.23 0.0242
NOTE
Specified Values are for a –3 dB point of 1.0 Hz. For other frequencies simply scale capacitors C1 through C4 directly, i.e.: for 3 Hz
Bessel response, C1 = 0.0387 mF, C2 = 0.0357 mF, C3 = 0.0533 mF, C4 = 0.0205 mF.
–8– REV. D
AD706
OUTLINE DIMENSIONS
8-Lead Standard Small Outline Package [SOIC] 8-Lead Plastic Dual-in-Line Package [PDIP]
Narrow Body (N-8)
(RN-8) Dimensions shown in inches and (millimeters).
Dimensions shown in millimeters and (inches)
REV. D –9–
AD706
Revision History
Location Page
–10– REV. D
–11–
–12–
PRINTED IN U.S.A. C00820–0–10/02(D)