Switch-mode voltage-doubler rectifier with

symmetrical arrangement of capacitors for pumping

action
Y. Neba, K. Ishizaka and R. Itoh

Abstract: A novel switch-mode voltage-doubler rectifier for single-phase supply is presented. It

consists of diode bridge circuit and pump circuit with symmetrical arrangement of capacitors. The
capacitors with energy storage/transfer capability are charged and discharged by employing the
active power semiconductor devices. The rectifier can be operated in the switch mode for pumping
action to pump twice the peak supply voltage into the output capacitor and for forcing the input
current to follow its sinusoidal reference independent of the working conditions. The prototype
tested, using two dual-IGBT power modules, has been implemented to investigate the operation
with a PI controller for output voltage regulation. Experimental and simulated results are provided
to verify the expected performance in both steady-state and transient conditions.

List of principal symbols capacitive divider DC voltage can be provided to the load
and the power is allowed to have bidirectional flow. On the
A matrix other hand, a diode pump circuit [4] can be utilised in the
C1, C2, C1p, C1n capacitors voltage-doubler rectifier, which is known as a common
e1, e2, e1p, e1n capacitor voltages terminal voltage-doubler. Although this rectifier has simple
e*2 reference of e2 circuit configuration, the distorted current flows in the AC
E2 mean value of e2 input and its waveform can hardly become sinusoidal.
f supply frequency Moreover, the DC output voltage is not allowed to be
fs switching frequency regulated and depends entirely on the load conditions.
h harmonic order These drawbacks are due to the use of diodes only. The
i input current authors have proposed a switch-mode voltage-doubler
i* reference of i rectifier based on the diode pump circuit [5]. This rectifier
kp, ki proportional and integral gains enables the DC output voltage to be adjusted and the input
L inductor current to be close to sinusoidal by using a single active
R resistance of L power device. However, the input current waveform is
RL load resistance degraded as the output power increases.
t time In this paper, to achieve a sinusoidal input current with
T sampling period unity power factor, a novel switch-mode voltage-doubler
u output of PI controller rectifier is proposed. The capacitors for the pumping action
v supply voltage are symmetrically arranged in the circuit and the voltages
vf fictitious supply voltage across them are controlled under the appropriate pulse-
V RMS value of v width modulation. The modes of operation are explained
x state vector by illustrating the equivalent circuits, and the equations in
l step-up ratio each mode are derived for state-space simulation. The
o 2pf experimental prototype is operated with a switching
frequency of 20 kHz and a digital proportional-plus-integral
(PI) controller. The total harmonic distortion of the input
current is compared with that in the rectifier with a single
1 Introduction active power device when regulating the DC output voltage.
The experimental and simulated results confirm that the
In switch-mode voltage-doubler rectifiers, of which the
proposed rectifier has excellent performance in both steady-
output voltage is greater than the input one, a symmetrical
state and transient conditions.
circuit with a half-bridge configuration is the most well
known [1–3]. In this rectifier, the voltage step-up transfor-
mer connected to the AC supply is in dispensable to 2 Circuit topologies of voltage-doubler
generating the output voltage above the input. The
The diode pump rectifier shown in Fig. 1 is one of the well-
r IEE, 2005 known voltage-doublers. Advantages of this rectifier are
IEE Proceedings online no. 20045028 simple circuit configuration and easy provision of voltage
doi:10.1049/ip-epa:20045028 doubling. The pumping action of the capacitor C1 allows
Paper first received 17th May 2004 and in revised form 25th August 2004 the capacitor C2 to produce twice the peak input voltage.
The authors are with the Faculty of Engineering, Fukuoka University, The asymmetrical arrangement of the circuit elements
Nanakuma 8-19-1, Jonan-ku, Fukuoka 814-0180, Japan causes a difference in the path between positive and

IEE Proc.-Electr. Power Appl., Vol. 152, No. 2, March 2005 335
 i L C1 antiparallel diode, are connected for the pumping action.
These elements are symmetrically arranged to operate the
e1 D2 rectifier independently of the supply voltage polarity. The
power modules contribute to small installation size. IGBTs
can control the energy stored in the capacitors C1p and C1n,
V D1 C2 e2 RL and this allows the voltage across the output capacitor C2 to
be maintained over twice the peak supply voltage. The
voltage across a pumping capacitor connected in series with
the supply yields fast change of the input current through
the boost inductor L, so that the current distortion that
Fig. 1 Diode pump voltage-doubler rectifier appears in the vicinity of a zero crossing of the supply [5]
can be suppressed. The diodes Dbp and Dbn are inserted to
prevent the pumping capacitors from short-circuiting via
IGBTs.
i L C1p
C2 e2 RL 3 Control strategy
D1 D2 e1p D5 D6
The control block diagram for the DC voltage e2 and the
Q
v AC current i in the proposed rectifier is illustrated in Fig. 4.
D3 D4 D7 D8
In the feedback loop, the major loop is to regulate the DC
e1n
voltage by using a PI controller with inputs of the detected
C1n e2 and the command e*2, and the minor loop is to generate
the sinusoidal input current by employing a comparator
Fig. 2 Voltage-doubler rectifier with single active power device with the detected input current 7i7 and the reference signal
7i*7. The PI algorithm is calculated when the INT signal is
provided by a phase-locked loop (PLL) at zero crossing
e1p every half-cycle of the supply, where f denotes the supply
frequency. A read only memory (ROM) contains digital
C1p D2p
Q2p data of a full-wave rectified sinusoidal signal with unity
L i
C2 e2 RL
amplitude, and a digital-to-analogue (D/A) converter
Dbp D
1p Q1p changes the output of the ROM into a continuous signal,
D1 D3
which is kept in phase with the supply by the data of a
counter with 1 MHz clock and a zero crossing signal.
v The output u of the PI controller is sent to a multiplier.
The input current reference 7i*7 that is given as a product of
D2
Q1n
D4 the signal u and the D/A converter output is used for
Dbn D1n
comparison with the measured current 7i7. The switching
Q2n
timings of IGBTs are determined by an RS flip-flop (FF)
C1n D2n
with 20 kHz clock that is fixed as the switching frequency of
e1n IGBTs. The output Q, set to high level every clock cycle of
20 kHz, is applied to Q1p or Q1n for which the turn-on
Fig. 3 Proposed voltage-doubler rectifier causes the input current 7i7 to increase. The output of the
comparator is low level for 7i7o7i*7. When the current 7i7
reaches 7i*7, on the other hand, the output of the
negative input currents. This results in a non-sinusoidal comparator becomes high and so the output bar Q is high
input current. The output voltage also depends on the load level. This allows Q2p or Q2n to be turned on. If Q1p and Q1n
conditions, and as a result it cannot be regulated. are in the off-state then the input current decreases. The
To overcome these disadvantages, the voltage-doubler signals for IGBTs are determined by the outputs of the zero
rectifier shown in Fig. 2 has been reported in [5]. The
switching of single active power device, which is indicated
by an insulated gate bipolar transistor (IGBT) with the 20lHz clK
symbol Q, can achieve regulation of the output voltage and comparator S Q
improvement of the input current waveform. This circuit |i| +
topology is derived from the diode pump, and two R Q
–
|i *|
capacitors C1p and C1n are used for the pumping action. e2*
PI
flip–flop
Q1p
multiplier
As the current path during the positive half-cycle of the e2 controller u
supply is equivalent to that during the negative half-cycle, INT
the symmetrical waveform of the input current can be
1MHz clK D/A Q1n
obtained. Although the input current can almost be PLL
waveshaped sinusoidally, it is distorted near the zero 2f(Hz)
counter ROM
crossings. The distortion becomes more serious as the load
increases. zero Q2p
mono
Figure 3 shows the proposed switch-mode voltage- v crossing
stable1
f(Hz) detector
doubler rectifier designed to achieve of sinusoidal input
current without distortion. The bridge circuit consists of Q2n
four diodes, D1–D4, which is the main structure for AC– mono
stable2
DC conversion. Two capacitors C1p and C1n and two sets of
power modules which contain two IGBTs equipped with Fig. 4 Block diagram for voltage and current control

336 IEE Proc.-Electr. Power Appl., Vol. 152, No. 2, March 2005
crossing detector and the logic NOT, i.e. the outputs of the where R is the resistance of L. During p=2
ot
p, on
RS-FF are applied to Q1n and Q2n during the positive half- the other hand, only Q1n is turned on, as shown in Fig. 5b.
cycle of the supply, and Q1p and Q2p during the negative The equations in mode 2 corresponding to Fig. 5b are:
half-cycle. di=dt ¼ v=L  Ri=L ð5Þ
The pumping capacitors C1p and C1n in the proposed
rectifier can be utilised to achieve the fast response of the de1p =dt ¼ 0 ð6Þ
input current at the low instantaneous supply voltage. The
turn-on of Q2n with the on-state of Q1n permits the supply de1n =dt ¼ 0 ð7Þ
to be connected in series to the pumping capacitor C1n
during the positive half-cycle of the supply. During the de2 =dt ¼ e2 =C2 RL ð8Þ
negative half-cycle of the supply, the pumping capacitor C1p
is connected in series to the supply by the turn-on of Q2p The capacitor voltage e1n is superimposed on the supply
with the on-state of Q1p. In both cases, the voltages across in mode 1 and so the input current will have faster response
the pumping capacitors are superimposed on the supply compared with that in mode 2 because the input current
voltage. For this purpose, two monostables and two logic increases at a rate proportional to (v+e1n)/L and v/L in
ORs are added in the control circuit, and they provide the modes 1 and 2, respectively. Therefore, the operation of
on-gate signal to Q2n or Q2p in the time interval from a zero mode 1 contributes to the improvement of the current
crossing to the peak of the supply. The control scheme in waveform at the low instantaneous supply voltage. In these
this Section can guarantee that the sinusoidal input current modes, the energy is stored in the boost inductor L and the
is maintained with a near unity power factor even if the load energy stored in the capacitor C2 is supplied to the load.
is varied. When the current i reaches the reference, Q1n is turned
off. The on-gate signal is applied to Q2n during
4 Operation of circuit and simulation p=2
ot
p. In this case, the modes of operation are
shown in Fig. 6. If e1p+e1noe2, the diodes D1 and D4 are
The operation of the proposed rectifier over the positive reverse-biased. The current path of mode 3 shows that the
half-cycle of the supply is explained by the symmetrical energy stored in L is transferred to C1p. Fig. 6a gives the
arrangement of the circuit elements. In this period, the following equations:
operation consists of five modes. di=dt ¼ v=L  Ri=L  e1p =L ð9Þ
Figure 5 illustrates the operation with the on-state of Q1n.
With the current i below 7i*7, the clock pulse for the RS-FF de1p =dt ¼ i=C1p ð10Þ
causes Q1n to be turned on. The on-gate signal to Q2n is
continuously applied during 0
ot
p=2 by a function of
the monostables, where o ¼ 2pf . The current path of e1p
mode 1 can be formed as shown in Fig. 5a because Dbn is
reverse-biased by e1n. The circuit of mode 1 gives the L
C1p D2p
C2 e2 RL
i
following equations:
D1p
di=dt ¼ v=L  Ri=L þ e1n =L ð1Þ
v
de1p =dt ¼ 0 ð2Þ

de1n =dt ¼ i=C1n ð3Þ a

de2 =dt ¼ e2 =C2 RL ð4Þ

L i C2 e2 RL
L i

D1
v
v C2 e2 RL
Q1n

C1n Q2n L
C1n Q2n

e1n
e1n
a b

L i

C2 e2 RL
C2 e2 RL
v

Dbn Q1n
c
b
Fig. 6 Modes of operation in off state of Q1n
Fig. 5 Modes of operation in on state of Q1n a Mode 3 (Q1n: off, Q2n: off, e1p+e1noe2, i 4 0)
a Mode 1 (Q1n: on, Q2n: on, i  0) b Mode 4 (Q1n: off, Q2n: on, e1p+e1n4e2, i 4 0)
b Mode 2 (Q1n: on, Q2n: off, i  0) c Mode 5 (Q1n: off, Q2n: off, i ¼ 0)

IEE Proc.-Electr. Power Appl., Vol. 152, No. 2, March 2005 337
 de1n =dt ¼ 0 ð11Þ until e2 reaches its reference e*2, where T is the sampling
period given by 1/2f, k ¼ 1,2,3,y, and kp, ki are propor-
de2 =dt ¼ e2 =C2 RL ð12Þ tional and integral gains, respectively.

If e1p+e1n4e2, however, D1p and D2p are reverse-biased

5 Experimental and simulated results
and the current is permitted to flow in the path of mode 4,
shown in Fig. 6b. The energy stored in L and C1n is The experiments and the simulations for the proposed
transferred to the load circuit. In this mode of operation, rectifier with the circuit constants of L ¼ 2.18 mH
the pumping capacitor C1n is connected in series to the (R ¼ 0.137 O) and C1p ¼ C1n ¼ C2 ¼ 1000 mF were per-
supply. This results in the voltage doubling of the output formed under the operating conditions of V ¼ 50 V,
voltage, because the capacitor C1n is charged above the peak f ¼ 60 Hz and the switching frequency fs ¼ 20 kHz corre-
supply voltage. In mode 4, the following equations are sponding to the clock frequency for RS-FF. The load
obtained: resistance RL was set to 62.5 O.
di=dt ¼ v=L  Ri=L þ e1n =L  e2 =L ð13Þ Figure 7 shows the experimental waveforms at the
steady-state condition when the mean value E2 of the
de1p =dt ¼ 0 ð14Þ output voltage e2 is set to 150 V, a little higher than twice
de1n =dt ¼ i=C1n ð15Þ the peak value of the supply. It can be seen that the input
current i is waveshaped sinusoidally without distortion in
de2 =dt ¼ i=C2  e2 =C2 RL ð16Þ the vicinity of a zero crossing of the supply. The input
current is also in phase with the supply voltage. The
In modes 3 and 4, the current i decreases at a rate pulsation of the voltage across the capacitors is due to the
proportional to (v–e1p)/L and (v+e1n–e2)/L, respectively. variation of the instantaneous power in the single-phase
When the current i reduces to zero, this condition is system. The voltage e2 across the output capacitor C2 also
maintained until Q1n is turned on again. The load with C2 is contains the pulsating component with twice the supply
isolated from the supply in mode 5 shown in Fig. 6c. The frequency, but the pulsation is considerably smaller in
equations are as follows: amplitude compared with those of e1p and e1n. The larger
di=dt ¼ 0 ð17Þ capacitance leads to the smaller pulsation. Figure 8 shows
the simulated waveforms obtained by employing the state–
de1p =dt ¼ 0 ð18Þ space simulation method described in Section 4. By
inspection of the waveforms in Figs. 7 and 8, the simulated
de1n =dt ¼ 0 ð19Þ and experimental results are in good agreement with each
other.
de2 =dt ¼ e2 =C2 RL ð20Þ Table 1 gives the harmonic content in the measured input
current of Fig. 7 and the simulated one of Fig. 8. The
In the use of the state–space simulation method, the
symbol ah is the amplitude of the hth order harmonic
supply voltage v is defined as
pffiffiffi current and so ah/a1 represents the value normalised by the
v ¼ 2V sin ot ð21Þ fundamental frequency component. This proves that the
low-order harmonics are effectively suppressed. The total
and the following fictitious supply voltage is introduced to
obtain the solution of the state equation without a
convolution integral:
pffiffiffi
vf ¼ 2V cos ot ð22Þ
v
where V is the RMS value of the supply voltage. The
relationship between the two voltages is given by:
dv=dt ¼ ovf ð23Þ
dvf =dt ¼ ov ð24Þ
Representing the state vector x by i
T
x ¼ ½v; vf ; i; e1p ; e1n ; e2  ð25Þ
the state equation can be expressed as follows:
dx=dt ¼ Ax ð26Þ
where A denotes the coefficient matrix in each mode of e1p
operation and can be derived from (1)–(20), and (23) and
(24). This can be solved, mode by mode, utilising the
relationship between the values of the state vector at t and
t+Dt: e1n
xðt þ DtÞ ¼ expðAx DtÞxðtÞ ð27Þ
The instantaneous values of the voltage and the current can
be obtained by repeating the calculation of (27) accom-
panied by a PI algorithm: e2

uðkT Þ ¼ u½ðk  1ÞT  þ kp ½eðkT Þ  efðk  1ÞT g

þ ki eðkT Þ ð28Þ v, e1p, e1n, e2 = 100V/div. ; i = 10A/div.; time = 2ms/div.

eðkT Þ ¼ e2  e2 ðkT Þ ð29Þ Fig. 7 Experimental waveforms of proposed rectifier

338 IEE Proc.-Electr. Power Appl., Vol. 152, No. 2, March 2005
 10

Fig.2
8

Fig.3

i 6

THD, %
4

e1p

e1n

0
2.9 3.1 3.3 3.5 3.7 3.9

e2

2

Fig. 9 Measured total harmonic distortion against step-up ratio
0
t, rad
v, e1p, e1n, e2 = 100V/div. ; i = 10A/div.

Fig. 8 Simulated waveforms of Fig. 7 v

Table 1: Harmonic contents of input current

Harmonic order ah/a1(%)

i
h Measured Simulated
(THD ¼ 2.49%) (THD ¼ 2.50%)

3 1.557 1.837
5 1.209 1.027
e1p
7 0.832 0.802
9 0.584 0.653
11 0.535 0.525
13 0.489 0.399 e1n
15 0.463 0.298
17 0.221 0.265
19 0.305 0.271

harmonic distortion (THD) of the input current and the
power factor are 2.49% and 0.997, 2.50% and 0.999 in the
measured and the simulated results, respectively.
The advantage of the proposed rectifier over the previous
rectifier shown in Fig. 2 can be confirmed by the measured
results shown in Fig. 9. This shows the THD of the input
current against the step-up ratio l, where the circuit
constants and the operating conditions are the same in
each rectifier and l is defined as the ratio of the mean
output voltage to RMS value of the supply voltage as
follows:
l ¼ E2 =V
In the previous rectifier, the THD becomes larger as l
increases. The larger THD is caused by the distortion in the
vicinity of a zero crossing of the supply [5]. On the other
hand, the THD of the proposed rectifier is reduced to less
than 5%Fwell within IEEE/ANSI Standard 519 compli-
e2
v, e1p, e1n, e2 = 100V/div. ; i = 10A/div.; time = 80ms/div.
Fig. 10 Experimental transient responses
ance. It can be seen that the THD is kept small enough for
changing l and also decreases as l increases. The reduced
THD of the proposed rectifier is due to forcing the input
current to follow its sinusoidal reference, by discharging the
pumping capacitors via two IGBTs crammed together in a
power module. This means that the rectifier shown in Fig. 3
can always produce a sinusoidal input current over a wide
range of the output voltage.
ð30Þ
Figure 10 shows selected experimental results of the
transient responses when varying the load resistance RL
from 62.5 to 125.0 O and vice versa. The command e*2 of the
output voltage is set at 150 V and a PI controller has the
proportional and integral gains of kp ¼ 0.46 and ki ¼ 0.18,
respectively. It is observed that the sinusoidal input current

IEE Proc.-Electr. Power Appl., Vol. 152, No. 2, March 2005 339

v A novel topology for a switch-mode voltage-doubler
i
e1p
e1n
e2
v, e1p, e1n, e2 = 100V/div. ; i = 10A/div.; time = 80ms/div.
Fig. 11 Simulated transient responses of Fig. 10
with a near unity power factor can also be maintained
under transient conditions. The corresponding simulated
waveforms to Fig. 10 are obtained by using the aforemen-
tioned state–space method and are illustrated in Fig. 11. It
appears that the simulated responses are in good agreement
with those obtained from the experiments.
340
6 Conclusions
rectifier for single-phase supply has been presented. The
proposed rectifier has symmetrical arrangement of capaci-
tors for pumping action. This requires four active power
devices, larger in number than the previous circuit.
However, these devices control the charge and the discharge
of the pumping capacitors and contribute to the improve-
ment of the input current waveform. The experimental
results under steady-state and transient conditions prove
that the sinusoidal input current can be achieved with a near
unity power factor. Moreover, the total harmonic distortion
of the input current is kept small enough independent of the
working conditions. The experimental results have been
verified by those simulated using the state–space method.
Consequently, it is confirmed that the rectifier presented can
provide the sinusoidal input current with a near unity power
factor in both the steady-state and transient conditions.
7 Acknowledgment
The authors thank Mr. Y. Tsutagawa of the Fukuoka
University for his experimental work.
8 References
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power supply system for air conditioner using bidirectional current
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2 Boys, J.T., and Green, A.W.: ‘Current-forced single-phase reversible
rectifier’, IEE Proc., Electr. Power Appl., 1989, 136, (5), pp. 205–211
3 Salmon, J.C.: ‘Circuit topologies for single-phase voltage-doubler boost
rectifiers’, IEEE Trans. Power Electron., 1993, 8, (4), pp. 521–529
4 Mazda, F.F.: ‘Power electronics handbook’, (Butterworth, 1990)
5 Kiyotake, H., Okada, H., Ishizaka, K., and Itoh, R.: ‘Single-phase
switch-mode voltage-doubler rectifier using pump circuits’, Trans. Inst.
Electr. Eng. Jpn. D., 2001, 121-D, (5), pp. 612–613
IEE Proc.-Electr. Power Appl., Vol. 152, No. 2, March 2005