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EE241
Practical Information
l Instructors:
» Jan Rabaey
511 Cory Hall , 3-8206, jan@eecs.berkeley.edu
Office hours: Mo 1:30-3pm (231 Cory); Tu 11-12:30pm (511 Cory)
» Bora Nikolic
570 Cory Hall , tbd, bora@eecs.berkeley.edu
Office hours: Mo 11-12:30pm; We 2-3:30pm
l TAs:
» Rhett Davis, wrdavis@EECS.Berkeley.EDU - Office hours: W 12:30-2pm (297 Cory)
» Vikram Shenoy, vshenoy@cory.EECS.Berkeley.EDU - Office hours: (297 Cory)
» David Wang, dvwang@joy.EECS.Berkeley.EDU - No Office Hours
» Englin Yeo, yeo@cory.EECS.Berkeley.EDU - Office hour: M 5-6:30pm (297 Cory)
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EE241
Class Organization
l +/- 10 assignments
l One Integrated Design Project with 2
deliverables
l Laboratories:
» 7 software labs
» 2 hardware labs
l 2 midterms; 1 final
» midterm1: Th 9/23; midterm2: Th 10/29
EE141
» final: Fr 12/10 (8-11am) 5
Grading Policy
l Homeworks: 10%
l Labs: 10%
l Projects: 20%
l Midterms: 30%
l Final: 30%
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Class Material
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New Software
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Getting Started
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Introduction
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The Babbage
Difference Engine
(1832)
25,000 parts
cost: £17,470
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First transistor
Bell Labs, 1948
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Bipolar logic
1960’s
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Evolution in Complexity
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Evolution in Speed/Performance
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l The large
» Complexity
l And the small
» Very-high speed design (> 1 GHz)
» Power dissipation
» Interconnect
» Clocking
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Silicon in 2010
Density Access Time
(Gbits/cm2) (ns)
Die Area: 2.5x2.5 cm
DRAM 8.5 10
Voltage: 0.6 V
DRAM (Logic) 2.5 10
Technology: 0.07 µm
SRAM (Cache) 0.3 1.5
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The Challenge
Source: sematech97
SYSTEM
MODULE
+
GATE
CIRCUIT
DEVICE
G
S D
n+ n+
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