ICSE2004 Proc.

2004 Kuala Lumpur, Malaysia

Advanced Current Mirrors for Low Voltage Analog

Designs
SS Rajput
Plasma processed materials Group, National Physical Laboratory, New Delhi-110012 INDIA
Email: ssraiputCmailfnplindia.ernet..in
SS Jamuar, Senior Member IEEE
Department of Electrical and Electronic Engineering, University Putra Malaysia, 43400 UPM,
Serdang, Selangor DE
ssiamuarXeng.upm.edu.my

Abstract: Current mirrors are core biasing insensitivity

structures
to the
provides
variations in
better
power
structure for almost all analog and mixed
mode circuits and the performance of supply and temperature [2]. Other basic
building blocks are
analog structures largely depends on their directional CMs etc. In this voltage buffers and bi-
characteristics. Hence, for low voltage present some of the advanced CMs article, we
analog circuit structures, low voltage with their characteristics so that onealong can
current mirrors are mandatory. In this choose an appropriate CM for specific
tutorial article, we present some of the low
voltage current mirrors along with their applications.
merits and demerits, so that the selection
of a suitable current mirror for a II. BASIC CURRENT MIRROR
particular application will be easier.
True to its name, a CM performs the
similar functions with electrical currents as a
1. INTRODUCTION plane optical mirror does for optical signals.
It is a two terminal structure whose output
THE design philosophy of analog circuits is current at any instant of time is independent
now moving towards implementing them in
of voltage applied across its output terminals
the form of standard building blocks, called (Fig. 1) and depends solely on the input
analog signal processing (ASP) cells rather current. The output current is the scaled
than in discrete circuits [1]. The ASP cells, version of the input current [3,4]. Thus, in
which consist of several basic analog circuit other words a CM reverses the direction of
structures and have voltage mode and/or current, injected into a low impedance input
current mode circuit structures, can be used port and allows its true or scaled version to
to get any of the analog signal processing flow into a high impedance output port.
circuit architectures. Current mode circuits However, the direction of the output current
(CMCs) are described as the circuits whose can also be reversed. As discussed, a CM is
input and output signals are currents and the basic building block of almost all types
their complete circuit functions are described of analog circuits, and hence it determines
through the current signals rather than the the characteristics of these circuits [5].
voltage signals. The basic building blocks Presence of nonidealities in the CM
generally use more than one transistor and characteristics may severely affect the
perform only one function. Current mirror performance of these analog circuit
(CM) is one such structure, which finds use structures. Obviously, a CM is a pre-requisite
in form of active load or as biasing network in any high performing analog circuit design.
in analog circuit structures. CMs as active Following are the performance parameters of
load are useful as they offer high impedance a current mirror.
at low voltage drop. The use of CMs in

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 ICSE2004 Proc. 2004 Kuala Lumpur, Malaysia
Input-output resistance
Ideal CM has zero input and infinite output
resistance, which implies that the input
voltage does not vary with the input currents
and the output currents are independent of
applied output voltage. However, practical
CMs have nonzero input and finite output
resistances and they do not truly copy the
currents at the output port and a designer
should aim to achieve lowest possible input
(Ri,) and highest possible output resistances
(R01,d). Due to these nonidealities, the error in
the current transfer (Ai = iin-io0,,) equals ii,,
(rinlrol.t)V
V in v B
Ml
Fig 1: Basic CM structure
Input linear range
For the accurate reproduction of the current
at the CM output, the total input current must
be in the range where both the devices (Ml
and M2 in Fig. 1) operate saturations.
Output voltage swing
An ideal CM produces an accurate output
current regardless of the voltage present at
the output. In reality a CM require a
minimum voltage at the output to ensure that
the devices operate in saturation. This
voltage is called the output compliance
voltage. For a simple current mirror (Fig.1)
minimum voltage required is VDS2 (sat). For
other CM configurations the output
compliance voltage may be different.
DC balance
The drain source voltage of the mirror
transistors MI and M2 (Fig. 1) affects the
accuracy of the output current. The error due
to the mismatch in drain to source voltages
equals A(VDS2- VDsI). This indicates that if the
drain source voltages of the mirroring
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transistors are not balanced then there will be
an offset current.
Finite bandwidth
The current amplification in CMCs is
typically less than a factor of 100 and due to
the constant gain bandwidth product high
frequency operation of the circuit is possible.
CMCs provide wide bandwidth operation at
low gains. However, the voltage mode
circuits with similar closed loop gains
produce comparable bandwidths.
Dynamic range
The dynamic range of a circuit is the ratio of
maximum signal level to the minimum
detectable signal level. The maximum input
signal is determined by the input linear range
and the noise level at the input determines
the minimum detectable signal.
Device matching
Accurate mirroring of the signal current
requires perfect matching of the mirroring
transistors Ml and M2 (Fig. 1). However,
imperfections in the CMOS processes lead to
random and systematic errors in devices.
Using large devices a current matching up to
0.1% can be achieved without special
trimming steps. Thus for a current mirror the
desirable characteristics are:
* Current transfer ratio (CTR) must be
precisely set by the (WIL) ratios and it
should be independent of temperature.
* Very high output impedance (high R0,,,
and low CO,,,). As a result the output
current is independent of output
voltages.
Low input resistance (Ri,)
* Low input and output compliance
voltages
Aimost all analog structures whether
they operate as current mode devices or
voltage mode devices use CMs. However,
the use of CMs is not restricted and they
finding wide spread use in many upcoming
new circuit structures such as current mirror
op amps, operational current amplifiers, fully
differential op amps etc. Thus, the study of
various CM structures is necessary which
enables the circuit designers to use an
appropriate CM for particular application.
 ICSE2004 Proc. 2004 Kuala Lumpur, Malaysia

III. CURRENT MIRROR SYMBOL 6. Low voltage CMs

All CMs are useful and one needs to
There are numerous CM structures having choose appropriate CM, which requires an in
their own advantages and disadvantages anddepth knowledge of these CMs. Here we
one need to choose a suitable CM for focus on low voltage CMs. We can classify
particular application. However, for the LVCMs on the basis of the design
architectural point of view it is often techniques used The CMs available in the
desirable to describe a circuit without literature are based on one or combination of
showing which particular CM is used. In the following design techniques
such cases, we represent the CM through 1. Triode region CMs
symbols. The symbol for the CM is shown in 2. Sub-threshold region CMs
Fig. 2. The arrow is put to represent the 3. Bulk-driven MOSFETs based CMs
direction of the input current at the low 4. Level shifter based CMs
impedance input port. The current gain of a 5. Self cascode MOSFET based CMs
CM (K) is represented by the ratio 1: K. 6. Floating gate MOSFET based CMs
Most of the current mirrors are now
fundamental to the design of analog circuits
are available in texts. However, some of the
high perfonning CMs, which are particularly
1:K 1:K suitable for low voltage applications, are still
(a) (b)
in literature and are not available in
textbooks. We in this tutorial article present
Fig.2 Current mirror symbols (a) NMOS their comprehensive treatment. However, to
CM (b) PMOS CM introduce the subject we present the simplest
form of the current mirror first.
II1. CLASSIFICATION OF CMS
All practical CMs are plagued with non- IV. DESIGN CONSIDERATIONS
idealities and all the possible CM realizations
are aimed to approach ideal properties. The Thus, the CMs can be designed to operate
main sources of nonidealities include either in triode region, or in sub-threshold
channel length modulation, threshold voltage region or in saturation region. However, it
offset between input and output transistors, may be noted that most of the CMs have
and imperfect geometrical matching. been designed to operate in saturation region
Other sources of nonidealites are the only. This is because the designing of the
environmental born. These sources such as CMs based on saturated MOSFETs is
temperature effects can be minimized but simpler and the resultant structure is suitable
cannot be completely eliminated. In the for high frequency applications. Thus the
process of getting near ideal CM requirements for the CMs are;
characteristics, several CMs structures have e For CMs built using MOSFETs
been proposed. However, the suitability of a operating in triode region, it is
particular CM depends on the type of mandatory to ensure VdA=Vd,2 in addition
applications. In those applications where the to Vgsx=Vg*2 (Fig. 1).
slow processing is required, use of high * CMs built using saturated MOSFETs
performing mirror is a waste. Though there is require VgsI=Vgs2 (Fig. 1). However, if
no formal classification of the CMs, they can Vdslequals Vds2 than the short channel
be classified depending upon their properties. effects can be eliminated.
A CM may be a * The requirements of the CMs operating
1. Simple CM in sub-threshold regions are the same as
2. Source degenerated CM the CMs with saturated MOSFETs
3. High output impedance CMs implying Vgsl=Vgs2 (Fig. 1). However,
4. Wide Swing CMs sub-threshold MOSFETs require large
5. Enhanced output impedance CMs WIL and low Im,.

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 ICSE2004 Proc. 2004 Kuala Lumpur, Malaysia

Simple Current Mirror V. LOW VOLTAGE CMS

Fig. I shows the basic structure for a current
mirror. We know that a good current source
can be obtained only when MOSFETs
operate in saturation region. Hence, Ml and
M2 have been assumed to be operating in
saturation region. The voltage across the
output transistor M2 must be larger than Veff
(=VGs- VT). If the finite output impedance of
the transistors are ignored, and it is assumed
that both transistors have same size, then Ml
and M2 will have same current since they
both have same gate source voltage. In the
most general case the current transfer
function which is defined as the ratio of
mirrored current ( to the input current
(Ii,), is given by
Triode region CMs
The only available CM based on triode
region MOSFETs is shown in Fig. 3 Ml and
M2 are operated in triode region. If we
assume Ml and M2 as active resistors then
the circuit can be analyzed as a Widlar
current source. The active degeneration
resistors increase the output impedance. The
CM provides cascode type out put
impedance. Diode connected transistor M4 is
used to bias the transistor M5.
M4 MS

'bbS
oll
21 (1)
tLAL
Ml M2 M3
Iin
Thus, CTR can be controlled by the designer.
However, the ideal conditions do not exist
and errors are introduced. There is a tradeoff Fig 3 Mulders CM
between output impedance (R0111) and output Here one can note that:
capacitance (CO,,,). Bigger size transistors 1. M3 and M4 will operate in triode region
achieve higher R0111, which is always desired if the input current is sufficiently less
for a CM. But there will be higher C0,,, than biasing current for M5.
associated with these bigger size transistors, 2. The structure may not be suitable for
which obviously degrades the frequency high frequency applications.
response of a current mirror (Fig. 4). The
simulated results show the input impedance Sub-threshold region CM
of 5300, while R0,,, was found to be 27kQ Simple CM (Fig. 1) can be operated in sub-
(for WIL=30). It may be seen that for smaller threshold region by selecting proper
WIL, CTR is not unity and depends upon the parameter as stipulated in previous
applied drain bias of transistor M2 (channel discussions. Since these current mirrors are
length modulation). The longer size operated at very low input currents, the trans-
transistors (large WIL) yield a CTR, which is conductance of the mirroring transistors is
very close to unity. The short channel effects very low and hence these structures are
also got reflected in the characteristics of the inherently low frequency structures. Though,
output port and can be seen by comparing these CM are not suitable for high frequency
them for low WIL transistors. applications they are too attractive for the
use in micro power op amps.
All the following CMs discussed have
saturated MOSFETs as mirroring transistors.
WI,L--3{ \\ VI. LEVEL SHIFTED CMS

Ramirez-Angulo Structure
,0 ,00
Frnquoeny in MH1z '0°0 '0000 A low voltage CMs based on level shifter
approach has been proposed by Ramirez-
Fig.4. Effect of transistor sizes on the Angulo for built-in current sensors in which
frequency response of the CM. 9 transistors were used. The bandwidth of the
circuit was few tens of MHz. Though the

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 ICSE2004 Proc. 2004 Kuala Lumpur, Malaysia

CM can be used in low voltage design, but

its low bandwidth does not favor its use in FbT VDO rB"
present day LV circuits.
Rajput-Jamuar Structures
A level shifted CM circuit structure is shown
in Fig. 4. M3 is used to shift the voltage level Ml

at the drain of M1. V,, is a characteristic Vos I

parameter of a LVCM and decides the range
of input voltage swing in such circuits. The _ I- j
bias current (Ibiasl) decides the operational Fig.4 Level shifted CM
region of M3 and the input current ('I,) and
the externally applied voltage at the drain 1. MI and M3 operating in sub-threshold.
tenninal of M2 decide operational mode for 2. MI operating in saturation and M3
M2. Similarly Ibmasl and Ij, decide the operating in sub-threshold region
operating region of MI. For example, low 3. Ml and M3 operating in saturation
value of Ib:asl forces M3 to operate in sub- The most suitable operational mode now
threshold region, while high Ibwisl ensures M3 is operation of M3 in sub-threshold region
to operate in saturation region. When Ij, is while Ml operates in sub-threshold region
high enough and drain voltage VDS is low, for low input currents and in saturation
M2 operates in triode region. For high value region for high input currents. The following
VDS2, M2 operates in saturation region. For analysis assumes that M3 operates in sub-
low input currents and high Ibi,lsl, the gate threshold region while MI can operate in
voltage for Ml is high (correspondingly sub-threshold and/or saturation region. The
input current is also high). Thus Vin can be necessary conditions for these operations are
calculated for this circuit structure if wd. The current through M3 should be small
know the values of VGsI and VGS3. Since VTP enough to keep M3 in sub-threshold region.
> VTN, there is a difficulty to keep the Correspondingly WIL ratio should be large.
condition VGsl- VGs3 > 0 valid in a level The current through MI should be large to
shifter based circuits over a wide range of Iin. keep it in saturation region. However when
One of the solutions is to use a lateral p-n-p input current will be low it will operate in
transistor for level shifting, and now sub-threshold region. Various structures are
Vin-VGSl-VBE. Generally VBE approximates as shown in Figs 5, 6 ,7 respectively [5-7].
0.7 V and VGSI is always more than 0.8V (if
we assume VT = 0.8V). As the device sizes Structure 1:
are reducing and VTis also reducing and there
will be a situation where VGSI-VBE > 0 will
not be valid and hence we may not be able to
use a p-n-p transistor. Thus, there is a need to
have an alternative a p-n-p transistor and the
use of a PMOS transistor is the most obvious
choice. Thus it becomes necessary to discuss
various possible modes of operation this
circuit and to identify the suitable modes,
which result in the desirable properties for
the resultant LVCM structure. Before we Mt
discuss them we invoke various equations,
which describe the drain current of a
MOSFET in various regions.
All symbols have usual meanings. There
may be many possible combinations in Fig. 5 LVCM structurel
which transistor M1, M2 and M3 can be
operated such as

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 ICSE2004 Proc. 2004 Kuala Lumpur, Malaysia

Structure 2: MOSFET operates as a depletion type device

and it can work with negative, zero or
slightly positive bias voltages also. The other
major advantages offered by bulk driven
MOSFETs are their large voltage ON/OFF
ratio, which can be used for modulation.
VDD

m. M r lMI2 Mmel

VS

vsS
Structure 3: MIL Fig 7: Bulk-driven MOSFET based CM

VII. CONCLUSIONS
In this discussion we have presented
various possible CM structures along with
1F-
~ ~ ~ ~ their merits and demerits.
In-4LMI r,-m*
PM 0Sf,
I
REFERENCES
M1I
MW MIM
9
MI

[1]. M. Ismail and T. Fiez, "Analog VLSI Signal and

Fig 6. LVCM structure 3 Information Processing", New York: McGraw-
Hill 1994
Bulk-driven MOSFETs based CMs [2] P.E. Allen and D. R. Holberg, "CMOS analog
Blalock et al have adopted the bulk driven circuit design", New York: Holt, Rinehart and
MOSFETs technique for low voltage analog Winston, Inc. 1987.
[3]. P. E. Allen and D. R. Holberg, "CMOS analog
circuits [8]. For a MOSFET to perform any circuit design", New York: Oxford University
signal-processing task there should be some Press, 2002.
biasing current through its drain. This [4]. R. Gregorian and G. C. Temes, 'Analog MOS
biasing current in conventional gate driven integrated circuits for signal processing', New
MOSFET comes when the applied gate bias [5]. S. S. John York: Wiley and Sons 1986.
Rajput and S. S. Jamuar, "A high
overcomes the threshold voltage. However, performance current mirror for low voltage
in bulk driven technique as shown in Fig. 7 designs", Proc. APCCAS-2000/IEEE, Tianjin pp.
[8], a MOSFET is biased in saturation mode 170-173, China, Dec 2000.
so as to have a continuous drain current and [6]. S. S. Rajput and S. S. Jamuar, "Low voltage, Low
power High performance Current Mirror for
the input signal is applied at the bulk contact. portable Analogue and Mixed Mode
A close look on bulk driven MOSFET Applications", Proc.IEE - Circuits Devices and
suggests that the bulk driven MOSFET Syst, vol. 148, No. 5, pp. 273-278, Oct. 2001.
structure acts similar to a JFET. Due to the [7]. S. S. Rajput and S. S. Jamuar, "High Current, Low
applied gate voltage a channel exists between Voltage Current mirrors and Applications", in
VLSI: Systems on a Chip, Edited by L. M.
the source and drain of the MOSFET. The Silveira, S. Devadas and R. Reis, (Kluwer
channel width is constant as long as gate bias Academic Publishers, Netherlands 2000).
does not change as the case is for bulk-driven [8]. B. J. Blalock, P. E. Allen and G. A. R. Rincon-
MOSFETs. The bulk contact serves the Mora, "Designing I-V op amps using standard
digital CMOS technology", IEEE Trans. Circuits
function of the gate of the virtual JFET and Syst.-II, vol. 45, pp. 769-780, July 1998.
modulates the channel width according to the
applied voltage. Thus the bulk driven

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