Simplified Instructional Computer (SIC)

A hypothetical computer that includes the hardware features most often found on real machines
SIC standard model SIC/XE

Upward compatible
Programs for SIC can run on SIC/XE

SIC machine architecture

Memory
8-bit bytes 3 consecutive bytes form a word
Addressed by the lowest number byte

215 (32768) bytes in the computer memory

A word (3 bytes)

32768 = 215 bytes

SIC machine architecture

Registers (5 registers / each 24-bits)
Mnemonic A X L Number 0 1 2 Special use Accumulator; used for arithmetic operations Index register; used for addressing Linkage register; the Jump to Subroutine (JSUB) instruction stores the return address in this register Program counter; contains the address of the next instruction to be fetched for execution Status word; contains a variety of information, including a Condition Code (CC)

PC SW

8 9

SIC does not have any stack. It uses the linkage register to store the return address. It is difficult to write the recursive program. A programmer has to maintain memory for return addresses when he write more than one layer of function call.

SIC machine architecture

Data formats
Characters
8-bit ASCII codes

Integers
24-bit binary numbers 2s complement for negative values
-N 2n N e.g., if n = 4, -1 24 1 = (1111)2.

No floating-point numbers (exist in SIC/XE)

SIC machine architecture

Instruction formats
24-bits format
opcode (8) x address (15)

Note that the memory size of SIC is 215 bytes X is to indicate index-address mode

Addressing modes
Mode Direct Indexed Indication x=0 x=1 Target address calculation TA = address TA = address + (X)

SIC machine architecture

Instruction set
Load and store instruction
LDA, LDX, STA, STX Ex: LDA ALPHA STA ALPHA (A) (ALPHA) (ALPHA) (A)

Arithmetic instruction
involve register A and a word in memory ADD, SUB, MUL, DIV Ex: ADD ALPHA (A) (A) + (ALPHA)

Comparison instruction
involves register A and a word in memory save result in the condition code (CC) of SW COMP Ex: COMP ALPHA CC (<,+,>) of (A)?(ALPHA)

SIC machine architecture

Instruction set (Cont.)
Conditional jump instructions
according to CC JLE, JEQ, JGT
test CC and jump accordingly

Subroutine linkage instructions

JSUB
jumps and places the return address in register L

RSUB
returns to the address in L

SIC machine architecture

Input and output
Input and output are performed by transferring 1 byte at a time to or from the rightmost 8 bits of register A Each device is assigned a unique 8-bits code Three I/O instructions
The Test Device (TD) instruction
tests whether the addressed device is ready to send or receive a byte of data CC : < : ready CC : = : busy

Read Data (RD) Write Data (WD)

Simple I/O example for SIC

Page 19, Figure 1.6
INLOOP TD JEQ RD STCH . . TD JEQ LDCH WD . . BYTE BYTE RESB INDEV INLOOP INDEV DATA TEST INPUT DEVICE LOOP UNTIL DEVICE IS READY READ ONE BYTE INTO REGISTER A STORE BYTE THAT WAS READ

OUTLP

OUTDEV OUTLP DATA OUTDEV

TEST OUTPUT DEVICE LOOP UNTIL DEVICE IS READY LOAD DATA BYTE INTO REGISTER A WRITE ONE BYTE TO OUTPUT DEVICE

INDEV OUTDEV DATA

XF1 X05 1

INPUT DEVICE NUMBER OUTPOUT DEVICE NUMBER ONE-BYTE VARIABLE

Programming examples - Data movement

Page 13, Figure 1.2 (a)
LDA STA LDCH STCH . . ALPHA FIVE CHARZ C1 RESW WORD BYTE RESB FIVE ALPHA CHARZ C1 LOAD CONSTANT 5 INTO REGISTER A STORE IN ALPHA LOAD CHARACTER Z INTO REGISTER A STORE IN CHARACTER VARIABLE C1

1 5 CZ 1

ONE-WORD VARIABLE ONE-WORD CONSTANT ONE-BYTE CONSTANT ONE-BYTE VARIABLE

Programming examples - Arithmetic

Page 15, Figure 1.3 (a)
LDA ADD SUB STA LDA ADD SUB STA . . ONE . ALPHA BETA GAMMA DELTA INCR WORD RESW RESW RESW RESW RESW ALPHA INCR ONE BETA GAMMA INCR ONE DELTA LOAD ALPHA INTO REGISTER A ADD THE VALUE OF INCR SUBTRACT 1 STORE IN BETA LOAD GAMMA INTO REGISTER A ADD THE VALUE OF INCR SUBTRACT 1 STORE IN DELTA

1 1 1 1 1 1

ONE-WORD CONSTANT ONE-WORD VARIABLES

Programming examples -Looping and indexing

Page 16, Figure 1.4 (a)
MOVECH LDX LDCH STCH TIX JLT . . BYTE RESB ZERO STR1,X STR2,X ELEVEN MOVECH INITIALIZE INDEX REGISTER TO 0 LOAD CHARACTER FROM STR1 INTO REG A STORE CHARACTER INTO STR2 ADD 1 TO INDEX, COMPARE RESULT TO 11 LOOP IF INDEX IS LESS THAN 11

STR1 STR2 . ZERO ELEVEN

CTEST STRING 11

11-BYTE STRING CONSTANT 11-BYTE VARIABLE ONE-WORD CONSTANTS

WORD 0 WORD 11

Programming examples - Indexing and looping

Page 17, Figure 1.5 (a)
ADDLP LDA STA LDX LDA ADD STA LDA ADD STA COMP JLT . RESW RESW RESW RESW WORD WORD WORD ZERO INDEX INDEX ALPHA,X BETA,X GAMMA,X INDEX THREE INDEX K300 ADDLP 1 100 100 100 ONE-WORD CONSTANTS 0 300 3 INITIALIZE INDEX VALUE TO 0 LOAD INDEX VALUE INTO REGISTER X LOAD WORD FROM ALPHA INTO REGISTER A ADD WORD FROM BETA STORE THE RESULT IN A WORD IN GAMMA ADD 3 TO INDEX VALUE

COMPARE NEW INDEX VALUE TO 300 LOOP IF INDEX IS LESS THAN 300 ONE-WORD VARIABLE FOR INDEX VALUE ARRAY VARIABLES100 WORDS EACH

INDEX . ALPHA BETA GAMMA . ZERO K300 THREE

Programming examples - Subroutine call and record input

Page 20, Figure 1.7 (a)
JSUB . . READ RLOOP LDX TD JEQ RD STCH TIX JLT RSUB . BYTE RESB WORD WORD ZERO INDEV RLOOP INDEV RECORD,X K100 RLOOP READ CALL READ SUBROUTINE SUBROUTINE TO READ 100-BYTE RCORD INITAILIZE INDEX REGISTER TO 0 TEST INPUT DEVICE LOOP IF DEVICE IS BUSY READ ONE BYTE INTO REGISTER A STORE DATA BYTE INTO RECORD ADD 1 TO INDEX AND COMPARE TO 100 LOOP IF INDEX IS LESS THAN 100 EXIT FROM SUBROUTINE INPUT DEVICE NUMBER 100-BYTE BUFFER FOR INPUT RECORD ONE-WORD CONSTANTS

INDEV RECORD . ZERO K100

XF1 100 0 100

Define storage
WORD/BYTE
Reserve one word/byte of storage

RESW/RESB
Reserve one or more words/bytes of storage

Example
ALPHA FIVE CHARZ C1 RESW WORD BYTE RESB 1 5 C`Z 1

Special symbols (SIC & SIC/XE)

# @ + * C` op : immediate addressing : indirect addressing : format 4 : the current value of PC : character string m, x : x denotes the index addressing

SIC/XE machine architecture

Memory
Maximum memory available on a SIC/XE system is 1 megabyte (220 bytes) Instruction format and addressing modes are changed

Register (Additional registers)

Mnemonic B S T F Number 3 4 5 6 Special use Base register; used for addressing General working register-no special use General working register-no special use Floating-point accumulator (48bits)

Registers S and T are only for storing data. They can not use for accumulator
Ex: ADDR S, A COMPR X, T A A+S

SIC/XE machine architecture

Data formats
There is a 48-bit floating-point data type
1 11 s exponent 36 fraction

sign bit s (0: +, 1: -) fraction f: a value between 0 and 1 exponent e: unsigned binary number between 0 and 2047 value: s * f * 2 (e-1024) Ex: 5 = 22+20=(2-1+2-3)*23= (2-1+2-3)*21027-1024 0,10000000011,1010000.0

SIC/XE machine architecture

Instruction formats
Since the memory used by SIC/XE may be 220 bytes, the instruction format of SIC is not enough.
Solutions
8 1 15 x address
Use relative addressing opcode Extend the address field to 20 bits

SIC/XE instruction formats

! ! ! !

" "

# !" # !" !" $ $ # # & % !" #! " ! "

" # !" " # !" %

SIC/XE machine architecture

Addressing modes
New relative addressing modes for format 3
Mode Base relative Program-counter relative Indication Target address calculation b=1,p=0 b=0,p=1 TA=(B)+disp (0 disp 4095)

TA=(B)+disp (-2048 disp 2047)

When base relative mode is used, disp is a 12-bits unsigned integer When program-counter relative mode is used, disp is a 12-bits signed integer
2s complement

Direct addressing for formats 3 and 4 if b=p=0 These two addressing mode can combine with index addressing if x=1

SIC/XE machine architecture

Addressing modes
Bits x,b,p,e: how to calculate the target address
relative, direct, and indexed addressing modes

Bits i and n: how to use the target address (TA)

Mode Immediate addressing Indirect addressing Indication i=1, n=0 i=0, n=1 Operand value TA: TA is used as the operand value, no memory reference ((TA)): The word at the TA is fetched. Value of TA is taken as the address of the operand value Standard SIC (TA):TA is taken as the address of the operand value

Simple addressing

i=0, n=0 i=1, n=1

Addressing mode example

. . . 3030 . . . 3600 . . . 6390 . . . C303 . . . . . . 003600 . . . 103000 . . . 00C303 . . . 003030 . . . (B)=006000 (PC)=003000 (X)=000090

Addressing mode example

Machine instruction Hex op 032600 03C300 022030 010030 003600 0310C303 000000 000000 000000 000000 000000 000000 n i Binary x b p e disp/address 1 1 0 0 1 0 0110 0000 0000 1 1 1 1 0 0 0011 0000 0000 1 0 0 0 1 0 0000 0011 0000 0 1 0 0 0 0 0000 0011 0000 0 0 0 0 1 1 0110 0000 0000 1 1 0 0 0 1 0000 1100 0011 0000 0011 Value Target loaded into address register A 3600 6390 3030 30 3600 C303 103000 00C303 103000 000030 103000 003030

Addressing mode summary

Addressing type Simple Flag bits nixbpe 110000 110001 110010 110100 111000 111001 111010 111100 000--001--100000 100001 100010 100100 010000 010001 010010 010100 Assembler lenguage notation +op c +op m +op m +op m +op c,X +op m,X +op m,X +op m,X +op m +op m,X +op @c +op @m +op @m +op @m +op #c +op #m +op #m +op #m Calculation of target address TA disp addr (PC)+disp (B)+disp disp+(X) addr+(X) (PC)+disp+(X) (B)+disp+(X) b/p/e/disp b/p/e/disp+(X) disp addr (PC)+disp (B)+disp disp addr (PC)+disp (B)+disp Operand (TA) (TA) (TA) (TA) (TA) (TA) (TA) (TA) (TA) (TA) ((TA)) ((TA)) ((TA)) ((TA)) TA TA TA TA Notes 4D 4D 4DA 4DA 4D 4D 4DA 4DA 4DAS 4DAS 4D 4D 4DA 4DA 4D 4D 4DA 4DA

Indirect

Immediate

SIC/XE machine architecture

Instruction set
Standard SICs instruction Load and store registers (B, S, T, F)
LDB, STB,

Floating-point arithmetic operations

ADDF, SUBF, MULF, DIVF

Register-register arithmetic operations

ADDR, SUBR, MULR, DIVR

Register move operations

RMO

Supervisor call (SVC)

generates an interrupt for OS (Chap 6)

Input/Output
SIO, TIO, HIO: start, test, halt the operation of I/O device

SIC/XE machine architecture

Instruction set
Refer to Appendix A for all instructions (Page 496) Notations for appendix
A (m..m+2): move word begin at m to A P: privileged instruction X: instruction available only in SIC/XE C: condition code CC

Programming examples (SIC/XE) - Data movement

Page 13, Figure 1.2 (b)
LDA STA LDA STCH . . ALPHA RESW C1 RESB #5 ALPHA #90 C1 LOAD VALUE 5 INTO REGISTER A STORE IN ALPHA LOAD ASCII CODE FOR Z INTO REG A STORE IN CHARACTER VARIABLE C1

1 1

ONE-WORD VARIABLE ONE-BYTE VARIABLE

Programming examples (SIC/XE) - Arithmetic

Page 15, Figure 1.3 (b)
LDS LDA ADDR SUB STA LDA ADDR SUB STA . . . ALPHA BETA GAMMA DELTA INCR RESW RESW RESW RESW RESW INCR ALPHA S,A #1 BETA GAMMA S,A #1 DELTA LOAD VALUE OF INCR INTO REGISTER S LOAD ALPHA INTO REGISTER A ADD THE VALUE OF INCR SUBTRACT 1 STORE IN BETA LOAD GAMMA INTO REGISTER A ADD THE VALUE OF INCR SUBTRACT 1 STORE IN DELTA

ONE WORD VARIABLES 1 1 1 1 1

Programming examples (SIC/XE) -Looping and indexing

Page 16, Figure 1.4 (b)
MOVECH LDT LDX LDCH STCH TIXR JLT . . BYTE RESB #11 #0 STR1,X STR2,X T MOVECH INITIALIZE REGISTER T TO 11 INITIALIZE INDEX REGISTER TO 0 LOAD CHARACTER FROM STR1 INTO REG A SOTRE CHARACTER INTO STR2 ADD 1 TO INDEX, COMPARE RESULT TO 11 LOOP IF INDEX IS LESS THAN 11

STR1 STR2

CTEST STRING 11

11-BYTE STRING CONSTANT 11-BYTE VARIABLE

Programming examples (SIC/XE) - Indexing and looping

Page 17, Figure 1.5 (b)
LDS LDT LDX LDA ADD STA ADDR COMPR JLT . . RESW RESW RESW #3 #300 #0 ALPHA,X BETA,X GAMMA,X S,X X,T ADDLP INITIALIZE REGISTER S TO 3 INITIALIZE REGISTER T TO 300 INITIALIZE INDEX REGISTER TO 0 LOAD WORD FROM ALPHA INTO REGISTER A ADD WORD FROM BETA STORE THE RESULT IN A WORD IN GAMMA ADD 3 TO INDEX VALUE COMPARE NEW INDEX VALUE TO 300 LOOP IF INDEX VALUE IS LESS THAN 300

ADDLP

. ALPHA BETA GAMMA

ARRAY VARIABLES100 WORDS EACH 100 100 100

Programming examples (SIC/XE) - Subroutine call and record input

Page 20, Figure 1.7 (a)
JSUB . . . READ RLOOP LDX LDT TD JEQ RD STCH TIXR JLT RSUB . . READ CALL READ SUBROUTINE

SUBROUTINE TO READ 100-BYTE RECORD #0 INITIALIZE INDEX REGISTER TO 0 #100 INITIALIZE REGISTER T TO 100 INDEV TEST INPUT DEVICE RLOOP LOOP IF DEVICE IS BUSY INDEV READ ONE BYTE INTO REGISTER A RECORD,X STORE DATA BYTE INTO RECORD T ADD 1 TO INDEX AND COMPARE TO 100 LOOP IF INDEX IS LESS THAN 100 RLOOP EXIT FROM SUBROUTINE

INDEV BYTE RECORD RESB

XF1 100

INPUT DEVICE NUMBER 100-BYTE BUFFER FOR INPUT RECORD