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INTRODUCTION

Now a days smart card is operated in various field for e.g. Money transaction in
bank, Attendance register card in Industry, security system for lockers. All this card
available in market is magnetic type, magnetic bar is present in that card and through
code bar reader we read the contains e.g. card. In our project this types of card mfg. is
not possible for us so we use a card . In which semiconductor memory is present and we
write contain in hex code in that memory in our project we use this s. m. card as a
security system for bank lockers i.e. when a person will enter this card or his card in
system corresponding locker is automatically open i.e. system card contain of memory
chip present in card and compares pts locker number if number is correct then lock is
open otherwise buzzer is ON to indicate wrong person handle this system.
This project consist of following main blocks -
1) Power supply.
2) Micro controller
3) Semi conductor memory card (i.e. S.C.)
4) LCD Display.
5) Relay, Buzzer and Indicator.
6) Crystal and Oscillator circuit.
7) Reset circuit.
8) Key pad.

DISCREPTION OF VARIOUS BLOCKS OF BLOCK DIAGRAM :-

I) Power Supply :-

In our project we use micro controller IC 89 C57, 89 C2051 decoder IC 74 C922

all these IC required supply voltage ranges from 3 to 6 volt d. c. regulated supply and
relay required 12V. supply. Available sources for us is 230 V.A.C. mains to convert this
A.C. into lower value A.C. ( i.e. step down up to 15 V.A.C.) we use step down
transformer of 230 V. primary to 0-15 V (500MA) secondary. After step down we rectify
this A.C. to D.C. using full wave bridge type rectifier. And filter the ripple using filter
conductor. For regulated +5V. d. c. and short circuit overload projection we use voltage
regulator IC 7805.
II) Micro controller unit :-
In our project we use MCS 51 family IC 89C51 this IC has number of future such
as in built EEPROM, 128 byte RAM, series TXD, RXD line for serial communication.
Fully static operation from OH3 to 12 MH3 etc. This micro controller is use in system of
our project in which we can insert our card. In the memory of this IC we can feed four
code corresponding to four locker for clamor purpose. When we insert our card in
system this micro controller can read the contain of card through serial dates
communication line TXD and RXD. After reading contain of card it can store in one of
the memory register and compare the fore fix code previously store in memory if any one
code is match with card code the corresponding LED relay is turn on an locker is open if
there is no matching in card code and micro code then micro controller can turn on
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buzzer for sound indication so that all person knows that wrong person handle this unit.
At the smart time micro controller send data to display unit to show code on display.
III) Relay, buzzer and Indicator :-
After inserting card in system we can press enter button so that micro controller
89 C 51 present in system can read the contain of memory chip IC 89 C LO51 in s. m. c.
through serial line TXD and RXD. After reading code in memory 89 C51 can compair
this code with list of code present in its own memory and after that any one code is match
then corresponding code relay and LED is turn on so that locker is open. And if buzzer
and red LEb to indicate wrong person can handle our system.
IV) Crystal and Oscilator :-
In our project we use two MCIC 89C51 and 89C 1051 this both IC required
machine cycle to fetch and execute instruction present in its memory for this purpose
Oscillator driver circuit is present in IC and we required to connect 12 MHz. (for higher
speed execution) crystal between pin XTAL1 and XTAL2 pin of micro controller.
V) Reset circuit :-
When we turn power program execution must start from memory location 0D
00H for this purpose we use RC timing circuit between pin RST and supply so that when
power supply is turn ON this circuit can give reset pulse to Mc so that it start program
execution from beginning.
VI) Key Pad :-
The predominant interface between humans and computers is the keyboard.
Keyboards range in complexity from the "up-down" buttons used for elevators to the
personal computer QWERTY layout, with the addition of function keys and numeric
keypads. One of the first mass uses for the microcontroller was to interface between the
keyboard and the main processor in personal computers. Industrial and commercial
applications fall somewhere in between these extremes, using layouts that might feature
from six to twenty key.
Human Factors
The keyboard application program must guard against the following possibilities:
• More than one key pressed (simultaneously or released in any sequence)
• Key pressed and held
• Rapid key press and release
All of these situations can be addiessed by hardware or software
means; software, which is the most cost-effective, is emphasized here.

CRYSTALONICS's Dot - Matrix ( Alphanumeric ) liquid crystal.

Displays are available in TN, STN and TF types, with or without Backlight. The use of
C-MOS LCD Controller and Driver ICs result in low power consumption. These
modules can be interfaced with a 4 - bit or 8 - bit Micro - Processor / Micro - Controller.

SEMICONDUCTOR MEMORY CARD :-

For our project we can made a card in which memory chip is place so that code is
write in memory for corresponding locker. It we use RAM as memory chip then Pt is
essential to back up power 24 hours to RAM so that it is contain does not erase but this
method is not possible because we exa-battery to our card and in case of battery failure
our card is excise. If we use non volatile memory chip such as EPROM which does not
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required any type of back up supply, in our card then there is possibility of code read by
illegal person using EPROM programmer. So we required such type of memory chip
which has non volatile in nature and having software memory lock facility so we choose
IC 89 C 1051. This IC is one type of micro controller in which 1k byte of flash
( electrically programmable, erasable ) memory having two bit software memory lock,
after writing the code in flash memory we can lock its memory through software which is
not possible to illegal person to brake this lock and read contains of memory.
Also this IC two serial line TXD and RXD through which we can transmitter and
receive the code to main unit so on of line ( data line and address line ) is reduced and
size of card also reduces so using just four pins (TXD, PXD VCC) we can insert our card
in system.
Description
The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer
with 4K bytes of Flash programmable and erasable read only memory (PEROM). The
device is manufactured using Atmel's high-density nonvolatile memory technology and is
compatible with the industry-standard MCS-51 instruction set and pinout. The on-chip
Flash allows the program memory to> be reprogrammed in-system or by a conventional
nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a
monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides a
highly-flexible and cost effective solution to many embedded control applications.
The AT89C51 provides the following Standard features: 4K bytes of Flash, 128
bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt
architecture, a full duplex serial port, on-chip oscillator and clock circuitry. In addition,
the AT89C51 is designed with static logic for, operation down to zero frequency and
supports two software selectable power-saving modes. The Idle Mode stops the CPU
while allowing the RAM, timer/counters, serial port and interrupt system to continue
functioning. The Power-down Mode saves the RAM contents but freezes the oscillator
disabling all other chip functions until the next hardware reset.

Pin Description.
VCC
Supply voltage.
GND
Ground.
Port 0
Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink
eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-
impedance inputs.
Port 0 may also be configured to be the multiplexed low-order address/data bus during
accesses to external program and data memory. In this mode PO has internal pullups.
Port 0 also receives the code bytes during Flash programming, and outputs the code bytes
during program verification. External pullups are required during program verification.
Port 1
Port 1 is an 8-bit bi-directional I/O port with internal pullups. The Port 1 output
buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are
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pulled high by the internal pullups and can be used as inputs. As inputs, Port l pins that
are externally being pulled low will source current IIL because of the internal pullups.
Port 1 also receives the low-order address bytes during Flash programming and
verification.
Port2
Port 2 is an 8-bit bi-directional I/O port with internal pullups. The Port 2 output buffers
can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high
by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally
being pulled low will source current IIL because of the internal pullups.
Port 2 emits the high-order address byte during fetches from external program memory
and during accesses to external data memory that use 16-bit addresses (MOVX @
DPTR). In this application, it uses strong internal pullups when emitting 1s. During
accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits
the contents of the P2 Special Function Register.
Port 2 also receives the high-order address bits and some control signals during Flash
programming and verification.
Port 3
Port 3 is an 8-bit bi-directional I/O port with internal pullups. The Port 3 output buffers
can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high
by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally
being pulled low will source current IIL because of the pullups.
Port 3 also serves the functions of various special features of the AT89C51 as listed
below.
Port in Alternate Functions
P3.0 RXD (serial input port)
P3.1 TXD (serial output port )
P3.2 INT0 (external interrupt 0)
P3.3 INT1 (external interrupt 1)
P3.4 T0 (timer 1 external input )
P3.5 T1 (timer 1 external input)
P3.6 WR (external data memory write strobe)
P3.7 RD (external data memory read strobe)

Port 3 also receives some control signals for Flash programming and verification.
RST
Reset input. A high on this pin for two machine cycles while the oscillator is running
resets the device.
ALE/PROG
Address Latch Enable output pulse for latching the low byte of the address during
accesses to external memory. This pin is also the program pulse input (PROG) during
flash programming.
In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and
may be used for external timing or clocking purposes. Note, however, that one ALE
pulse is skipped during each access to external Data Memory.
If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the
bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is
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weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in
external execution mode.
PSEN
Program Store Enable is the read strobe to external program memory.
When the AT89C51 is executing code from external program memory, PSEN is activated
twice each machine cycle, except that two PSEN activations are skipped during each
access to external data memory.
EA/VPP
External Access Enable. EA must be strapped to GND in order to enable the device to
fetch code from external program memory locations starting at 0000H up to FFFFH.
Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset.
EA should be strapped to Vcc for internal program executions.
This pin also receives the 12-volt programming enable voltage (Vpp) during Flash
programming, for parts that require 12-voltVpp.
XTAL1
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier.
Program Memory Lock Bits
On the chip are three lock bits which can be left unprogrammed (U) or cart be
programmed (P) to obtain the additional features listed in the table below.
When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched
during reset. If the device is powered up without a reset, the latch initializes to a random
value, and holds that value until reset is activated. It is necessary that the latched value of
EA be in agreement with the current logic level at that pin in order for the device to
function properly.
Intelligent LCD Display
In this section, we examine an intelligent LCD display of two lines, 20 characters
per line, that is interfaced to the 8051. The protocol (handshaking) for the display is
shown in Figure 10.8, and the interface to the 8051 in Figure. The display contains two
internal byte-wide registers, one for commands (RS = 0) and the second for characters to
be displayed (RS = 1). It also contains a user-programmed RAM area (the character
RAM) that can be programmed to generate any desired character that can be formed
using a dot matrix. To distinguish between these two data areas, the hex command byte
80 will be used to signify that the display RAM address 00h is chosen.
Port I is used to furnish the command or data byte, and ports 3.2 to 3.4 furnish register
select and read/write levels.
The display takes varying amounts of time to accomplish the functions listed in Figure.
LCD bit 7 is monitored for a logic high (busy) to ensure the display is not overwritten. A
slightly more complicated LCD display (4 lines X 40 characters) is currently being used
in medical diagnostic systems to run a very similar program.

The built - in Controller IC has the following features :-

* Correspond to high speed MPU interface ( 2 MHz )
* 80 x 8 bit display RAM ( 80 characters max. )
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*9, 920 bit character generator ROM for a total of 240 character fonts.
208 character fonts ( 5 x 8 dots )
32 character fonts ( 5 x 10 dots )
* 64 x 8 bit character generator RAM
8 character fonts ( 5 x 8 dots )
4 character fonts ( 5 x 10 dots )
* Programmable duty cycles
1/8 - for one line of 5 x 8 dots with cursor
1/11 - for one line of 5 x 10 dots with cursor
1/16 - for two lines of 5 x 8 dots with cursor
* Wide range of instruction functions
display clear, cursor home, display on/off, cursor on/off.
display character blink, cursor shift, display shift.
* Automatic reset circuit, that initializes the Controller/Driver ICs after power on.
PIN DETAILS
Pin No. Symbol Description
Pin 1 VSS Ground Terminal , OV
Pin 2 VDD Supply Terminal, +5V
Pin 3 VL Liquid Crystal drive Voltage
Pin 4 RS Register Select :
RS = 0 - Instruction Register
RS = 1 - Data Register
Pin 5 R/W Read / Write :
R/W = 1 - Read
R/W = 0 - Write
Pin 6 E Enable :
Enables Read / Write
Pin 7 to DBO to Bi-directional data-bus :
Pin 14 DB7 When interface data length is B-bits, data transfer is done once
through DBO - DB7. When the interface data length is 4-bits, data
transfer is done once through DBO - DB7. When the interface data
length is 4-bits, data transfer is done twice through DB4 - DB7.
Pin 15 BACKL In case of 15 Pin Modules, Pin 15 is the Supply Voltage (+5V) for
Pin 16 IGHT the LED.
SUPPL In case of 16 Pin Modules, Pin 15 is the Ground ( OV ) and Pin 16
Y is the Supply Voltage ( +5V ) for the LED.

FUNCTIONAL DESCRIPTION OF THE CONTROLLER IC

Registers :
The Controller IC has two 8 bit Registers, an Instruction Register (IR) and a Data
Register (DR). The IR stores the Instruction codes and address information for Display
Data RAM (DD RAM) and Character Generator RAM (CG RAM). The IR can be
written, but not read by the MPU.
The DR temporarily stores data to be written to/read from the DD RAM or CG RAM.
The data written to DR by the MPU, is automatically written to the DD RAM or CG
RAM as an internal operation.
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When an address code is written to IR, the data ( of the specified address ) is
automatically transferred from the DD RAM or CG RAM to the DR. Data transfer
between the MPU is then completed when the MPU reads the DR. Like wise, for the
next MPU read of the DR, data in DD RAM or CG RAM at the next address is sent to the
DR automatically. Similarly, for the MPU write of the DR, the next DD RAM or CG
RAM address is selected for the write operation.

The Register selection table is as shown below :

RS R/W Operation
0 0 IR write as an internal operation
0 1 Read Busy Flag (DB7) and Address
Counter (DBO to DB6)
1 0 DR write as an internal operation
(DR to DD RAM or CG RAM)
1 1 DR read as an internal operation
( DD RAM or CG RAM to DR)

Busy Flag :
When the busy flag is 1, the controller is in the internal operation mode, and the next
instruction will not be accepted.
When RS = 0 and R/W = 1, the busy flag is output to DB7.
The next instruction must be written after ensuring that the busy flag is 0.
Address Counter :
The address counter allocates the address for the DD RAM and CG RAM Read/Write
operation. When the instruction code for a DD RAM address or CG RAM address
setting, is input to IR, the address code is transferred from IR to the Address Counter.
After writing/reading the display data to/from the DD RAM or CG RAM, the Address
Counter increments/decrements by one the address, as an internal operation. The data of
the Address Counter is output to D8O to D86 while R/W = 1 and RS = 0.
Display Data RAM (DD RAM)
The characters to be displayed are written into the Display Data RAM (DD RAM), in the
form of 8 bit character codes present in the character font table. The extended capacity of
the DD RAM is 80 x 8 bits i.e. 80 characters.
Character Generator ROM (CG ROM)
The Character Generator ROM generates 5 x 8 dot or 5 x 10 dot character patterns from 8
bit character codes (refer Character Font Table). It can generate 208, 5 x 8 dot character
patterns and 32, 5 x 10 dot character patterns.
Character Generator RAM ( CG RAM )
In the Character Generator RAM, the user can rewrite character patterns by program. For
5 x 8 dots, eight character patterns can be written and for 5 x 10 dots, four character
patterns can be written.
INTERFACING THE MICRO PROCESSOR/CONTROLLER
The Module, interfaced to the system, can be treated as RAM ( Memmory Mapping ).
Input/output, expanded or parallel I/O ( Input/output Mapping ).
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Since there is no conventional chip select signal, developing a strobe signal for the enable
signal (E) and applying appropriate signals to the Register select ( RS ) and Read/Write
(R/W) signals are important.
The Module is selected by gating a decoded Module - address with the Host - processor's
Read/Write strobe. The resultant signal, applied to the LCD's Enable (E) input, clocks in
the data.
The 'E' signal must be a positive going digital strobe, which is active while data and
control information are stable and true. The falling edge of the Enable signal enables the
Data/Instruction Register of the Controller. All module timings are referenced to specific
edges of the 'E' signal. The 'E' signal is applied only when a specific module transaction
is desired.
The Read and Write strobes of the Host, which provides the 'E' signal, should not be
linked to the module's R/W line. An address bit which sets up earlier in the Host's
Machine Cycle can be used as R/W.
When the Host Processor is so fast that the strobes are too narrow to serve as the 'E' pulse
a. Prolong these pulses by using the Host's 'Ready' input.
b. Prolong the Host by adding wait states.
c. Decrease the Host's Crystal frequency.
Inspite of doing the above mentioned, if the problem continues, latch both the data and
control information and then activate the 'E' signal.
When the Controller is performing an internal operation the Busy Flag (BF) will be set
and will not accept any instruction. The user should check the Busy Flag or should
provide a delay of approximately 2 ms after each instruction.
The module presents no difficulties while interfacing slower MPUs.
The liquid crystal display module can be interfaced, either to 4-bit or B-bit MPUs.
For 4-bit data interface, the bus lines DB4 to DB7 are used for data transfer, while DB0
to DB3 lines are disabled. The data transfer is complete when the 4-bit data has been
transferred twice.
The Busy flag must be checked after the 4-bit data has been transferred twice. Two more
4-bit operations then transfer the Busy Flag and Address Counter Data.
For B-bit data interface, all eight bus lines ( DB0 to DB7 ) are used.
Key Switch Factors
The universal key characteristic is the ability to bounce: The key contacts vibrate
open and closed for a number of milliseconds when the key is hit and often when it is
released. These rapid pulses are not discernible to the human, but they last a relative
eternity in the microsecond-dominated life of the microcontroller. Keys may be
purchased that do not bounce, or keys may be de-bounced with RS flip-flops or de-
bounced in software with time delays.
Keyboard Configurations
Keyboards are commercially produced in one of the three general hypothetical
wiring configurations for a 16-key layout shown in Figure. The lead per-key
configuration is typically used when there are very few keys to be sensed. Since each key
could tie up a port pin, it is suggested that the number be kept to 16 or fewer for this
keyboard type. This configuration is the most cost-effective for a small number of keys.
The X-Y matrix connections shown in Figure. are very popular when the number of keys
exceeds 10. The matrix is most efficient when arranged as a square so that N leads for X
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and N leads for Y can be used to sense as many as N2 keys. Matrices are the most cost-
effective for a large number of keys.
Coded keyboards were evolved originally for telephonic applications involving
touch-tone signaling. The coding permits multiple key presses to be easily detected. The
quality and durability of these keypads are excellent as a result.
Bounce : A time delay that is known to exceed the manufacturer’s specification is used
to wait out the bounce period in both directions.
Multiple keys : Only patterns that are generated by a valid key pressed are accepted all
others are ignored and the first valid pattern is accepted.
Key held : Valid key pattern accepted after valid debounce delay; no additional keys
accepted until all keys are seen to be up for a certain period of time.
Rapid key hit : The design is such that the keys are scanned at a rate faster than any
human reaction time.

Circuit operation
Fig shows complete ckt dig of our project smart card control system in this project
there are two sections one is micro controller unit i.e reader section and other is smart
card. This smart card is attach to micro controller(Reader section) unit thro' TxD, RxD
line. So that data (Identity of person) store in smart card memory IC is read by reader unit
& take action. In our project the main advantages is memory lock facility for data store in
smart card IC and other is baud rate freq. At which data is transmitted over Txb Rxd line
from smart card to micro controller unit.
In our smart card we feed no. 1,2 &3 to open lock at receiver side. Smart card is basically
a memory IC 89C2051 having lock bit facility and serial data transmission facility in
Reader section(micro controller unit )we connect three LED Red, Yellow, Green at pin
PI.2, PI.3 & PI.4, thro' current limiting resistance are R1, R2 & R3 this LED indicate
which locker is open corresponding smart card number. At pin P1.0 we connect a relay
driving transistor T1 thro' base biasing resistance R5. Locker is operated thro' this relay
as shown in fig.
As shown in fig. this solanoid consist of shaft of spring tension when we provide
supply of 12 dc to solanoid then current is flowing through this solanoid and due lo
magnetic field shaft is forcefully pulled out and become a lock. To provide supply of 12v
de we use relay 1 as electronic switch for solanoid this relay having three terminal,
normal close(NC), normaly open(NO) and commen (c) and two point of coil .To operate
this relay we required up to 80 mA current as we know that PC o/p current is only 20mA
we required current amplification so we use driving transistor TI(SLIOO) for this purpose
.As we know that micro controller o/p is in digital form that is it has only two stat
logically zero(0v dc) or logically 1 (5vdc).
When we require to turn on this relay we simply set logically I pin pl.0 of
microcontroller i.e. by giving soft ware command SETB Pl.0 so at base to transistor Tl
we get 5vdc so base to emetter junction of transistor becomes forward bias and transistor
conduct from ON state from off condetion. Due to which high current flow through
collector and coil of relay and it produces magnetic field so contact common of relay is
attrect from NC towards this magnetic field an it becomes connected to NO strip and we
get switching action. This NC terminal connected to + terminal of 12v dc and –ve
terminal of 12vdc is directly connected to solanoid so through relay this +v dc provided
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to solanoid coil and ckt is completed and solanoid become on. Similarly when we want to
switch off solanoid we clear(logically 0) bit pl.0 of microcontroller by giving software
command CLR Pl.O. So base emitter junction of transistor foils below 0.7vdc and it goes
in OFF state and current flowing stop through collector and relay coil so magnetic field is
disappear and again common terminal of relay is connected to NC terminal due to spring
tension .So +ve terminal of 12vdc of volt is disconnected and it becomes OFF.
To start operation of project we first insert card in socket of reder section. This
shocket consist of 4 pin (+vcc,Gnd,Txd,Rxd) After that we have to Enter password
through 16 key keyboard. This password is unique for each card when this password and
card data is match then and only then locker is open through solanoid. To enter password
we press key on keyboard. This is 4x4 matrix keyboard connected to rows and column
pin 1 to 4 & 7 to 11 pin of keyboard decoder ic3 74c922.This ic continuously scan
keyboard and when any one key is press then it convert its equivalent BCD data to its o/p
pin OA.OR.OC.QD and at the same time pin no 12 is going to become logically 0 to
logically 1 which is detected by pin p2.4 of microcontroller ic 89c52 by soft ware
instruction (JB p2.4 read). And mcrocontroller read directly corresponding BCD data and
store in it internal general purpose register .In this way microcontroller read three digit
password and compare it its internal password if password is match it give message
"password denied" on display. If password is not match then it give message "wrong
password" on display.
After checking password it check no. store in smart card When smart card is insert
in micro controller unit then pin TxD, RxD, VCC, GND are connected to each other and
when switch SI at pin p3.2 on card is press on then NO. for that card is transmitted in
card to reader section micro controller thro' TxD, RxD, pin at baud rate freq. 2400 which
is define in programmed. Micro controller read this number and store in memory location
after that no. Feed in micro controller unit can compare this receives no from smart card
for the equal no. (which compare result is zero) corresponding LED is glow and relay for
that no. Is turn ON by setting bit (suppose P1.0 for relay 1) so at P1.0 is at logic- level
(i.e. +5V d.c.) transistor T1 conduct because BE voltage of T1 is greater than 0.7 V. So
current is flowing thro' relay coil and it energize and produces magnetic field acrodd it
and provide + 12V D.C. to locker coil locker shaft pull in arrow direction as shown in fig.
And lock is open. And at the same time it show the identity of that person i.e. name,
blood group and locker no is display on 16x2 character led display. If the receive No.
from smart card is not match with no.feed inreder section micro controller unit then
buzzer driving transistor pin P1.1 is set (i.e. +5V D.C.) so transistor is conduct and
buzzer processes siren so that all people is alert about wrong person is trying to open the
lock with dummy smart card. And "wrong card is inserted" is display .Here for further
modification we also make a small auto redial telephone no. ckt which can redial police
station no automatically when wrong card is inserted .
In this project we use 16x2 character LCD display on which we can write up 32
character message. This display has 8 data line d0 to d7 three control line R/W ,EN,RS
and two supply line Vcc and ground 1 controst control line and two line for backlight
supply interfacing of display is give in detail of 8051 microcontroller book (Ayala).
At receive section i.e. at micro controller unit we store two no. From two different
Locker switch is match with first two' no in smart card (which is transmitted by placing 2
on thumbwheel & press switch SI) is not match with any one locker. So for first two no.
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Corresponding . Yellow, Green LED is on by pressing switch SI but when we transmit

fourth no. (which is indicated as dummy or duplicate smart card) the micro controller
comparison result is not 7010 so buzzer is turn ON and indicates that this card is dummy
or duplicate & no locker is open for that. And turn on RED led.
At pin 9 we connect capacitor C4 & resistance R1 for reset purpose so that when
power is turn ON capacitor C4 charge for short duration and provide reset pulse to micro
controller IC 89C52 and programmed execution from starting memory location 0000H.
At pin 18, 19 (XTAL1 & XTAL2) we connect quartz ceramics crystal of freq. 12 MHz to
produce oscillation for generation of machine cycle to fetch and execute instruction.

Advantages :-
1. It is semiconductor card,
2. It provides the facility of lock bit.
3. Hence data is not copied. or by anyway.
4. It is also provide user identify. Such as name, Add, Licensed etc.

Disadvantages :-
1. Bulky card.
2. Power supply is required for reader section for all time or Back up is required.
3. Solenoids is required for demonstrated.
4. Limitation for display character.

Application :-
1. In Attendance Register Circuit.
2. For security purpose.
3. ATM machine in Bank.
4. Many transfer in Bank.
5. Home security system.
6. Election counting room security system.

Features :-
1. Compatible with MCS-51 TM products.
2. 4 KB of in system Re-programmable flash memory - Insurance 1000 corite/frase
cycle.
3. Fully static operation : OHz to 24 MHz
4. Three - level program memory lock.
5. 128 x 8 bit internal RAM.
6. 32 programmable F/O lines.
7. Two 16 - bit Timer/counter.
8. Six interrupt sources.
9. Programmable serial channel At 89 C 2051
10. Direct LED drive operations.
11. On chip analog comparator.

Features development :-
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According to the requirement, it is necessary to modify the system, such as, (1)
thumb sensor, (2) digital image sensor, (3) Speech reorganisation.

Conclusion :-
So gentleman from this seminar we conclude that it is more secure system than
today available system.
* Easy to operate.
* Code is not exactly decodable than any other card.
From above it is concluded that it is very beneficial.

References :-
1. ATMEL Manual ( Dates Sheet ).
2. EMBEDDED MICRO CONTROLLERS AND PROCESSORS. (VOLUME-I)
3. MYKE PREDKO. ( Programming and constomizing the 8051 micro controller )
4. The 8051 micro controller and embedded system 'Muhammad Ali Muzidi'
Janics Ciillispie Muzidi.
5. Ayala.
6. www.8052.com
7. www.awesone-8051-age.com.
8. www.Intel.com.
9. www.tatamugerecohill.com.