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Computer Architecture by Asst. Prof. Dr.

Burin ZMEN b

Cyprus International University Engineering Faculty CPE 322 / ISE362 / MIS 224 / VCP 122 Computer Architecture

Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

Key Points
The evolution of computers has been characterized by increasing processor speed, decreasing component size, increasing memory size and increasing I/O capacity and speed. One factor responsible for great increase in processor is the shrinking size of microprocessor components; this reduces the distance between components and increase speed. A critical issue in computer system design is balancing the performance of various elements, so that gains in performance in one area are not handicapped by a lag in other areas.

COMPUTER EVOLUTION AND PERFORMANCE

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Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

The First Generation: Vacuum Tubes

Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

A Brief History of Computers

A Brief History of Computers The First Generation: Vacuum Tubes ENIAC (Electronic Numerical Integrator And Computer) - worlds first general-purpose electronic digital computer. Started in 1943 and completed in 1946. 1946 Designed by John Mauchly and John Presper Eckert at the University of Pennsylvanian. Designed to create ballistics tables for World War II but too late to be used in the war effort. Used to help determine the feasibility of the hydrogen bomb. Used until 1955. 4

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Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

ENIAC was a decimal rather than a binary machine. Numbers were represented in decimal form and arithmetic was performed in the decimal system. Its memory consisted of 20 accumulators, each capable of holding a 10-digit decimal number. The major drawback of the ENIAC was that it had to be programmed manually by setting switches and plugging and unplugging cables.
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Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

A Brief History of Computers: ENIAC

A Brief History of Computers: ENIAC

ENIAC was an enormous machine with weighing 30 tons occupying 1500 square feet of floor space containing more than 18,000 v cuu tubes. co g o e 8,000 vacuum ubes When operating, it consumed 140 kilowatts of power. It was being capable of 5000 additions per second.

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Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

ENIAC

A Brief History of Computers The von Neumann Machine 1945: Stored-program concept first implemented for EDVAC (Electronic Discrete Variable Computer). Key concepts: Data and instructions are stored in a single read-write memory. The contents of this memory are addressable by location, without regard to the type of data contained there. Execution occurs in a sequential fashion (unless explicitly modified) from one instruction to the next.

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Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

A Brief History of Computers: EDVAC

A Brief History of Computers: von Neumann Machine

In 1946 at Princeton Institute for Advanced Studies (IAS), von Neumann designed a stored-program computer, referred to as IAS computer, as a prototype for all subsequent general purpose computers. With rare exceptions, all of todays computers have this same general structure, and are thus referred to as von Neumann machines.
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Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

A Brief History of Computers: von Neumann Machine

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A Brief History of Computers: von Neumann Machine

General structure of IAS computer consists of the following: A main memory, which stores both data and instructions. i t ti An arithmetic and logic unit (ALU) capable of operating on binary data. A control unit, which interprets the instructions in memory and causes them to be executed. Input and output (I/O) equipment operated by the control unit.
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Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

A Brief History of Computers: von Neumann Machine

A Brief History of Computers: von Neumann Machine

The memory of IAS consists of 1000 storage locations, called words, of 40 binary digits (bits) each where data and instructions are stored. Numbers and instructions must be in binary form. Each number is represented by a sign bit and a 39bit value.

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Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

A Brief History of Computers: von Neumann Machine

von Neumann Machine

A word may also contain two 20-bit instructions, with each instruction consisting of an 8-bit operation code (opcode) specifying the operation to be performed a 12-bit address designating one of the words in memory (numbered from 0 to 999).

The control unit operates IAS by fetching instructions from memory and executing them one at a time. i This figure reveals that both control unit and ALU contain storage locations called registers.

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Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

A Brief History of Computers: von Neumann Machine

A Brief History of Computers: von Neumann Machine

Registers are defined as: Memory buffer register (MBR). Contains a word to be stored in memory or is used to receive a word form memory. Memory address register (MAR). Specifies address in memory of the word to be written from or read into MBR. Instruction register (IR). Contains 8-bit opcode instruction being executed.

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Instruction buffer register (IBR). Employed to hold temporarily the right hand instruction from a word in memory. Program counter (PC). Contains address of next instruction pair instruction-pair to be fetched from memory. Accumulator (AC) and multiplier quotient (MQ). Employed to hold temporarily operands and results of ALU operations. For example, the result of multiplying two 40-bit numbers is an 80-bit number; the most significant 40 bits are stored in AC and the least significant in MQ.
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Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

A Brief History of Computers: von Neumann Machine

A Brief History of Computers: von Neumann Machine

IAS operates by repetitively performing an instruction cycle which contains of two subcycles as fetch and execute cycles. During fetch cycle, opcode of next instruction is loaded into instruction register (IR) and address portion is loaded into memory address register (MAR). Once opcode is in IR, execution cycle is performed where data is moved or an operation is performed by arithmetic-logic unit (ALU).
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IAS computer had a total of 21 instructions. These instructions can be grouped as follows: Data transfer. Move data between memory and ALU registers or between two ALU registers. Unconditional branch. Normally, control unit executes instructions in sequence from memory. This sequence can be changed by a branch instruction. This facilitates repetitive operations. Conditional branch. Branch can be made dependent on a condition, thus allowing decision points. Arithmetic. Operations performed by ALU. Address modify. Permits addresses to be computed in ALU and then inserted into instructions stored in 20 memory.

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Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

A Brief History of Computers


First Commercial computers In 1950, UNIVAC I (Universal Automatic Computer) which was commissioned by Bureau of Census for 1950 calculations. In the late 1950s, UNIVAC II was delivered. o Had greater memory capacity and higher performance. o Had same basic architecture as UNIVAC I. o Was first example of upward compatibility. Series of IBM 700/7000 computers: o In 1953, IBM 701 was designed for scientific calculations. o In 1955, IBM 702 was designed for business applications.

IAS Instruction Set

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Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

A Brief History of Computers: UNIVAC I

A Brief History of Computers: UNIVAC II

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A Brief History of Computers: IBM 701

A Brief History of Computers: IBM 702

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Second Generation: Transistors

Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

A Brief History of Computers

A Brief History of Computers Second Generation: Transistors In 1947, Transistors were developed at Bell Labs. Introduction of more complex ALU and control units. Use of high-level programming languages. Provision of system software with computers. Use of data channel which has an independent I/O module with its own processor and instruction set. Use of multiplexor which is central termination point for data channels, CPU, and memory. 28 Pioneer to idea of data bus.

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Third Generation: Integrated Circuits

Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

A Brief History of Computers

A Brief History of Computers Third Generation: Integrated Circuits Throughout 1950s and early 1960, electronic equipment was composed largely of discrete components - transistors, resistors, capacitors and so on. on In 1958 came the achievement that revolutionized electronics and started the age of microelectronics: the invention of integrated circuits. It is the integrated circuit that defines third generation of computers.

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Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

Microelectronics

Microelectronics A gate is a device that implements a simple Boolean or logical function, such as IF A AND B ARE TRUE THEN C IS TRUE (AND gate). A gate controls data flow.

Microelectronics means literally small electronics. The basic elements of a digital computer must p perform storage, movement, processing and control g , ,p g functions. Only two fundamental types of components are required: Gates Memory cells
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Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

Microelectronics The memory cell is a device that can store one bit of data; that is, the device can be in one of two stables states at any time.

Microelectronics By interconnecting large numbers of these fundamental devices, we can construct a computer. We can relate this to our four basic functions as follows: Data storage. Provided by memory cells. Data processing. Provided by gates Data movement. Paths between components are used to move data from memory to memory and from memory through gates to memory. Control. Paths between components can carry control signals.
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Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

Microelectronics

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Microelectronics A thin wafer of silicon is divided into a matrix of small areas. The identical circuit pattern is fabricated in each area and wafer is broken up into chips. Each chip consists of many gates and/or memory cell plus a number of inputs and output attachment points. This chip is packaged in housing that protects it and provides pins for attachment to devices beyond chip.
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Thus a computer consists of gates, memory cells and interconnections among these elements. The integrated circuit exploits the fact that such components as transistors, resistors and conductors can be fabricated from a semiconductor such as silicon. Many transistors can be produced at the same time on a single wafer of silicon.
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Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

Microelectronics

Moores Law
Gordon Moore, cofounder of Intel, propounded Moores law in 1965. According to Moores law number of transistors on a chip will double every year. Since 1970 s development has slowed a little. Number of 1970s transistors doubles every 18 months. The consequences of Moore law are philosophical: Cost of a chip has remained almost unchanged. Higher packing density means shorter electrical paths, giving higher performance. Smaller size gives increased flexibility. Reduction in power and cooling requirements. Fewer interconnections increases reliability.

Initially, only a few gates or memory cells could be reliably manufactured and packaged together. These early i Th l integrated circuits are referred to as d i i f d small-scale integration (SSI). As time went on, it became possible to pack more and more components on the same chip.

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Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

Growth in CPU Transistor Count

IBM System/360 In 1964, IBM replaced 7000 series with the System/360 family. 360 product line was incompatible with older IBM machines. System/360 was the industrys first planned family of computers. The models were compatible in the sense that a program written for one model should be capable of being executed by another model in the series.
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The characteristics of a family are as follows: Similar or identical instruction sets. A program that executes on one machine will also execute on any other. Similar or identical operating system. Increasing speed. Increasing number of I/O ports. (i.e. more terminals). Increased memory size. Increased cost.
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IBM System/360

IBM 360 Family

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Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

DEC PDP-8

DEC PDP-8 PDP-8 bus is called Omnibus consists of 96 separate signal paths, used to carry control address data signals
Console Controller CPU Main Memory I/O Module I/O Module

In 1964, Digital Equipment Corporation (DEC) produced PDP-8. PDP-8 was the first minicomputer. was small enough to sit on a lab bench. did not need air conditioned room. used bus structure that is now virtually universal for minicomputers and microcomputers.

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OMNIBUS
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Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

DEC PDP-8

Generations of Computer
Generation 1: Vacuum tube - 1946-1957 Generation 2: Transistor - 1958-1964 Generation 3: Small scale integration - 1965 on Up to 100 devices on a chip Generation 3: Medium scale integration - to 1971 100-3,000 devices on a chip Generation 4: Large scale integration - 1972-1977 3,000 - 100,000 devices on a chip Generation 5: Very large scale integration - 1978 to date 100,000 - 100,000,000 devices on a chip Generation 5: Ultra large scale integration Over 100,000,000 devices on a chip
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Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

Generations of Computer

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Semiconductor Memory
Integrated circuit technology was also used to construct memories. Initially, magnetic-core memory was used as computer memory. Magnetic-core memory was fast expensive bulky used destructive readout (act of reading a core erase data stored). In 1970, Fairchild produced semiconductor memory. This chip was about the size of a single core could hold 256 bits of memory was nondestructive much faster than core

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In 1971, Intel developed its 4004 which was the first chip to contain all of the components of a CPU on a single chip: microprocessor. 4004 can add two 4-bit numbers.

Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

Microprocessors: 4004

Microprocessors: 8008
In 1972, Intel developed 8008 which was the first 8-bit microprocessor.

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4004 and 8008 had been designed for specific applications. In 1974, Intel developed 8080 which was the first generalpurpose microprocessor. 8080 was an 8-bit microprocessor.

Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

Microprocessors: 8080

Microprocessors: 8086
At the end of 1970s, general-purpose 16-bit microprocessors appeared. One of these was 8086.

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In 1981, Bell Labs and Hewlett-Packard developed 32-bit single-chip microprocessors. single chip microprocessors In 1985, Intel introduced its own 32-bit microprocessor, 80386.

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Microprocessors

Evolution of Intel Microprocessors

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Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

Evolution of Intel Microprocessors

Microprocessor Speed In microprocessors, the addition of new circuits and the speed boost that comes from reducing the distance between them has improved performance four- or fivefold every three years or so since Intel launched it x86 family in 1978. l h d its 86 f il i 1978 But the raw speed of microprocessor will not achieve its potential unless it is fed a constant stream of work to do in the form of computer instructions.
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Some techniques to have more elaborate ways of feeding instructions quickly enough are as follows: Branch prediction. Branch prediction increases the amount of work available for the processor to execute. Data flow analysis. This prevents unnecessary delay. Speculative execution. This enables the processor to keep its execution engines as busy as possible by executing instructions that are likely to be needed.
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Microprocessor Speed

Performance Mismatch

While processor power has raced ahead at breakneck speed, other critical components of computer have not kept up. Processor speed and memory capacity (density) have grown rapidly. The speed with which data can be transferred between main memory and processor has lagged badly.
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Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

Performance Mismatch

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Solutions There are a number of ways that a system architect can attack this problem. Examples include: Increase number of bits retrieved at one time by making DRAM wider by using wide bus data paths. Change DRAM interface to make it more efficient by including a cache. Reduce frequency of memory access by using more complex cache and cache on chip. Increase interconnection bandwidth between processors and memory by using higher speed buses and hierarchy of buses to buffer and structure data flow. 60

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I/O devices also become increasingly demanding. These devices create great data throughput demands. While processors can handle data pumped out by these devices, devices there remains the problem of getting that data moved between processor and peripheral. Some solutions: Caching and buffering schemes. Use of higher-speed interconnection buses and more elaborate structuring of buses. Use of multiple-processor configurations.
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Design for performance

Design for performance

Key is balance. Because of constant and unequal changes in: processor components main memory I/O devices interconnection structures designers must constantly attempt to balance their throughput and processing demands.

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In terms of market share, Intel has ranked as the number one maker of microprocessors for decades. The evolution of its flagship microprocessor product serves as a good indicator of the evolution of computer technology in general. g It is worthwhile to list some of the evolution of the Intel product line: 8080 First general purpose microprocessor. An 8-bit machine with an 8-bit data path to memory. Used in the first personal computer Altair.
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Pentium Evolution

Pentium Evolution
8086 Much more powerful. 16-bit machine. Instruction cache, prefetch few instructions before they are executed. A variant of this processor, 8088 (8 bit external bus) used in the first IBM PC. 80286 16 MByte memory addressable instead of 1MByte. 80386 Intels first 32-bit machine. Support for multitasking, meaning it could run multiple programs at the same time.
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80486 Sophisticated powerful cache and instruction pipelining (a processor organization in which processor consists of a number of stages, allowing multiple instructions to be executed concurrently). Offers a built in maths co processor offloading co-processor, complex math operations from main CPU. Pentium Introduce the use of superscalar techniques which allows multiple instructions executed in parallel. Pentium Pro Increased superscalar organization. Aggressive register renaming, branch prediction, data flow analysis and speculative execution.

Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

Pentium Evolution

Pentium Evolution
Pentium II Incorporated MMX technology which is designed specifically to process graphics, video & audio processing. Pentium III Incorporates additional fl ti point instructions I t dditi l floating i t i t ti for 3D graphics. Pentium 4 Includes further floating point and multimedia enhancements. Itanium Makes use of 64-bit organization.
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Intel 80286

Intel 80386

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Intel 80486

More Pentium

Pro III

IV

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Itanium

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IBM produced the PowerPC architecture. The following are the principal members of the PowerPC family: 601 Purpose is to bring PowerPC architecture to market as quickly as possible possible. A 32-bit machine. 603 A 32-bit machine. Comparable in performance with 601 but with lower cost and a more efficient implementation. 604 A 32-bit machine. Uses much more advanced superscalar design techniques to achieve greater performance.

Computer Architecture by Asst. Prof. Dr. Burin ZMEN b

PowerPC

PowerPC

620 Intended for high-end servers. Implemented with a full 64-bit architecture, including 64-bit registers and data paths. 740/750 Known as G3 processor. Integrates two levels of cache in main processor chip, providing significant performance. G4 Increases parallelism and internal speed of the processor chip.

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PowerPC

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