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Switch Construction

Fall 2007

CS 6030

Workstation-Based
Aggregate bandwidth
1/2 of the I/O bus bandwidth capacity shared among all hosts connected to switch example: 1Gbps bus can support 5 x 100Mbps ports (in theory)

Packets-per-second
must be able to switch small packets 300,000 packets-persecond is achievable
CPU

I/O bus

Interface 1

Interface 2

Interface 3 Main memory

Fall 2007

CS 6030

Switching Hardware
Design Goals
Throughput (depends on traffic model) Scalability (a function of n)
Input Port Input Port Input Port

Control processor
Output Port

Output Port

Input Port

Switch Fabric

Output Port

Output Port

Input Port

Output Port

Ports

Input Port

Output Port

Circuit management (e.g., map VCIs, switch datagrams) buffering (input and/or output)

Fabric
As simple as possible Sometimes do buffering (internal)
Fall 2007 CS 6030 3

Buffering
Wherever contention is possible
Input port (contend for fabric) Internal (contend for output port) Output port (contend for link)

Head-of-Line Blocking
Input buffering
1 2 2 Switch
Fall 2007 CS 6030 4

Port 1 Port 2

Switch Design
Crossbar switches Banyan Networks Batcher Networks Sunshine Switch

Fall 2007

CS 6030

Crossbar Switch
Every input port is connected to every output port
NxN

Output ports
Complexity scales as O(N2)

Fall 2007

CS 6030

Crossbar Switch

Output Port Output Port Output Port Output Port

Fall 2007

CS 6030

Knockout Switch
Assumption:
It is unlikely that N inputs will have packets destined for the same output port

Pick L from N packets at a port


Output port maintains L cyclic buffers Shifter places up to L packets in one cycle Each buffer gets only one packet Output port uses round-robin between buffers Arrival order is maintained

Problem
Hot spots

Output ports scale as O(N)


Fall 2007 CS 6030 8

Knockout Switch
Output port design
Packet filters
Recognize packets destined for a specific port

Concentrator
Selects up to L packets from those destined for this port Discards excess packets

Queue
Length L

Fall 2007

CS 6030

Knockout Switch
1 2 3 4 Choose L of N R 1 R 4 D 4 Choice 1 4 R 3 R 2 1 R 1 Choice 2 3 Discard D Delay unit Ex: 2 of 4 2 R 2x2 random selector

What happens if more than L arrive? 3 Discard

Fall 2007

CS 6030

10

Self-Routing Fabrics
Idea
Use source routing on network in switch Input port attaches output port number as header Fabric routes packet based on output port

Types
Banyan Network Batcher-Banyan Network Sunshine Switch

Fall 2007

CS 6030

11

Banyan Network
A network of 2x2 switches
Each element routes to output 0 or 1 based on packet header A switch at stage i looks at bit i in the header

00100

0 1

Fall 2007

CS 6030

12

Banyan Network
001 011 110 011 111 011 011 011 001 001 001 001

110

110 110 111

111

111

110 111
13

Fall 2007

CS 6030

Banyan Network
Perfect Shuffle
N inputs requires log2N stages of N/2 switching elements Complexity on order of N log2N

Collisions
If two packets arrive at the same switch destined for the same output port, a collision will occur If all packets are sorted in ascending order upon arrival to a banyan network, no collisions will occur!

Fall 2007

CS 6030

14

Batcher Network
Performs merge sort A network of 2x2 switches
Each element routes to output 0 or 1 based on packet header A switch at stage i looks at the whole header Two types of switches
Up switch
Sends higher number to top output (0)

Down switch
Sends higher number to bottom output (1)
Fall 2007 CS 6030 15

Batcher Network

7 D 3 6 U 1 Sort

3 7 6 1

3 D 6 7 D

3 6 1

3 D 1 6 D

1 3 6

7 1 Merge

7 7 Merge

Fall 2007

CS 6030

16

Batcher Network
D D D D D D

Fall 2007

CS 6030

17

Batcher Network
How it really works
Merger is presented with a pair of sorted lists, one in ascending order, one in descending order First stage of merger sends packets to the correct half of the network Second stage sends them to the correct quarter

Size
N/2 switches per stage log2N x (1 + log2N)/2 stages Complexity = N log22N
Fall 2007 CS 6030 18

Batcher-Banyan Network
Idea
Attach a batcher network back-to-back with a banyan network Arbitrary unique permutations can be routed without contention Two packets destined for same output port still collide!

Fall 2007

CS 6030

19

Batcher-Banyan Switch Architecture


3 6 0 5 3 6 4 3 0 3 3 3 4 5 6 6 0 3 00 13 0 3 4 5 6 3 4 5 6 0

Sort

Filter

4 5 6

Add

24 35 46

Conc.

Route

Simple components with no buffering.


filter eliminates duplicates by comparing consecutive addresses and returns ack to inputs adder computes and inserts rank of cells concentrator uses rank as output address routing network delivers to output

Adder, concentrator and routing network all have log2n stages (conc. is reverse banyan, routing net. is banyan)
Fall 2007 CS 6030 20

Sunshine Switch
Sunshine Switch
Like a knockout switch
Can handle up to L packets per output port

Recirculates overflow packets


If more than L packets arrive for any output port in one cycle

Elements
Multiple Banyan networks
Enables multiple packets per output port

Delay Box
Excess (K) packets are recirculated and resubmitted to the switch

Batcher network
N new packets K delayed packets

Trap
Identifies packets destined for banyan Identifies excess packets

Selector
Routes multiple packets for same output on separate banyans

Fall 2007

CS 6030

21

Sunshine Switch

Delay

Inputs n Batcher n+k Trap n+k Selector

n n n

n n L Banyans n

Fall 2007

CS 6030

22

References
Robin Kravets, Switching Hardware, UIUC, CS/ECE438.

Fall 2007

CS 6030

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