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International Journal of Electronics

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A new full-wave rectifier circuit employing single dual-X current conveyor


Shahram Minaeia; Erkan Yuceb a Department of Electronics and Communications Engineering, Dogus University, Istanbul, Turkey b Electrical and Electronics Engineering Department, Pamukkale University, Kinikli-Denizli, Turkey Online publication date: 17 August 2010

To cite this Article Minaei, Shahram and Yuce, Erkan(2008) 'A new full-wave rectifier circuit employing single dual-X

current conveyor', International Journal of Electronics, 95: 8, 777 784 To link to this Article: DOI: 10.1080/00207210802141826 URL: http://dx.doi.org/10.1080/00207210802141826

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International Journal of Electronics Vol. 95, No. 8, August 2008, 777784

A new full-wave rectifier circuit employing single dual-X current conveyor


Shahram Minaeia* and Erkan Yuceb
a

Department of Electronics and Communications Engineering, Dogus University, Istanbul, Turkey; bElectrical and Electronics Engineering Department, Pamukkale University, Kinikli-Denizli, Turkey (Received 8 March 2007; final version received 15 March 2008) In this study, a novel voltage-mode full-wave rectifier with high-input impedance using a dual-X second-generation current conveyor and three enhancement-type n-channel metal-oxide semiconductor field-effect transistors (MOSFETs) is introduced. The proposed circuit does not employ any passive elements, and is simulated using SPICE program with level 49, 0.25 mm TSMC CMOS technology parameters to confirm the theory and exhibit the performance of the circuit. Keywords: full-wave rectifier; DXCCII; MOSFET

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1. Introduction Literature survey shows that the dual-X second-generation current conveyor (DXCCII) (Zeki and Toker 2002, 2005) being a new current-mode active device and combining the main advantages of the second-generation current conveyor (CCII) (Sedra and Smith 1970) and inverting second-generation current conveyor (ICCII) (Awad and Soliman 1999) is widely used in the realisation of many circuits. Similar to other current-mode active devices, the DXCCII has some superiorities such as higher usable gain, more reduced voltage excursion at its sensitive nodes, greater linearity, less power dissipation, wider bandwidth, better accuracy and larger dynamic range over its voltage-mode counterpart (Toumazou, Lidgey and Haigh 1990; Wilson 1990; Ferri and Guerrini 2003). On the other hand, full-wave rectifiers are widely used in many areas such as signal processing, conditioning and instrumentation of low-level signal and DC converters (Toumazou, Lidgey and Chattong 1994; Khan, El-Ela and Al-Turaigi 1995; Stiurca 1995; Surakampontorn, Anuntahirunrat and Riewruja 1998; Monpapassorn, Dejhan and Cheevasuvit 2001; Anuntahirunrat, Tangsrirat, Riewruja and Surakampontorn 2004; Kumngern and Dejhan 2006; Yuce, Minaei and Cicekoglu 2006). The full-wave rectifiers based on operational amplifiers (OAs) and diodes while generally faster than other rectifier circuits suffer from a major disadvantage. The finite small-signal dV/dt of the OAs results in important distortion of the rectified signal during the zero crossing of the input signal in which the non-conduction/conduction transition of the diodes occurs (Monpapassorn et al. 2001). Nonetheless, the use of the high slew-rate OAs does not solve this drawback because of its small-signal transient problem (Monpapassorn et al. 2001).
*Corresponding author. Email: sminaei@dogus.edu.tr
ISSN 00207217 print/ISSN 13623060 online 2008 Taylor & Francis DOI: 10.1080/00207210802141826 http://www.informaworld.com

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The circuits of Toumazou et al. (1994), Khan et al. (1995) and Stiurca (1995) employ diodes and resistors in addition to OAs or CCIIs. The circuits proposed in Monpapassorn et al. (2001) and Surakampontorn et al. (1998) use bipolar current mirrors, one CCII and resistors. The proposed circuits in Anuntahirunrat et al. (2004) use three to four current controlled conveyors (CCCIIs) in addition to five resistors. Also, using an operational transconductance amplifier (OTA) and four diodes, a full-wave rectifier has been developed (Kumngern and Dejhan 2006). Although the diodes in the circuit reported in Kumngern and Dejhan (2006) are realised using MOS transistors, an extra MOS fabrication process is required. Fortunately, MOS transistors in smaller size providing high performance for both digital and analogue circuits are available, thus a full-wave rectifier using two plus-type CCIIs and three MOS transistors has been proposed by authors Yuce et al. (2006). In this article, a new circuit for realising a voltage-mode full-wave rectifier employing only a DXCCII and three n-channel MOS transistors is proposed. The presented circuit does not require passive elements. The simulation results are also given to demonstrate the performance of the presented circuit.

2. Proposed rectifier circuits Using standard notation, DXCCII as a versatile active device can be characterised in the following matrix form: 3 2 0 IY 6 I 7 6 6 Zp 7 6 1 6 7 6 6 IZn 7 6 0 6 7 6 6 7 6 4 VXp 5 4 0 0 VXn 2 0 0 2 0 0 0 0 0 1 2 0 0 0 0 0 32 3 IXp 0 0 76 IXn 7 76 7 76 7 76 VY 7 0 76 7 76 7 0 54 VZp 5 0 VZn

Here, i and i (i 1, 2) are the frequency-dependent nonideal current gain and voltage gain of the DXCCII, respectively. The parameters i and i are ideally equal to unity. The current convention is such that all the currents flow into the DXCCII. The proposed full-wave rectifier circuit using only one DXCCII and three NMOS transistors is shown in Figure 1. All of the NMOS transistors in the proposed are diodeconnected such that if the input signal is in positive cycle, NMOS transistors MA and MC conduct; thus the circuit allows the positive cycle signals to be passed in the same magnitude. If the input is in negative cycle, NMOS transistors MB and MC conduct and the circuit converts the negative cycle signals into positive cycle signals in the same magnitude at its output. It is assumed that all the NMOS transistors in Figure 1 have the same threshold voltage Vtn, and their transconductance parameters knA knB knC kn are given as:   W 2 kn n Cox L

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Figure 1. The proposed full-wave rectifier circuit.

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The parameters n and Cox in (2) are respectively called the surface mobility and the gate capacitance per unit area of the NMOS transistors. Assuming ideal DXCCII, straightforward analysis of the circuit in Figure 1 gives   Vout t Vin t Vin t Vin t 3

where Vin(t) and Vin(t) are respectively the positive and negative cycle of the input signal, expressed by Vin t Vin t uVin t and Vin t Vin t uVin t 5 4

Here, u(t) is the unit step function. It is observed from (3) that the developed circuit in Figure 1 performs the full-wave rectification of an analogue signal. If knA knB kn and knC kn/r2 are chosen, the full-wave rectifier output in (3) converts   Vout t rVin t 6

where r is a positive real number. Similarly, if knA kn/m2, knB kn/p2 and knC kn/r2 are chosen (m, p and r are arbitrary positive real numbers), the full-wave rectifier output in (3) turns to Vout t r r Vin t Vin t m p 7

Note that, using the definitions given in (4) and (5), the output voltage in (3) can be rewritten as 8 Vout t Vin t uVin t uVin t

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Taking nonideal gain effects of the DXCCII into account, the output signal becomes Vout t Vin t 1 1 uVin t 2 2 uVin t 9 It is observed from (9) that nonideal current and voltage gains of the DXCCII appear in the form of multipliers in each term. Some of the main advantages of the developed circuit in Figure 1 are as follows: (i) no requirement to use passive components, (ii) high-input impedance which enables easy cascading, (iii) no extra voltage at its output even if its nonideal current and voltage gain effects are considered, (iv) it is possible to change the amplitude of the output signal by adjusting a positive real constant. Nevertheless, the proposed circuit requires one bias voltage which should be equal to the minus of the threshold voltage of the NMOS transistors (Vtn). Note that the proposed rectifier circuit is suitable for driving highimpedance loads. Therefore, the output of the proposed rectifier must be buffered before connecting to low-impedance loads.
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3. Simulation results The DXCCII is simulated using the schematic implementation shown in Figure 2 with DC power supply voltages 1.25 V and bias voltage VB 0.3 V. The compensation capacitors are selected as Cc 0.06 pF. The simulations are based on level 49, 0.25 mm TSMC CMOS technology parameters (Yuce et al. 2006). The dimensions of the MOS transistors used in the DXCCII

Figure 2. Internal structure of the DXCCII.

Table 1. Dimensions of the MOS transistors used in the DXCCII of Figure 2. MOS transistors M1, M2, M4, M5, M15, M16, M17, M18, M19, M20 M3, M6, M7, M8, M9, M10 M11, M12, M13, M14 W (mm)/L (mm) 2/0.25 4/0.25 16/0.25

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implementation are given in Table 1. The frequency response of the nonideal current gain and voltage gain of the DXCCII are depicted in Figures 3 and 4, respectively. From Figures 3 and 4 it can be seen that the DXCCII operates well up to a few hundred megahertz. The main parameters of the DXCCII in Figure 2 are given in Table 2. The proposed rectifier circuit in Figure 1 is simulated using the DXCCII in Figure 2 and NMOS transistors MA, MB and MC with dimensions equal to W/L 30 mm/0.25 mm. To provide a voltage of Vtn for the proposed rectifier, the reference voltage circuit of Figure 5 with DC power supply voltages VDD VSS 1.25 V and DC bias current IA 0.5 mA is used. The dimensions of the transistors whose bulks are connected

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Figure 3. Current gain variations of the DXCCII with respect to frequency.

Figure 4. Voltage gain variations of the DXCCII with respect to frequency.

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Table 2. Some parameters of the DXCCII of Figure 2. Parameter Parasitic elements at Xp terminal, Rxp, Lxp Parasitic elements at Xp terminal, Rxn, Lxn Parasitic elements at Y terminal, Ry, Cy Parasitic elements at Zp terminal, Rzp, Czp Parasitic elements at Zn terminal, Rzn, Czn Bandwidth (Current follower) Bandwidth (Voltage follower) Power supply voltages Current gain Voltage gain Value 32.8 V, 0.87 mH 37.3 V, 0.18 mH 1, 3.22 fF 13.48 kV, 16 fF 13.46 kV, 14 fF ! 1 4.2 GHz ! 2 3.52 GHz ! 1 372 MHz ! 2 346 MHz 1.25 V 1 0.996 2 0.994 1 1.026 2 0.997

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Figure 5. Reference voltage circuit for providing Vtn voltage.

to VDD in the reference voltage circuit of Figure 5 are selected as (W/L)Mr1 (W/L)Mr2 57 mm/0.25 mm. The time-domain performance of the proposed rectifier is tested by applying 150 mV peak sinusoidal input voltage at 1 MHz. Therefore, the input signal is rectified to obtain the output voltage Vout(t) as depicted in Figure 6. It is observed from Figure 6 that the output waveform magnitude is a bit smaller than the input one, mainly due to the X terminal parasitic resistances RX of the DXCCII. Fortunately, X terminal parasitic resistances can be reduced using some techniques reported previously in Fabre and Barthelemy (1994) and Seguin and Fabre (2001). Also, selecting larger channel width for the transistor M11, M12 will increase the amount of the negative feedback which in turn reduces the value of RX. The total power dissipation of the proposed rectifier circuit in Figure 1 is found to be 3.33 mW.

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Figure 6. Time domain response of the full-wave rectifier network for sinusoidal input Vin(t) with 150 mV peak at 1 MHz.

It should be mentioned that the proposed circuit does not operate well for input signals with amplitude less than 20 mV due to the Z terminal parasitic capacitance and resistance (in parallel) of the DXCCII. However, cascading techniques can be used to improve the Z terminal characteristic of the DXCCII (Minaei 2003). The simulation results confirm the theoretical analysis as expected. The discrepancy between ideal and simulated responses mainly stems from the nonideal gain and parasitic impedance effects of the DXCCII.

4. Conclusion The proposed active only rectifier circuit in this article uses only a DXCCII and three NMOS transistors, and possesses high-input impedances, so it can be easily cascaded. The configuration of the proposed circuit is very simple, thus it can be easily realised in IC process. It is expected that the developed novel full-wave rectifier can be useful in many areas such as signal processing, conditioning and instrumentation of low-level signal and DC converters.

References
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