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School of Engineering

Laboratory Manual

DIGITAL COMMUNICATION Lab EC-303

DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING

DIGITAL COMMUNICATION LAB


This laboratory will commence with Orientations to familiarize students with surroundings or circumstances includes following:
A. Familiarization with digital modulation and demodulation techniques B. Familiarization with sampling theorem & line coding used in digital communication system

S. N. 1 2 3 4 5 6 7 8 9 10

Title of the Experiment


Sampling and reconstruction of an analog signal. To generate a PAM, PWM and PPM signal and demodulate them. To generate TDM-PAM signal and demodulate it. To generate PCM signal and demodulate it. Delta modulation & demodulation. To study different types of digital data formats (RZ, NRZ and Manchester) ASK modulation and demodulation. FSK modulation and demodulation. BPSK modulation and demodulation. To study quadrature amplitude modulation & demodulation.

LIST OF EXPERIMENTS
NAME OF THE STUDENT. ENROLL. NO

INDEX S. N. Name of the experiment Sampling and reconstruction of an analog signal. To generate a PAM, PWM and PPM signal and demodulate them. To generate demodulate it. TDM-PAM signal and Page no. Date of allotment Date of conduction Sign /grade

1 2 3 4 5 6 7 8 9 10

To generate PCM signal and demodulate it. Delta modulation & demodulation. To study different types of digital data formats (RZ, NRZ and Manchester) ASK modulation and demodulation. FSK modulation and demodulation.

BPSK modulation and demodulation.

To study quadrature amplitude modulation & demodulation.

Experiment No. 1 AIM: Sampling and reconstruction of an analog signal.

APPARATUS/COMPONENTS REQUIRED: Signal Sampling and Reconstruction Trainer kit (ME 776), CRO and patch cords Theory: In analog communication systems like AM, FM the instantaneous value of the information signal is used to change certain parameter of the carrier signal. Pulse modulation systems differ from these systems in a way that they transmit a limited no. of discrete states of a signal at a predetermined time; sampling can be defined as measuring the value of an information signal at predetermined time intervals. The rate of which the signal is sampled is known as the sampling rate or sampling frequency. It is the major parameter, which decides the quality of the reproduced signal. If the signal is sampled quite frequently (whose limit is specified by Nyquist Criterion) then it can be reproduced exactly at the receiver with no distortion. Nyquist Criterion : The lowest sampling frequency that can be used without the side bands overlapping is twice the highest frequency component present in the information signal. If we reduce this sampling frequency even further, the side bands and the information signal will overlap and we cannot recover the information signal simply by low pass filtering. This phenomenon is known as fold-over distortion or aliasing.

Nyquist Criterion (Sampling Theorem): The Nyquist Criterion states that a continuous signal band limited to fm Hz can be completely represented by and reconstructed from the samples taken at a rate greater than or equal to 2fm samples/second. This minimum sampling frequency is known as NYQUIST RATE i.e. for faithful reproduction of information signal fs > 2fm. 4

EFFECT OF SAMPLE AND SAMPLE /HOLD OUTPUT: If the pulse width of the carrier pulse train used in natural sampling is made very short compared to the pulse period, the natural PAM is referred to as instantaneous PAM. As it has been discussed, shorter pulse is desirous for allowing many signals to be included in TDM format but the pulse can be highly corrupted by noise due to lesser signal power. One way to maintain reasonable pulse energy is to hold the sample value until the next sample is taken. This technique is formed as sample value until the next sample-and-hold techniques. Now, the area under the curve (which is equivalent to the signal power) is greater and so the filter output amplitude and quality of reproduced signal is improved. The hold facility can be provided by a capacitor when the switch connects the capacitor to PAM output it charges to the instantaneous value. ALIASING: If the signal is sampled at a rate lower than stated by Nyquist criterion, then there is an overlap between the information signal and the sidebands of the harmonics. Thus the higher and the lower frequency components get mixed and cause unwanted signals to appear at the demodulator output. This phenomenon is turned as aliasing or fold over distortion. The various reasons for aliasing and its prevention are as described. A) Aliasing due to Under-Sampling If the signal is sampled at rate lower than 2fm then it causes aliasing. Let us assume a sinusoidal waveform of frequency fin which is being sampled at rate fs<2fm. In the figure 9 dots represents the sample points. The low-pass filter at demodulator effectively joins the sample causing an unwanted frequency component to appear at the output. This unwanted component has frequency equal to (fs-fm). B) Aliasing due to wide Band Signal The system is designed to take samples at frequency slightly greater than that stated by Nyquist rate. If higher frequencies are ever present in the information signal or it is affected by high frequency noise then the aliasing will occur. This does not generally happen in properly designed telephone network where speech channels are band-limited by filters before sampling. In control engineering and telemetry, however, out of band high frequencies either from source or due to noise pick-up can be present. In this case band-limiting filters, generally known as anti-aliasing filters are usually installed prior to sampling to prevent aliasing. As a principle, the system is designed to sample at rate higher than the rate to take into account the equipment tolerances, ageing and filter response. C) Aliasing due to Filter Roll-off Roll-off is a term applied to the cut-off gradient of a filter. No filter is ideal and therefore frequencies above the nominal cut-off frequency may still have significant amplitudes at a filters o/p. If proper sampling rate and appropriate filter response is not chosen, aliasing will occur. D) Aliasing due to Noise If very small duty cycle is used in sample-and-hold circuit aliasing may occur if the signal has been affected by noise. High frequency noises generally mix with the high frequency component of the signal and hence causes undesirable frequency components to be present at the o/p.

LOW PASS FILTERS The PAM system the message is recovered by a low pass filter. The type of filter used is very important, as the signal above the cut-off frequency would affect the recovered signal if they are not attenuated sufficiently. 5

Block Diagram:

Sampling frequency & selector circuit Sampling cicuit Sample o/p

Sample & hold o/p Message signal 1 KHz

Analog Sampling

2nd/4th order low pass filter Sample output Reconstructed o/p

Reconstruction
Procedure:1. Assemble all the required components to perform practical. 2. Connect a BNC to crocodile cable to CRO & m (t) (with in kit) to observe m (t). Note down amplitude & its frequency. 3. Now select a sampling frequency from sampling freq. selection circuit & observe it on CRO for amplitude. 4. Give both sampling clock & message signal as input to sampled output circuit, while keeping trigger at internal position switch. 5. Observe sampled o/p on CRO for amplitude & freq. 6. Connect a cable between sampled outputs to 4th filters input (LPF) for reconstructing signal. 7. Observe reconstructed signal output. 8. Repeat above procedure for further sampling ferq. 6

Observation Table Entity M(t) clk Sample o/p M(t) Entity M(t) clk Sample o/p M(t) Amplitude Frequency 320khz

Amplitude

Frequency 80khz

Entity M(t) clk Sample o/p M(t)

Amplitude

Frequency 20khz

CONCLUSION:-

Questions: 1. What is the use of sampling theorem?

2. What is the world wide standard sampling rate for speech signal?

3. What do you mean by over sampling?

4. What is aliasing effect in sampled signal?

5. What do you mean by natural sampling?

Experiment No. 2 Aim: To generate a PAM, PWM and PPM signal and demodulate them.

APPARATUS/COMPONENTS REQUIRED: PAM, PPM, PWM Modulation & Demodulation Trainer (ST2110), Patch cords, CRO etc. Theory: PAM: Pulse amplitude modulation, the simplest form of pulse modulation, is illustrated in Figure. It forms an excellent introduction to pulse modulation in general. Pulse amplitude modulation is a pulse modulation system in which the signal is sampled at regular intervals, and each sample is made proportional to the amplitude of the signal at the instant of sampling. As shown in Figure. The two types are double polarity pulse amplitude modulation, which is self-explanatory and single polarity pulse amplitude modulation, in which a fixed DC level is added to the signal, to ensure that the pulses are always positive. As will be seen shortly, the ability to use constant amplitude pulses is a major advantage of pulse modulation, and since Pulse Amplitude Modulation does not utilize constant amplitude pulses, it is infrequently used. When it is used, the pulses frequency modulates the carrier. It is very easy to generate and demodulate pulse amplitude modulation. In a generator, the signal to be converted to Pulse Amplitude Modulation is fed to one input of an AND gate. Pulses at the sampling frequency are applied to the other input of the AND gate to open it during the wanted time intervals. The output of the gate then consists of pulses at the sampling rate, equal in amplitude to the signal voltage at each instant. The pulses are then passed through a pulse shaping network, which gives them flat tops.

PROCEDURE:1. Make the connection according to the block diagram. 2. Connect pulse generator clock to the PAM modulator. 3. Connect the audio frequency of 2 KHz, 2V to modulator. 4. Connect the modulator output to CRO. 5. Observe output on CRO. 6. Now connect modulator output to low pass filter for demodulation. 7. Observe output on CRO.

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Block Diagram

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PWM: In pulse width modulation of pulse amplitude modulation is also often called PDM (pulse duration modulation) and less often, PLM (pulse length modulation). In this system, as shown in Figure, we have fixed amplitude and starting time of each pulse, but the width of each pulse is made proportional to the amplitude of the signal at that instant.

Pulse width modulation. (a) Signal (b) PWM (width variations exaggerated)

PROCEDURE:1. Make the connection according to the circuit diagram. 2. Connect the audio frequency of 2 KHz, 2V to modulator. 3. Connect the modulator output to CRO. 4. Switch ON the power supply. 5. Observe output on CRO. 6. Now connect modulator output to low pass filter for demodulation. 7. Observe output on CRO.

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Block Diagram.

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PPM:-The Amplitude and width of the pulses is kept constant in this system, while the position of each pulse, in relation to the position of a recurrent reference Pulse is varied by each instantaneous sampled value of the modulating wave. As Mentioned in connection with pulse width modulation, pulse-position modulations has The advantage of requiring constant transmitter power output, but the disadvantages of Depending on transmitter receiver is synchronization.

PROCEDURE:1. Make the connection according to the circuit diagram. 2. Connect the audio frequency of 2 KHz, 2V to modulator. 3. Connect the PPM modulator output to CRO. 4. Observe output on CRO. 5. Now connect modulator output to low pass filter for demodulation. 6. Observe output on CRO.

CONCLUSION:-

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Block Diagram

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Observation Table A) PAM Entity M(t) clk Sample o/p Sample & hold Flat top M(t) Amplitude Frequency

B) PWM Entity M(t) pulse PWM M(t) Amplitude Frequency

C) PPM

Entity M(t) pulse PPM M(t)

Amplitude

Frequency

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Questions 1. How many types of pulse time modulation?

2. How many types of pulse amplitude modulation?

3. What is the merit of flat top sampling?

4. What is the disadvantage of PWM?

5. Which multivibrator is used for PWM?

6. What is advantage of PPM?

7. Which Multivibrator is used for PPM De-modulator?

8. At which factor the band-width of PPM depends?

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Experiment No. 3 Aim: To generate a TDM-PAM signal and demodulate it.

APPARATUS/COMPONENTS REQUIRED: TDM Pulse Amplitude Modulation-Demodulation Trainer (ST2102), Patch cords, CRO etc. Theory: Multiplexing: Multiplexing is the process of combining signals from different information sources so that they can be transmitted over a common channel. Multiplexing is advantageous in cases where it is impracticable and uneconomical to provide separate links for the different information sources. The price that has to be paid to acquire this advantage is in the form of increased system complexity and bandwidth. The two most commonly used methods of multiplexing are 1. Frequency division multiplexing (FDM) 2. Time division multiplexing (TDM) Frequency Division Multiplexing: Frequency division multiplexing is the process of combining several information channels by shifting their signals to different frequency groups within the frequency spectrum so that they can all be transmitted over a common transmission channel. The information signals are shifted in different frequency groups by making them modulate carrier signals at different frequencies e.g. Let us suppose two information signals occupy a frequency range of 300 - 3400Hz speech signal). Only lower side band is transmitted. The first signal modulates a 64 KHz carrier; the modulated signal occupies a frequencies band of 60.6 KHz to 63.7 KHz. The second signal modulates a 68 KHz carrier; the modulated signal occupies a frequency band of 64.6 KHz to 67.7 KHz. As it can be seen from above example, the modulated signals occupy different frequency ranges in the frequency spectrum. Hence they can be transmitted over the same channel.

At receiver, filters having different pass band frequency range are used to separate the various information signals. The pass band is chosen so as to extract the information from one channel. A separation between two modulated signals in frequency band reduces call interference and also allows for the gradual roll-off gradient of the filters. 18

Time Division Multiplexing : Time division multiplexing is the process of combining the samples from different information signals, in time domain so that they can be transmitted over the same channel. The fact utilized in TDM technique is that there are large intervals between the message samples. The samples from the other sources can be placed within these time intervals. Thus every sample is separated from other in time domain. The time division multiplexing system can be simulated by two rotating switches, one at transmitter and the other at receiver. (See figure 4) The two wipers rotate and establish electrical contact with one channel at a time.

Figure 4

Each signal is sampled over one sampling interval and transmitted one after the other along a common channel. Thus part of message 1 is transmitted first followed by part of message 2, message 3 and then again message 1 so on. It can be anticipated from above process that the receiver switch has to follow two constraints: 1. It must rotate at the same rate as the transmitter switch. 2. It must start at the same time as the transmitting switch and it must establish electrical contact with the same channel no. as that of the transmitter. If these two conditions are met, the receiver is said to be in synchronization with transmitter. If constraint one is not met, the samples of different sources would get mixed at the receiver. If constraint two is not met, the information from source 1 will be received by some other channel which is not intending to accept the information from that particular channel. To establish synchronization, the receiver needs to know: a. Frequency/ rate of operation at transmitter. b. Sample identification. This increases the transmitter and receiver complexity and cost. Practical Aspects of Time Division Multiplexing : In time division multiplexing the correct operations of transmitter switch which creates samples, is a must. The functioning of TDM switch is complex. But its understanding is easy, provided you are aware of the existence of circuit delays and setting times. Theoretically large number of samples can be multiplexed in time domain, but its practical implementation becomes harder and harder as the time interval between consecutive samples decreases. In ST2102, the operations of transmitter switch are controlled by the transmitter timing logic. (See figure 6)

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Figure 5

switch depends upon the decoder output provided in transmitter timing logic. The decoder's output can be obtained at TP7, 8,9,10. Observe that the output at each of these test points is a train of pulses at frequency 16 KHz and with pulse duration set by the duty cycle selector switch. The decoder's output depends upon two quantities: a. Divider output b. Decoder Enable pulse train which is provided by the duty cycle control signal. The following table summarizes the switch operation for various inputs to the decoder.

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Figure 6 Divider Output Transmitter Sampling Switches

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Divider Output MSB TP3 0 0 1 1 LSB TP2 0 1 0 1

Transmitter Sampling Switches CH0 TP7 Closed Open Open Open CH0 TP8 Open Closed Open Open CH2 TP9 Open Open Closed Open CH3 TP10 Open Open Open Closed

The decoder output is decided by the divider output. But the operation takes places only when the decoder is enabled. The enable signal is active low and it is supplied from the duty cycle control switch (TP4) the switch is closed when a low signal is applied to it. The duration of a particular switch closing is decided by the duty cycle control switch whose output drives the enable input of the decoder. For different setting of the duty cycle switch, the output width driving the decoder's enable input varies. Hence the duration for which the switch remains closed also varies. The two control signals to the decoder create a problem. The problem arises when the decoder enable signal appears while divider output is changing. It causes sampling error, because the binary code at the divider output may initially correspond to a different switch. To overcome this problem, the duty cycle output is made to lag by 5% of one channel time slot. This allows the divider output to settle to a constant level before the enable signal arrives. Figure 7 illustrates the timing of the two signals when The duty cycle control is set to "9". The period allocated for transmitting one sample is called as a time slot. On ST2102 four channels are multiplexed. The groups of four time slots are termed as a frame. Procedure: 1. set the duty cycle control switch in position '5'. 2. Turn all the potentiometers in Function Generator block viz Sync Level, 250Hz, 1 KHz, 2KHz fully clockwise. 3. Make following connections with 4mm banana to banana connectors: a. 250 Hz to CH 0 input socket of Transmitter block. b. 500 Hz to CH 1 input socket of Transmitter block. c. 1 KHz to CH 2 input socket of Transmitter block. d. 2 KHz to CH 3 input socket of Transmitter block. 4. Observe the Transmitter Output (TP20) along with CH0 input (TP11) for reference with the aid of oscilloscope. Use Transmitter's CH0 Input for external triggering of oscilloscope. This will help to achieve a stable waveform. 5. Make the following connections with banana connectors: a. Transmitter Output to Receiver Input b. Transmitter Clock to Receiver Clock c. Transmitter CH0 to Receiver CH 0 6. With the help of oscilloscope, observe the Transmitter Output signal (TP20) & the Receivers CH 0 Low Pass Filter's input (TP41) 7. Display the Receiver's Low Pass Filter's input (TP41) & output (TP42) simultaneously on the oscilloscope. The signal at TP42 shows the reconstructed ~250Hz sine wave which was transmitted at CH0. Similarly view the outputs of all Receiver Low Pass Filters at TP44, 46, 48. 8. The Duty cycle Selector switch is presently in position 5 i.e. the duration of each sample is 50% of the timeslot allotted to each channel. 22

Block diagram:

Procedure:1. 2. 3. 4. 5.

Assemble all required apparatus. Connect the message signal with CRO, observe it. Simultaneously do the same for message signal 1,2,3,4 {m1(t),m2(t),m3(t)m4(t)} Connect the message signal to CRO & then obtain TDM output & observe it. Give PAM-TDM o/p to demodulator. 23

Observation Table:Signal m1(t) M2(t) M3(t) M4(t) clk TDM o/p m1(t) m2(t) m3(t) m4(t) amplitude frequency

CONCLUSION:-

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Questions: 1. Define synchronous TDM.

2. Define asynchronous TDM.

3. What is frame in TDM

4. List out the application of TDM

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Experiment No. 4 Aim:- To generate a PCM signal and demodulate it. APPARATUS/COMPONENTS REQUIRED: TDM Pulse Code Receiver Trainer (ST2104) TDM Pulse Code Transmitter Trainer (ST2103), Patch cords, CRO etc Theory:Pulse Code Modulation (PCM): In PCM System the amplitude of the sampled waveform at definite time intervals is represented as a binary code. The first three techniques of the above described systems are not truly digital but in fact are analog in nature. The very fact that the variation of a particular pulse parameter is continuous rather than being in the discrete steps makes the system analog in nature. As a result of this, the PAM signals are vulnerable to noise & dispersion of the pulse. The channel introduces noise on the signal from various sources. Also the receiver is not noise free. The pulses also suffer attenuation & dispersion as they pass through the channel. The primary line constants (L, C, G, & R) limit the velocity at which a particular frequency can travel. The result is different frequency travel at different velocities in the medium. Therefore some frequency component of the square wave arrives later as compared to the other. This causes widening of the pulse width. The phenomenon is called 'dispersion. The combined effect of attenuation, dispersion & noise is so large that the pulse is impaired & introduced at the receiver. Steps in Pulse Code Modulation: Sampling : The analog signal is sampled according to the Nyquist criteria. The Nyquist criteria states that for faithful reproduction of the band limited signal, the sampling rate must be at least twice the highest frequency component present in the signal. For audio signals the highest frequency component is 3.4 KHz. So, Sampling Frequency 2 fm 2 x 3.4 KHz 6.8 KHz Practically, the sampling frequency is kept slightly more than the required rate. In telephony the standard sampling rate is 8 KHz. Sample quantifies the instantaneous value of the analog signal point at sampling point to obtain pulse amplitude output. Allocation of Binary Codes : Each binary word defines a particular narrow range of amplitude level. The sampled value is then approximated to the nearest amplitude level. The sample is then assigned a code corresponding to the amplitude level, which is then transmitted. This process is called as Quantization & it is generally carried out by the A/D converter. There are two important problems associated with quantization. a. Quantization noise : As we have seen the signal is approximated to the nearest level (step). Since the levels are discrete where as the signal is continuous, the discrepancy creeps in.The difference between the analog signal value & its approximated one(quantized one) is random & unpredictable. This is a sort of unwanted, unpredictable, random signal which accompanies the information signal and is termed as 'Quantization noise'. Quantization noise can be reduced by increasing the number of levels, hence reducing the approximation. But it can never be eliminated. Increasing the number of levels to reduce quantization noise has the effect of increasing the number of bits. But nothing comes without price. Increasing the number of bits to represent a sample increases the system's bandwidth requirement

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b. Finite sampling time of A/D converter : Another problem associated with quantization is that the A/D Converter requires finite time to convert the analog information to digital data. The A/D Converter requires that the value at its input, remain unchanged till the conversion is complete. But in practice, the duration of sampled pulse is much smaller than the A/D converter's sampling time. Refer page 18 & 19 A/D conversion for details. This problem can be overcome by using a sample & hold circuit prior to A/D converter output. The sample & hold circuitry holds the sample value till the next sample. The encoding method described above is called as uniform encoding i.e. the quantization levels are uniform for all the amplitude range. But this method of encoding has disadvantages of its own. The quantization noise plays havoc with the low level signals because the % approximation compared to the signal amplitude is very high. This causes a great amount of distortion at the receiver for low level signals. Also the quieter part of music or speech could become severely distorted & would make them unpleasant to listen. To overcome this problem, a non-uniform encoding scheme is used. Here the quantization levels are clear together for low level than they are for the high levels. This has an effect of compression on the extreme ends of the signal. The input/output characteristics for compression signal passed through a comparator network 'prior to compression (See figure 1). This process is called compression. An input output characteristic providing compression

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The opposite effect is utilized at the receiver to undo the effect of compression, is termed as expanding. The two processes are combined are known as compounding this feature is not provided on trainer but you should be aware of its existence. Some error correcting codes & synchronization can also be transmitted along with the information signal. At receiver, the data is decoded by the D/A converter; the recovered samples are filtered & reconstructed to provide the original waveform. Various channels can be multiplexed in time domain i.e. the information data from various sources are sequentially transmitted over the same transmission medium e.g Let us assume a 3 channel PCM system. The system samples 0-2 samples sequentially providing 3 samples to be converted to 3 "n" bit words. These three n bit words forms the basis of a frame. The frame contains these three n bit words also contains some synchronization & reference positioning information.

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PROCEDURE:1. Make the connection according to the circuit diagram. 2. Connect the audio frequency of 1 KHz, 2V signal to analog to digital converter. 3. Mode switch in fast position. 4. Pseudo - random sync code generator switched 'Off'. 5. Error check code selector switches A & B in A = 0 & B= 0 position ('Off' Mode). 6. Connect the PCM modulator output to CRO. 7. Observe output on CRO.

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Block diagram:

30

Observation Table:Signal m(t) Clk PAM o/p PCM o/p PAM m(t) Amplitude Frequency

CONCLUSION:-

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Questions: 1. which noise is occurs in PCM?

2. what is Quantization?

3. what is the advantage of PCM?

4. At which factor bandwidth of PCM depends?

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Experiment No. 5 Aim: Delta modulation & demodulation. APPARATUS/COMPONENTS REQUIRED: Delta Adaptive And Delta Sigma Modulation-Demodulation Trainer (ST2105), CRO , patch cords Theory: Delta modulation is a system of digital modulation developed after pulse code modulation. In this system, at each sampling time, say the Kth sampling time, the difference between the sample value at sampling time K and the sample value at the previous sampling time (K-1) is encoded into just a single bit. I.e. at each sampling time we ask simple question. Has the signal amplitude increased or decreased since the last sample was taken? If signal amplitude has increased, then modulator's output is at logic level 1. If the signal amplitude has decreased, the modulator output is at logic level 0. Thus, the output from the modulator is a series of zeros and ones to indicate rise and fall of the waveform since the previous value. One way in which delta modulator and demodulator is assembled.

Delta Modulator: The analog signal which is to be encoded into digital data is applied to the +ve input of the voltage comparator which compares it with the signal applied to its -ve input from the integrator output (more about this signal in forth coming paragraph). The comparator's output is logic '0' or '1' depending on whether the input signal at +ve terminal is lower or greater then the -ve terminals input signal. The comparator's output is then latched into a D-flip-flop which is clocked by the transmitter clock. Thus, the output of D-flip-Flop is a latched 'l' or '0' synchronous with the transmitter clock edge. This binary data stream is transmitted to receiver and is also fed to the unipolar to bipolar converter. This block converts logic '0' to voltage level of + 4V and logic 'l' to voltage level - 4V. The Bipolar output is applied to the integrator whose output is as follows: a. Rising linear ramp signal when - 4V is applied to it, (corresponding to binary 1) b. Falling linear ramp signal when + 4V is applied to it (corresponding to binary 0).The integrator output is then connected to the -ve terminal of voltage comparator, thus completing the modulator circuit. Let us

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understand the working of modulator circuit with the analog input waveform pplied as below:

Technique of Delta Modulation

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Block Diagram:-

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Procedure : 1. Connect the mains supply 2. Make connection on the board as shown in the figure 3. Ensure that the clock frequency selector block switches A & B are in A = 0 and B = 0 position. 4. Ensure that integrator 1 block's switches are in following position: a) Gain control switch in left-hand position (towards switch A & B). b) Switches A & B in A=0 and B=0 positions. 5. Ensure that the switches in integrator 2 blocks are in following position: a) Gain control switch in left-hand position (towards switch A & B) b) Switches A & B are in A = 0 and B = 0 positions. 6. Connect the DM modulator output to CRO. 7. Connect the DM modulator output to receiver side & observe the output on CRO.

Observation table:Signal m(t) Transmitter Clk Data i/p Integrator o/p Data o/p Amplitude Frequency

CONCLUSION:-

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Questions: 1. How analog signal can be encoded in to bits?

2. What is the advantage of DM over PCM?

3. Which types of noise occur in delta modulation?

4. Define adaptive delta modulation.

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Experiment 6 Aim: - To study different types of digital data formats (RZ, NRZ, and Manchester) APPARATUS/COMPONENTS REQUIRED: 8 bit Variable Binary Data Generator (ST2111), Data Formatting And Carrier Modulation Transmitter Trainer (ST2106), CRO, patch cords

Theory:Line Coding Basics: Transmission of serial data over any distance, be it a twisted pair, fiber optic link, coaxial cable, etc., requires maintenance of the data as it is transmitted through repeaters, echo chancellors and other electronically equipment. The data integrity must be maintained through data reconstruction, with proper timing, and retransmitted. Line codes were created to facilitate this maintenance. In selecting a particular line coding scheme some considerations must be made, as not all line codes adequately provide the all important synchronization between transmitter and receiver. Other considerations for line code selection are noise and interference levels, error detection and error checking, implementation requirements, and the available bandwidth. Unipolar Coding: The most basic transmission code is unipolar or unbalanced coding. In this scheme each discrete variable is transmitted with a different assigned level, 0V and for example +2.5V. But this holds a number of disadvantages:

The average power is two times other bipolar codes The coded signal contains DC and low frequency components. When long strings of zeros are present, a DC or baseline wander occurs. This results in loss of timing and data because a receiver/repeater cannot optimally discriminate ones and zeros. Repeaters/receivers require a minimum pulse density for proper timing extraction. Long strings of ones or zeros contain no timing information and lead to timing jitter (when a clock recovery is used) and possible loss of synchronization. There is no provision for line error rate monitoring.

Bipolar Coding: With bipolar, or also called balanced coding, the same data may be transmitted more efficiently achieving the same error distance with half the power. This coding is often referred to as NonReturn to Zero (NRZ) coding as the signal level is maintained for the duration of the signal interval. Although bipolar coding is more efficient than unipolar, it still lacks provisions for line error monitoring, and is susceptible to DC wander and timing jitter. This coding scheme provides a number of features which:

Eliminate DC Wander Minimize Timing Jitter Provide for Line Error Monitoring

This is accomplished by introducing controlled redundancy in the code through extra coding levels.

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Data Formatting: The symbols 0 and 1 in digital systems can be represented in various formats with different levels & waveforms. The selection of particular format for communication depends on the system bandwidth, systems ability to pass DC level information, error checking facility, ease of clock regeneration & synchronizations at receiver, system complexity & cost etc. The most widely used formats of data representation are given below. These are also available on ST2106 trainer. Every data format has specific advantages & disadvantages associated with them.

Non - Return To Zero (Level) NRZ (L) : It is the simplest form of data representation. The NRZ (L) waveform simply goes low for one bit time to represent a data '0' & high for one bit time to represent a data '1'. Thus the signal alternates only when there is a data change.

NRZ (L) Encoding Return To Zero (RZ) Format : The RZ code provides a partial solution to overcome the receiver clock regeneration problem with NRZ (L) code. It is similar to NRZ (L) code, except that the information is contained in the first half of the bit, interval, while the level during the second half of each period is always 0 volts. The comparison of the two waveforms for a given data is shown in figure.

RZ Format Biphase (Manchester) Coding: The encoding rules for biphase (Manchester) code are as follows. A data '0' is encoded as a low level during first half of the bit time and a high level during the second half. A data '1' is encoded as a high level 39

during first half of the bit time and a low level during the second half. Thus string of l's or 0's as well as any mixture of them will not pass any synchronization problem in receiver. Figure shows the biphase (Manchester) waveform for a given data stream.

Biphase (Manchester) Format

Block diagram:-

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Procedure:1. 2. 3. 4. 5. Generate a clock signal having amplitude 5vp-p & freq. 240 kHz. Using a kit, generate data signal. Now pass the data signal & clock signal into another kit to generate NRZ L, RZ, and Manchester respectively on CRO. Signal can be matched by seeing periodic repetition. Unplugged the kits & CRO.

Observation Table:Amplitude CLK Data NRZ RZ Manchester frequency 240 Khz

CONCLUSION:-

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Questions: 1. Why line coding is required in digital communication?

2. What is the advantages of manchaster coding?

3.

Compare RZ with NRZ coding scheme.

4. Define jitter.

5 .What do you mean by dc wandering?

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Experiment 7 Aim: - ASK modulation & demodulation. APPARATUS/COMPONENTS REQUIRED: 8 bit Variable Binary Data Generator (ST2111), Data Formatting And Carrier Modulation Transmitter Trainer (ST2106), Carrier Demodulation & Data Reformatting Receiver Trainer(ST2107), CRO , patch cords Theory:Amplitude Shift Keying: The simplest method of modulating a carrier with a data stream is to change the amplitude of the carrier wave every time the data changes. This modulation technique is known amplitude shift keying. The simplest way of achieving amplitude shift keying is by switching On the carrier whenever the data bit is '1' & switching off. Whenever the data bit is '0' i.e. the transmitter outputs the carrier for a' 1 ' & totally suppresses the carrier for a '0'. This technique is known as On-Off keying figure 20 illustrates the amplitude shift keying for the given data stream. Thus, Data = 1 carrier transmitted Data = 0 carrier suppressed

The ASK waveform is generated by a balanced modulator circuit, also known as a linear multiplier. As the name suggests, the device multiplies the instantaneous signal at its two inputs. The output voltage being product of the two input voltages at any instance of time. One of the input is AC coupled 'carrier' wave of high frequency. Generally, the carrier wave is a sine wave since any other waveform Would increase the bandwidth, without providing any advantages. The other input which is the information signal to be transmitted, is DC coupled. It is known as modulating signal.

ASK modulation Amplitude Shift Keying: The data stream applied is unipolar i.e. 0 volts at logic '0' & + 5 Volts at logic '1'. The output of balanced modulator is a sine wave, unchanged in phase when a data bit l' is applied to it. In this case the carrier is multiplied with a positive constant voltage when the data bit '0' is applied, the carrier is multiplied by 0 volts, giving rise to 0 volt signal at modulator's output. The ASK modulation result in a great simplicity at the receiver. The method to demodulate the ASK modulation results in a great simplicity at the receiver. The method to demodulate the ASK waveform is to rectify it, pass it through the filter & 43

'Square Up' the resulting waveform. The output is the original data stream. Figure shows the functional blocks required in order to demodulate the ASK waveform at receiver.

ASK Demodulator

ASK Modulation

PROCEDURE: 1. Make the connection according to the circuit diagram. 2. Connect Binary Data Generator to the ASK modulator with desired data pattern output to CRO. 3. Connect ASK modulator output on CRO. 4. Now demodulate the ASK modulator output at receiver side. 5. Find the transmitted data pattern on CRO

Observation Table:Signal Carrier Data ASK 1s 0s Data at receiver 44 Amplitude Frequency

Block Diagram:-

CONCLUSION:-

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Questions: 1. Give the application of ASK.

2. List out the disadvantages of ASK

3. Define symbol rate.

4. What is the bandwidth of BFSK?

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Experiment 8 Aim: - FSK modulation & demodulation. APPARATUS/COMPONENTS REQUIRED: 8 bit Variable Binary Data Generator (ST2111), Data Formatting and Carrier Modulation Transmitter Trainer (ST2106), Carrier Demodulation & Data Reformatting Receiver Trainer (ST2107), CRO, patch cords Theory:Frequency Shift Keying: In frequency shift keying, the carrier frequency is shifted in steps (i.e. from one frequency to another) corresponding to the digital modulation signal. If the higher frequency is used to represent a data '1' & lower frequency a data '0', the resulting Frequency shift keying waveform appears as shown in figure. Thus Data = 1 high frequency Data = 0 low frequency

FSK Waveform On a closer look at the FSK waveform, it can be seen that it can be represented as the sum of two ASK waveforms.

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FSK Waveform from ASK Waveforms

FSK Modulator: The demodulation of FSK waveform can be carried out by a phase locked loop. As known, the phase locked loop tries to 'lock' to the input frequency. It achieves this by generating corresponding output voltage to be fed to the voltage controlled oscillator, if any frequency deviation at its input is encountered. Thus the PLL detector follows the frequency changes & generates proportional output voltage. The output voltage from PLL contains the carrier components. Therefore the signal is passed through the low pass filter to remove them. The resulting wave is too rounded to be used for digital data processing. Also, the amplitude level may be very low due to channel attenuation. The signal is 'Squared Up' by feeding it to the voltage comparator. Figure shows the functional blocks involved in FSK demodulation.

FSK Demodulator: Since the amplitude change in FSK waveform does not matter, this modulation technique is very reliable even in noisy & fading channels. But there is always a price to be paid to gain that advantage. The price in this case is widening of the required bandwidth. The bandwidth increase depends upon the two carrier frequencies used & the digital data rate. Also, for a given data, the higher the frequencies & the more they differ from each other, the wider the required bandwidth. The bandwidth required is at least doubled than that in the ASK modulation. This means that lesser number of communication channels for given band of frequencies.

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Block Diagram:

PROCEDURE: 1. Make the connection according to the circuit diagram. 2. Connect Binary Data Generator to the FSK modulator with desired data pattern output to CRO. 3. Connect FSK modulator output on CRO. 4. Now demodulate the FSK modulator output at receiver side. 5. Find the transmitted data pattern on CRO Observation Table: Signal Data Carrier 1 Carrier 2 FSK Data at receiver Amplitude Frequency

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CONCLUSION:-

Questions: 1. Why FSK is preferred over ASK?

2. What is BFSK?

3. What is the difference between FM and FSK?

4. What is the bandwidth of BFSK?

5. What is the disadvantage of BFSK? .

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Experiment 9 Aim: - PSK modulation & demodulation. APPARATUS/COMPONENTS REQUIRED: 8 bit Variable Binary Data Generator (ST2111), Data Formatting And Carrier Modulation Transmitter Trainer (ST2106), Carrier Demodulation & Data Reformatting Receiver Trainer (ST2107), CRO, patch cords Theory:PSK: - PSK involves the phase change at the carrier sine wave between 0 to 180 in accordance with the data stream to be transmitted. PSK modulator is similar to ASK modulator both used balanced modulator to multiply the carrier with balanced modulator signal. The digital signal with applied to Modulation input for PSK generation is bipolar i.e. equal positive and negative voltage level. When the modulating input is positive the out put at modulator is a line wave in phase with the carrier input whereas for positive voltage level, the output of modulator is a sine wave which is switched out of phase by 180 from the carrier input. Quadrature Phase-shift Keying (QPSK)

QPSK:- in QPSK each pair at consecutive data bit is treated as a two bit code which is switch the phase of the carrier sine wave between one at four phase 90 apart. The four possible combinations at bib it code are 0, 01, 10, and 11 each code represents either a phase of 45, 185, 225, and 315 lagging, relative to the phase at the original unmodulated carrier QPSK offers an advantage over PSK is a no carrier that how each phase represents a two bit code rather than a single bit. This means that either we can charge phase per sec. or the same amount of data can be transmitted with Constellation diagram for QPSK with Gray coding. Each adjacent symbol only differs by one bit. Sometimes known as quaternary or quadriphase PSK or 4-PSK, QPSK uses four points on the constellation diagram, equispaced around a circle. With four phases, QPSK can encode two bits per symbol, shown in the diagram with Gray coding to minimize the BER twice the rate of BPSK. Analysis shows that this may be used either to double the data rate compared to a BPSK system while maintaining the bandwidth of the signal or to maintain the data-rate of BPSK but halve the bandwidth needed. Although QPSK can be viewed as a quaternary modulation, it is easier to see it as two independently modulated quadrature carriers. With this interpretation, the even (or odd) bits are used to modulate the inphase component of the carrier, while the odd (or even) bits are used to modulate the quadrature-phase component of the carrier. BPSK is used on both carriers and they can be independently demodulated

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BLOCK DIAGRAM:-

PROCEDURE:1. Make the connection according to the circuit diagram. 2. Connect Binary Data Generator to the BPSK modulator with desired data pattern output to CRO. 3. Connect BPSK modulator output on CRO. 4. Now, demodulate the BPSK modulator output at receiver side. 5. Find the transmitted data pattern on CRO

Observation Table:Signal Amplitude Carrier Data PSK 1s 0s Data

Frequency

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CONCLUSION:-

Questions: 1. What is the disadvantage of PSK?

2. What is the advantage of PSK?

3. What is the difference between QPSK and BPSK?

4. What is DPSK?

5. Compare bandwidth of BFSK and BPSK.

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Experiment No. 10 Aim: To study QAM modulation and demodulation

APPARATUS/COMPONENTS REQUIRED: 8 bit Variable Binary Data Generator (ST2111), Quadrature Amplitude Modulation and Demodulation Trainer (ST2112) , CRO , patch cords Theory:Quadrature Amplitude Modulation (QAM) The QAM is a digital modulation where the information is contained into the phase as well as the amplitude of the transmitted carrier. 8-QAM : In the 8-QAM the data are divided into groups of 3 bits (Tribit), one of which varies the amplitude of the carrier, the last two the phase. The modulated signal can take 4 different phases and 2 different amplitudes, for a total of 8 different states. 16-QAM : In the 16-QAM the data are divided into groups of 4 bits (Quadbit). The 16 possible combinations change amplitude and phase of the carrier, which can take 16 different states. N-QAM : At the moment we reach to a data subdivision into groups of 9 bits, obtaining constellations with 512 modulation points. The main aspects characterizing the QAM are: a. Applications in modems for high speed data transmission (ITU-TV22bis, V29, V32, V32bis, V33, V34, V34bis, BELL 209) and digital radio transmission. It needs circuits of high complexity b. Possibility of error higher than the PSK called Fb the bit transmission speed and "n" the number of bits considered for the modulation, the minimum spectrum Bw of the modulated signal is equal to Ft/n c. The transmission efficiency, defined as the ratio between Fb and Bw, is equal to "n" Modulator QAM : The functional diagram of a 8-QAM modulator is shown in Fig.983.2, while the block diagram of the modulator mounted on the module is shown in Fig.. The 8-QAM signal can be seen as 4-PSK signal whose amplitude can take 2 different values. In this way, each "modulation interval" depends on the state of 3 data bits ("I", "Q", "C"): the first 2 ("I" and "Q") determine the phase of the output signal, the third ("C") the amplitude. 8-QAM Demodulator : The 8-QAM demodulator mounted on the module uses the 4-PSK demodulator to detect the signals "I" and "Q", while the signal "C" is obtained detecting the amplitude of the positive values of the signal "I". This amplitude can take 2 positive and two negative values, as function of the value of the signal "c" in transmission. The demodulator "c" detects which of the two levels is present in the coming signal. If the 54

level is the highest you obtain the value "1 ", if the value is the lowest you obtain the value "0". The block diagram of the 8-QAM demodulator is shown in Fig. The demodulator includes the following circuits: a. The regenerator of the carriers at 0 and 90 (the same of the 4-PSK demodulator) b. Two 2-PSK demodulators (indicated on the diagram as I-DEM and Q DEM) two low pass filters. c. A circuit discriminating the amplitude of the signal "I". This enables to obtain the signal "C" d. A data clock extraction circuit and three data re-timing circuits. The signals "I", "Q" and "C" are supplied across the outputs TP20, TP21 and TP22.

Demodulator QAM :

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Fig.38

Procedure : 1. Ensure the following initial conditions on ST2112 trainer : a. SW3, SW5, SW6, SW7, SW9 should be in the OFF mode. b. Power supply should be OFF. 3. Connect Test point TP6 on Channel 1 & TP7 on Channel 2 of Oscilloscope; you will observe 1 KHz sine & cosine wave. 4. Set I, Q & C Channel data with the help of DIP switch SW5, SW6, SW7. As there are 24 bits data available on the trainer so, first bit is I bit then second bit is Q bit then third bit is C bit. In this experiment you have to use I bit & Q bit & C bit so you can select combination according to your requirement. For example: SW5=11000110 SW6=01011000 SW7=01100010 5. Switch ON all the DIP switches on SW3. 6. Now press SW8 which is reset switch then press SW4 which is start. 7. Now connect Channel 1 of Oscilloscope to TP2 & Channel 2 to TP1, you can observe Clock & Data which you have set. 8. Now to observe QAM modulated signal with respect to data, connect Channel 1 to TP1 & Channel 2 to TP9. 9. You can add noise by using DIP switch SW9 (001 / 010 / 111). 10. To observe the demodulator section, connect channel 1 of oscilloscope to the test point TP12 you will observe squarer frequency. 11. To observe I switch & Q switch in the demodulator section, connect channel 1 of oscilloscope to TP16 & channel 2 of the oscilloscope to TP17. 12. To observe I , Q & C demodulated signal connect oscilloscope to TP20, TP21, TP22 ( if you have logic analyzer you can observe I, Q & C simultaneously) 13. To observe input data , output data , encoded data & decoded data you have to connect logic analyzer to test points TP1, TP2, TP3, TP4, TP5, TP20, TP21,TP22, TP23, TP24 etc. 56

Waveforms : a. Clock & Data :

b. QPSK & QAM modulated signal :

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CONCLUSION:-

Questions: 1. Define QAM

2. List out advantages of QAM

3. Give the application of QAM

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