MPASM and MPLINK PICmicro QUICK REFERENCE GUIDE

The Embedded Control Solutions Company

MPASM Quick Reference Guide

This Quick Reference Guide gives all the instructions, directives, and command line options for the Microchip MPASM Assembler.

MPASM Directive Language Summary

Directive Description Syntax

CONTROL DIRECTIVES
CONSTANT #DEFINE END EQU ERROR ERRORLEVEL #INCLUDE LIST MESSG NOLIST ORG PAGE Declare Symbol Constant constant <label> [= <expr>, ...,<label> [= <expr>] ] Define Text Substitution End Program Block #define <name> [[(<arg>,...,<arg>)]<value>] end

Define Assembly Constant <label> equ <expr> Issue an Error Message Set Messge Level Include Source File Listing Options User Defined Message Turn off Listing Output Set Program Origin Insert Listing Page Eject error "<text_string>" errorlevel 0|1|2|<+-><msg> include <<include_file>> include "<include_file>" list [<option>[,...,<option>]] messg "<message_text>" nolist <label> org <expr> page processor <processsor_type> radix <default_radix> <label> set <expr> space [<expr>] subtitl "<sub_text>" title "<title_text>" #undefine <label> variable <label> [= <expr>,...,]

PROCESSOR Set Processor Type RADIX SET SPACE SUBTITLE TITLE #UNDEFINE VARIABLE Specify Default Radix Assign Value to Variable Insert Blank Listing Lines Specify Program Subtitle Specify Program Title Delete a Substitution Label Declare Symbol Variable

CONDITIONAL ASSEMBLY
ELSE ENDIF ENDW IF IFDEF IFNDEF WHILE Begin Alternative Assem- else bly to IF End Conditional Assembly endif End a While Loop Begin Conditional ASM Code endw if <expr>

Execute If Symbol Defined ifdef <label> Execute If Symbol Not Defined Perform Loop While True ifndef <label> while <expr>

MPASM Directive Language Summary (Continued)

Directive DATA
_ _BADRAM CBLOCK _ _CONFIG DA DATA DB DE DT DW ENDC FILL _ _ IDLOCS _ _MAXRAM RES Specify invalid RAM loca- _ _badram <expr> tions Define Block of Constants cblock [<expr>] Set configuration bits Pack Strings in 14-bit Memory _ _config <expr> OR _ _config <addr>, <expr> [<label>] da <expr> [, <expr2>, ..., <exprn>]

Description

Syntax

Create Numeric/Text Data data <expr>,[,<expr>,...,<expr>] data "<text_string>"[,"<text_string>",...] Declare Data of One Byte db <expr>[,<expr>,...,<expr>] Declare EEPROM Data Define Table de <expr>[,<expr>,...,<expr>] dt <expr>[,<expr>,...,<expr>]

Declare Data of One Word dw <expr> [,<expr>,...,<expr>] End CBlock endc

Specify Memory Fill Value fill <expr>, <count> Set ID locations Specify max RAM adr Reserve Memory _ _idlocs <expr> _ _maxram <expr> res <mem_units>

MACROS
ENDM EXITM EXPAND LOCAL MACRO NOEXPAND End a Macro Definition Exit from a Macro Expand Macro Listing endm exitm expand

Declare Local Macro Vari- local <label> [,<label>] able Declare Macro Definition <label> macro [<arg>,...,<arg>]

Turn off Macro Expansion noexpand

OBJECT FILE DIRECTIVES

BANKISEL BANKSEL CODE EXTERN GLOBAL IDATA PAGESEL UDATA UDATA_ACS UDATA_OVR UDATA_SHR Select Bank for indirect Select RAM bank Executable code section Declare external label Export defined label Initialized data section Select ROM page Uninitialized data section Access uninit data sect Overlay uninit data sect Shared uninit data sect bankisel <label> banksel <label> [<name>] code [<address>] extern <label> [ ,<label>] extern <label> [ .<label>] [<name>] idata [<address>] pagesel <label> [<name>] udata [<address>] [<name>] udata_acs [<address>] [<name>] udata_ovr [<address>] [<name>] udata_shr [<address>]

MPASM Radix Types Supported

Radix
Decimal Hexadecimal (default) Octal Binary Character (ASCII)

Syntax
D<digits>' .<digits> H<hex_digits>' 0x<hex_digits> O<octal_digits>' B<binary_digits>' <character>' A<Character>' D100' .100 H9f' 0x9f O777'

Example

B00111001' AC' C'

MPLINK Command Line Options Option

/o filename /m filename /l pathlist /k pathlist /n length /h, /? /a hexformat /q /d

Description
Specify output file filename. Default is a.out. Create map file filename. Add directories to library search path. Add directories to linker script search path. Specify number of lines per listing page. Display help screen. Specify format of hex output file. Quiet mode. Dont create an absolute listing file.

Key to 12, 14, and 16-bit PICmicro Family Instruction Sets

Field
b d Destination select; d=0 d=1

Description
Bit address within an 8 bit file register Store result in W (f0A). Store result in file register f. Default is d = 1.

f k W x i p t PH:PL

Register file address (0x00 to 0xFF) Literal field, constant data or label Working register (accumulator) Dont care location Table pointer control; i = 0 i=1 Do not change. Increment after instruction execution.

Peripheral register file address (0x00 to 0x1f) Table byte select; t=0 t=1 Perform operation on lower byte. Perform operation on upper byte.

Multiplication results registers

12-Bit Core Instruction Set:

12-Bit Core Literal and Control Operations
Hex
Ekk 9kk 004 Akk Dkk Ckk 002 8kk 003 00f Fkk

Mnemonic
ANDLW CALL CLRWDT GOTO IORLW MOVLW OPTION RETLW SLEEP TRIS XORLW f k k k k k k k

Description
AND literal and W Call subroutine Clear watchdog timer Goto address (k is 9 bits) Incl. OR literal and W Move Literal to W Load OPTION Register Return with literal in W Go into Standby Mode Tristate port f

Function
k .AND. W W PC + 1 TOS, k PC 0 WDT (and Prescaler if assigned) k PC(9 bits) k .OR. W W kW W OPTION Register k W, TOS PC 0 WDT, stop osc W I/O control reg f

Exclusive OR literal and W k .XOR. W W

12-Bit Core Byte Oriented File Register Operations

Hex
1Cf 14f 06f 040 24f 0Cf 2Cf 28f 3Cf 10f 20f 02f 000 34f 30f 08f 38f 18f

Mnemonic
ADDWF ANDWF CLRF CLRW COMF DECF DECFSZ INCF INCFSZ IORWF MOVF MOVWF NOP RLF RRF SUBWF SWAPF XORWF f,d f,d f,d f,d f,d f,d f,d f,d f,d f,d f,d f,d f f,d f,d f

Description
Add W and f AND W and f Clear f Clear W Complement f Decrement f Decrement f, skip if zero Increment f Increment f, skip if zero Inclusive OR W and f Move f Move W to f No operation Rotate left f
C

Function
W+f d W .AND. f d 0f 0W .NOT. f d f-1d f - 1 d, skip if zero f+1d f + 1 d, skip if zero W .OR. f d fd Wf
register f 7......0 register f C 7......0

Rotate right f Subtract W from f Swap halves f Exclusive OR W and f

f-W d f(0:3) f(4:7) d W .XOR. f d

12-Bit Core Bit Oriented File Register Operations

Hex
4bf 5bf 6bf 7bf

Mnemonic
BCF BSF BTFSC BTFSS f,b f,b f,b f,b

Description
Bit clear f Bit set f Bit test, skip if clear Bit test, skip if set

Function
0 f(b) 1 f(b) skip if f(b) = 0 skip if f(b) = 1

14-Bit Core Instruction Set

14-Bit Core Literal and Control Operations
Hex
3Ekk 39kk 2kkk 0064 2kkk 38kk 30kk 0062 0009 34kk 0008 0063 3Ckk 006f 3Akk

Mnemonic
ADDLW ANDLW CALL k k k

Description
Add literal to W AND literal and W Call subroutine Clear watchdog timer

Function
k+W W k .AND. W W PC + 1 TOS, k PC 0 WDT (and Prescaler) k .OR. W W kW W OPTION Register TOS PC, 1 GIE k W, TOS PC TOS PC 0 WDT, stop oscillator k-WW W I/O control reg f k .XOR. W W

CLRWDT T GOTO IORLW MOVLW OPTION RETFIE RETLW RETURN SLEEP SUBLW TRIS XORLW k f k k k k k

Goto address (k is nine bits) k PC(9 bits) Incl. OR literal and W Move Literal to W Load OPTION register Return from Interrupt Return with literal in W Return from subroutine Go into Standby Mode Subtract W from literal Tristate port f Exclusive OR literal and W

14-Bit Core Byte Oriented File Register Operations

Hex
07ff 05ff 018f 0100 09ff 03ff 0Bff 0Aff 0Fff 04ff 08ff 008f 0000 0Dff

Mnemonic
ADDWF ANDWF CLRF CLRW COMF DECF DECFSZ INCF INCFSZ IORWF MOVF MOVWF NOP RLF f,d f,d f,d f,d f,d f,d f,d f,d f f,d f,d f

Description
Add W and f AND W and f Clear f Clear W Complement f Decrement f Decrement f, skip if zero Increment f Increment f, skip if zero Inclusive OR W and f Move f Move W to f No operation Rotate left f
C

Function
W+fd W .AND. f d 0f 0W .NOT. f d f - 1 d f - 1 d, skip if 0 f+1d f + 1 d, skip if 0 W .OR. f d fd Wf

register f 7 .. .. .. 0

0Cff

RRF

f,d

Rotate right f
C

register f 7 .. .. .. 0

02ff 0Eff 06ff 1bff 1bff 1bff 1bff

SUBWF SWAPF XORWF BCF BSF BTFSC BTFSS

f,d f,d f,d f,b f,b f,b f,b

Subtract W from f Swap halves f Exclusive OR W and f Bit clear f Bit set f Bit test, skip if clear Bit test, skip if set

f-Wd f(0:3) f(4:7) d W .XOR. f d 0 f(b) 1 f(b) skip if f(b) = 0 skip if f(b) = 1

12-Bit/14-Bit Core Special Instruction Mnemonics

Mnemonic
ADDCF ADDDCF B BC BDC BNC BNDC BNZ BZ CLRC CLRDC CLRZ LCALL k f,d f,d k k k k k k k

Description
Add Carry to File Add Digit Carry to File Branch Branch on Carry Branch on Digit Carry

Equivalent Operation(s)
BTFSC INCF BTFSC INCF GOTO BTFSC GOTO BTFSC GOTO 3,0 f,d 3,1 f,d k 3,0 k 3,1 k 3,0 k 3,1 k 3,2 k 3,2 k 3,0 3,1 3,2 0x0A,3 0x0A,4 k 0x0A,3 0x0A,4 k f,0 f,1 f,d 3,0 3,1 3,2 3,0 3,1 3,0 3,1 3,2 3,2 3,0 f,d 3,1 f,d f,1

Status
Z Z

Branch on No Carry BTFSS GOTO Branch on No Digit Carry Branch on No Zero Branch on Zero Clear Carry Clear Digit Carry Clear Zero Long Call BTFSS GOTO BTFSS GOTO BTFSC GOTO BCF BCF BCF BCF/BSF BCF/BSF CALL BCF/BSF BCF/BSF GOTO MOVF COMF INCF BSF BSF BSF BTFSS BTFSS BTFSC BTFSC BTFSC BTFSS BTFSC DECF BTFSC DECF MOVF

LGOTO

Long GOTO

Z Z Z Z Z

MOVFW NEGF SETC SETDC SETZ SKPC SKPDC SKPNC SKPNDC SKPNZ SKPZ SUBCF SUBDCF TSTF

f f,d

Move File to W Negate File Set Carry Set Digit Carry Set Zero Skip on Carry Skip on Digit Carry Skip on No Carry Skip on No Digit Carry Skip on Non Zero Skip on Zero

f,d f,d f

Subtract Carry from File Subtract Digit Carry from File Test File

Microchip Technology Inc. 2355 West Chandler Blvd. Chandler, AZ 85224 Tel: 480.786.7200 Fax: 480.899.9210 Web Site Address: www.microchip.com The Microchip and logo, PIC, and PICmicro are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. MPLAB is a trademark of Microchip Technology in the U.S.A. and other countries. 1999 Microchip Technology Incorporated. All rights reserved. Printed in the U.S.A. 4/99 DS30400D

16-Bit Core Instruction Set

16-Bit Core Data Movement Instructions
Hex
6pff

Mnemonic
MOVFP f,p k k p,f f

Description
Move f to p Move literal to BSR Move literal to RAM page select Move p to f Move W to F fp

Function
k BSR (3:0) k BSR (7:4) pW Wf TBLATH f if t=1, TBLATL f if t=0; ProgMem(TBLPTR) TBLAT; TBLPTR + 1 TBLPTR if i=1

b8kk MOVLB bakx MOVLP 4pff 01ff a8ff MOVPF MOVWF TABLRD

t,i,f Read data from table latch into file f, then update table latch with 16-bit contents of memory location addressed by table pointer t,i,f Write data from file f to table latch and then write 16-bit table latch to program memory location addressed by table pointer t,f Read data from table latch into file f (table latch unchanged)

acff

TABLWT

f TBLATH if t = 1, f TBLATL if t = 0; TBLAT ProgMem(TBLPTR); TBLPTR + 1 TBLPTR if i=1

a0ff

TLRD

TBLATH f if t = 1 TBLATL f if t = 0

a4ff

TLWT

t,f

Write data from file f into f TBLATH if t = 1 table latch f TBLATL if t = 0

16-Bit Core Arithmetic and Logical Instruction

Hex
0eff 10ff

Mnemonic
k f,d f,d k f,d f,d f,d f,d f,d f,d k f,d k k f f,d f,d ADDWF ADDWFC

Description
Add literal to W Add W to F Add W and Carry to f AND Literal and W AND W with f Clear f and Clear d Complement f Dec. adjust W, store in f,d Decrement f Increment f Inclusive OR literal with W Inclusive or W with f Move literal to W Multiply literal and W Multiply W and f Negate W, store in f and d Rotate left through carry
C

Function
(W + k) W (W + f) d (W + f + C) d (W .AND. k) W (W .AND. f) d 0x00 f,0x00 d .NOT. f d W adjusted f and d (f - 1) f and d (f + 1) f and d (W .OR. k) W (W .OR. f) d kW (k x W) PH:PL (W x f) PH:PL (W + 1) f,(W + 1) d
register f 7 .. .. .. 0

b1kk ADDLW

b5kk ANDLW 0aff 28ff 12ff 2eff 06ff 14ff ANDWF CLRF COMF DAW DECF INCF

b3kk IORLW 08ff IORWF

b0kk MOVLW bckk MULLW 34ff 2cff 1aff MULWF NEGW RLCF

16-Bit Core Arithmetic and Logical Instruction (Continued)

Hex
22ff

Mnemonic
RLNCF f,d

Description
Rotate left (no carry)

Function
register f 7 .. .. .. 0 register f 7. .. .. .0 register f 7 .. .. .. 0

18ff

RRCF

f,d

Rotate right through carry Rotate right (no carry)

20ff

RRNCF

f,d

2aff

SETF

f,d k f,d f,d f,d k f,d

Set f and Set d Subtract W from literal Subtract W from f Subtract from f with borrow Swap f

0xff f,0xff d (k - W) W (f - W) d (f - W - c) d f(0:3) d(4:7), f(4:7) d(0:3)

b2kk SUBLW 04ff 02ff 1cff SUBWF SUBWFB SWAPF

b4kk XORLW 0cff XORWF

Exclusive OR literal with (W .XOR. k) W W Exclusive OR W with f (W .XOR. f) d

16-Bit Core Bit Handling Instructions

Hex
8bff 8bff 9bff 9bff 3bff

Mnemonic
BCF BSF BTFSC BTFSS BTG f,b f,b f,b f,b f,b

Description
Bit clear f Bit set f Bit test, skip if clear Bit test, skip if set Bit toggle f 1 f(b)

Function
0 f(b) skip if f(b) = 0 skip if f(b) = 1 .NOT. f(b) f(b)

16-Bit Core Program Control Instructions

Hex Mnemonic
k

Description
Subroutine call (within 8k page) Compare f/w, skip if f = w Compare f/w, skip if f > w Compare f/w, skip if f< w Decrement f, skip if 0 Decrement f, skip if not 0 Unconditional branch (within 8k) Increment f, skip if zero

Function
PC+1 TOS,k PC(12:0), k(12:8) PCLATH(4:0), PC(15:13) PCLATH(7:5) f-W, skip if f = W f-W, skip if f > W f-W, skip if f < W (f-1) d, skip if 0 (f-1) d, skip if not 0 k PC(12:0) k(12:8) PCLATH(4:0), PC(15:13) PCLATH(7:5) (f+1) d, skip if 0 (PC+1) TOS; k PCL, (PCLATH) PCH (PCLATH) PCH:k PCL 0 GLINTD k W, TOS PC, (PCLATH unchanged)

ekkk CALL

31ff 32ff 30ff 16ff 26ff ckkk

CPFSEQ CPFSGT CPFSLT DECFSZ DCFSNZ GOTO

f f f f,d f,d k

1eff 24ff

INCFSZ INFSNZ

f,d f,d k

Increment f, skip if not zero (f+1) d, skip if not 0 Long Call (within 64k) Return from interrupt, enable interrupt

b7kk LCALL 0005 RETFIE b6kk RETLW

Return with literal in W

16-Bit Core Program Control Instructions (Continued)

Hex Mnemonic Description
Return from subroutine f Test f, skip if zero

Function
TOS PC (PCLATH unchanged) skip if f = 0

0002 RETURN 33ff TSTFSZ

16-Bit Core Special Control Instructions

Hex Mnemonic Description
Clear watchdog timer Enter Sleep Mode

Function
0 WDT,0 WDT prescaler, 1 PD, 1 TO Stop oscillator,power down, 0 WDT, 0 WDT Prescaler 1 PD, 1 TO

0004 CLRWDT 0003 SLEEP

Key to Enhanced 16-Bit Core Instruction Set

Field FILE ADDRESSES
f fs fd dest r 8-bit file register address 12-bit source file register address 12-bit destination file register address W register if d = 0; file register if d = 1 0, 1, or 2 for FSR number

Description

LITERALS
kk kb kc kd 8-bit literal value 4-bit literal value bits 8-11 of 12-bit literal value bits 0-7 of 12-bit literal value

OFFSETS, ADDRESSES
nn nd ml mm 8-bit relative offset (signed, 2s complement) 11-bit relative offset (signed, 2s complement) bits 0-7 of 20-bit program memory address bits 8-19 of 20-bit program memory address

BITS
b d a s bits 9-11; bit address bit 9; 0=W destination; 1=f destination bit 8; 0=access block; 1=BSR selects bank bit 0 (bit 8 for CALL); 0=no update; 1(fast)=update/save W, STATUS, BSR

Enhanced 16-Bit Core Instruction Set

Enhanced 16-Bit Core Literal Operations
Hex
0Fkk 0Bkk 0004

Mnemonic
ADDLW ANDLW CLRWD kk kk

Description
ADD literal to WREG

Function
W+kk W 0 WDT, 0 WDT postscaler, 1 TO,1 PD

AND literal with WREG W .AND. kk W Clear Watchdog Timer

0007

DAW

Decimal Adjust WREG if W<3:0> >9 or DC=1, W<3:0>+6W<3:0>, else W<3:0> W<3:0>; if W<7:4> >9 or C=1, W<7:4>+6W<7:4>, else W<7:4> W<7:4>; kk r,kd:kc kb kk kk kk kk Inclusive OR literal with W .OR. kk W WREG Load 12-bit Literal to FSR (second word) Move literal to low nibble in BSR Move literal to WREG Multiply literal with WREG Subtract W from literal Exclusive OR literal with WREG kd:kc FSRr kb BSR kk W W * kk PRODH:PRODL kkW W W .XOR. kk W

09 kk EEkc F0kd 01kb 0Ekk 0D kk 08kk 0Akk

IORLW LFSR MOVLB MOVLW MULLW SUBLW XORLW

Enhanced 16-Bit Core Memory Operations

Hex
0008 0009

Mnemonic
TBLRD* TBLRD*+

Description

Function

Table Read (no change Prog Mem to TBLPTR) (TBLPTR) TABLAT Table Read (post-increment TBLPTR) Table Read (post-decrement TBLPTR) Table Read (pre-increment TBLPTR) Prog Mem (TBLPTR) TABLAT TBLPTR +1 TBLPTR Prog Mem (TBLPTR) TABLAT TBLPTR -1 TBLPTR TBLPTR +1 TBLPTR Prog Mem (TBLPTR) TABLAT

000A

TBLRD*-

000B

TBLRD+*

000C 000D

TBLWT* TBLWT*+

Table Write (no change TABLAT Prog to TBLPTR) Mem(TBLPTR) Table Write (post-increment TBLPTR) Table Write (post-decrement TBLPTR) Table Write (pre-increment TBLPTR) TABLAT Prog Mem(TBLPTR) TBLPTR +1 TBLPTR TABLAT Prog Mem(TBLPTR) TBLPTR -1 TBLPTR TBLPTR +1 TBLPTR TABLAT Prog Mem(TBLPTR)

000E

TBLWT*-

000F

TBLWT+*

Enhanced 16-Bit Core Control Operations

Hex
E2nn E6nn E3nn E7nn E5nn E1nn E4nn BC BN BNC BNN BNOV BNZ BOV

Mnemonic
nn nn nn nn nn nn nn nd nn

Description
Relative Branch if Carry Relative Branch if Negative

Function
if C=1, PC+2+2*nn PC, else PC+2PC if N=1, PC+2+2*nnPC,else PC+2PC

Relative Branch if Not if C=0, PC+2+2*nnPC, Carry else PC+2PC Relative Branch if Not if N=0, PC+2+2*nnPC, Negative else PC+2PC Relative Branch if Not if OV=0, PC+2+2*nnPC, Overflow else PC+2PC Relative Branch if Not if Z=0, PC+2+2*nnPC, Zero else PC+2PC Relative Branch if Overflow if OV=1, PC+2+2*nnPC, else PC+2PC

D0 nd BRA E0nn BZ

Unconditional relative PC+2+2*nd PC branch Relative Branch if Zero if Z=1, PC+2+2*nnPC, else PC+2PC PC+4 TOS, mm:ml PC<20:1>, if s=1, W WS, STATUS STATUSS, BSR BSRS mm:ml PC<20:1> No operation TOS-1 TOS PC +2 TOS PC+2 TOS, PC+2+2*ndPC

ECml CALL Fmm

mm:ml,s Absolute Subroutine Call (second word)

EFml Fmm 0000 0006 0005

GOTO NOP POP PUSH

mm:ml

Absolute Branch (second word) No Operation Pop Top/stack Push Top/stack

D8 nd RCALL 00FF 0010 RESET RETFIE

nd

Relative Subroutine Call

Generate a Reset same as MCLR reset (same as MCR reset) s Return from interrupt (and enable interrupts) TOS PC, 1 GIE/GIEH or PEIE/GIEL, if s=1, WS W, STATUSS STATUS, BSRS BSR, PCLATU/PCLATH unchngd.

0C kk 0012

RETLW

kk

Return from kk W subroutine, literal in W Return from subroutine TOS PC, if s=1, WS W, STATUSS STATUS, BSRS BSR, PCLATU/PCLATH are unchanged 0 WDT, 0 WDT postscaler, 1 TO, 0 PD

RETURN s

0003

SLEEP

Enter SLEEP Mode

Enhanced 16-Bit Core Bit Operations

Hex
9 bf 8 bf Bbf Abf 7 bf

Mnemonic
BCF BSF BTFSC BTFSS BTG f,b,a f,b,a f,b,a f,b,a f,b,a

Description
Bit Clear f Bit Set f Bit test f, skip if clear Bit test f, skip if set Bit Toggle f

Function
0 f<b> 1 f<b> if f<b>=0, PC+4PC, else PC+2PC if f<b>=1, PC+4PC, else PC+2PC f<b> f<b>

Enhanced 16-Bit Core File Register Operation

Hex
24 f 20 f

Mnemonic
ADDWF f,d,a ADDWFC f,d,a

Description
ADD WREG to f ADD WREG and Carry bit to f

Function
W+f dest W+f+C dest W .AND. f dest 0f f dest fW, if f=W, PC+4 PC else PC+2 PC fW, if f > W, PC+4 PC else PC+2 PC fW, if f < W, PC+4 PC else PC+2 PC f1 dest f1 dest, if dest=0, PC+4 PC else PC+2 PC f1 dest, if dest 0, PC+4 PC else PC+2 PC f+1 dest f+1 dest, if dest=0, PC+4 PC else PC+2 PC f+1 dest, if dest 0, PC+4 PC else PC+2 PC W .OR. f dest f dest fs fd Wf W * f PRODH:PRODL f + 1 PRODH:PRODL
C register f 7 .. .. .. 0
register f 7......0

14f 6Af 1C f 62f

ANDWF CLRF COMF CPFSEQ

f,d,a f,a f,d,a f,a

AND WREG with f Clear f Complement f Compare f with WREG, skip if f=WREG Compare f with WREG, skip if f > WREG Compare f with WREG, skip if f < WREG Decrement f Decrement f, skip if 0 Decrement f, skip if not 0 Increment f Increment f, skip if 0 Increment f, skip if not 0 Inclusive OR WREG with f Move f Move fs (first word) to fd (second word) Move WREG to f Multiply WREG with f Negate f Rotate left f through Carry Rotate left f (no carry)

64f

CPFSGT

f,a

60 f

CPFSLT

f,a

04 f 2C f

DECF DECFSZ

f,d,a f,d,a

4C f

DCFSNZ

f,d,a

28 f 3C f

INCF INCFSZ

f,d,a f,d,a

48f

INFSNZ

f,d,a

10f 50f Cfs Ffd 6Ef 02 f 6C f 34 f

IORWF MOVF MOVFF MOVWF MULWF NEGF RLCF

f,d,a f,d,a fs,fd f,a f,a f,a f,d,a

44 f

RLNCF

f,d,a

Enhanced 16-Bit Core File Register Operation (Continued)

Hex
30 f

Mnemonic
RRCF f,d,a

Description
Rotate right f through Carry Rotate right f (no carry)
C

Function
register f 7. .. .. .0 register f 7 . .. .. .0

40 f

RRNCF

f,d,a

68 f 54f 5C f 58 f 38f 66 f 18f

SETF

f,a

Set f

0xFF f

SUBFWB f,d,a SUBWF f,d,a

Subtract f from WREG WfC dest with Borrow Subtract WREG from f fW dest Subtract WREG from f fWC dest with Borrow Swap nibbbles of f Test f, skip if 0 Exclusive OR WREG with f f<3:0> dest<7:4>, f<7:4> dest<3:0> PC+4 PC, if f=0, else PC+2 PC W .XOR. f dest

SUBWFB f,d,a SWAPF TSTFSZ XORWF f,d,a f,a f,d,a

PIC18CXXX Core Special Function Register Files

PRODH PRODL TOSU TOSH TOSL STKPTR PCLATU PCLATH PCL TBLPTRU TBLPTRH TBLPTRL TABLAT INDF0 POSTINC0 POSTDEC0 PREINC0 PLUSW0 FSR0H FSR0L FF4 FF3 FFF FFE FFD FFC FFB FFA FF9 FF8 FF7 FF6 FF5 FEF FEE FED FEC FEB FEA FE9 INDF1 POSTINC1 POSTDEC1 PREINC1 PLUSW1 FSR1H FSR1L INDF2 POSTINC2 POSTDEC2 PREINC2 PLUSW2 FSR2H FSR2L WREG BSR STATUS INTCON INTCON2 INTCON3 FE7 FE6 FE5 FE4 FE3 FE2 FE1 FDF FDE FDD FDC FDB FDA FD9 FE8 FE0 FD8 FF2 FF1 FF0

ASCII Character Set

Most Significant Character Hex 0 1 2 3 Least Significant Character 4 5 6 7 8 9 A B C D E F SOH STX ETX EOT ENQ ACK Bell BS HT LF VT FF CR SO SI DC1 DC2 DC3 DC4 NAK SYN ETB CAN EM SUB ESC FS GS RS US 2 Space ! " # $ % & ( ) * + , . / 3 0 1 2 3 4 5 6 7 8 9 : ; < = > ? 4 @ A B C D E F G H I J K L M N O 5 P Q R S T U V W X Y Z [ \ ] ^ _ 6 a b c d e f g h i j k l m n o 7 p q r s t u v w x y z { | } ~ DEL

MPLIB Usage Format

MPLIB is invoked with the following syntax: mplib [/q] /{ctdrx} LIBRARY [MEMBER...] options: /c /t /d /r create library; list members; delete member; add/replace member; creates a new LIBRARY with the listed MEMBER(s) prints a table showing the names of the members in the LIBRARY deletes MEMBER(s) from the LIBRARY; if no MEMBER is specified the LIBRARY is not altered if MEMBER(s) exist in the LIBRARY, then they are replaced, otherwise MEMBER is appended to the end of the LIBRARY if MEMBER(s) exist in the LIBRARY, then they are extracted. If no MEMBER is specified, all members will be extracted no output is displayed

/x

extract member;

/q

quiet mode;

MPLIB Usage Examples

Suppose a library named dsp.lib is to be created from three object modules named fft.o, fir.o, and iir.o. The following command line would produce the desired results: mplib /c dsp.lib fft.o fir.o iir.o To display the names of the object modules contained in a library file names dsp.lib, the following command line would be appropriate: mplib /t dsp.lib