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COLLEGE OF ENGINEERING
PUTRAJAYA CAMPUS
FINAL EXAMINATION

SEMESTER 2 2010 / 2011


PROGRAMME : B. Eng Electrical & Electronics (Honours)
B. Eng Electrical Power (Honours)
B. Eng Mechanical (Honours)
SUBJECT CODE : EEEB113
SUBJECT : Circuit Analysis I

DATE : March 2011

TIME : (3 hours)





INSTRUCTIONS TO CANDIDATES:

1. This paper contains FIVE (5) questions in EIGHT (8) pages.

2. Answer ALL questions.

3. Write all answers in the answer booklet provided.

4. Write the answers to each question on a new page.

5. ALL steps and diagrams must be shown clearly in your answers.

6. A sheet of useful formula is included at the end of this paper as an Appendix on
Page 8.






THIS QUESTION PAPER CONSISTS OF 8 PRINTED PAGES INCLUDING THIS
COVER PAGE.
EEEB113, Semester 2 2010/2011
Page 2 of 8
QUESTION 1 [20 marks]

a) Use NODAL ANALYSIS to solve the circuit below.













Figure 1 for Question 1 (a)


i. Why do we need a reference node in nodal analysis? (2 marks)

ii. Write all the required equations in order to solve for all node voltages in the
circuit. (4 marks)

iii. Solve for all the node voltages in the circuit. (2 marks)

iv. Solve for voltage V
o
and current I
x
. (2 marks)





+




3V
0

12
3 A 4 15 V
+
V
0

+
3

I
x

EEEB113, Semester 2 2010/2011
Page 3 of 8
b) Use MESH ANALYSIS to solve the circuit below.


















Figure 2 for Question 1 (b)


i. Explain the difference between mesh current and branch current. (2 marks)

ii. Write all the required mesh equations in order to solve for all mesh currents in
the circuit. (4 marks)

iii. Solve for all the mesh currents in the circuit. (2 marks)

iv. Calculate the power supply by the 2A current source in the circuit. (2 marks)

4
5
2
2
2 V
+


+
10
8 V
i
2

i
1

i
3

2 A
EEEB113, Semester 2 2010/2011
Page 4 of 8
QUESTION 2 [20 marks]

For the circuit in Figure 3, find V
0
using:

a) Source transformation (10 marks)

b) Superposition. (10 marks)





Figure 3 for Question 2 (a) and (b)




EEEB113, Semester 2 2010/2011
QUESTION 3 [20 marks]

a) Figure 4 shows an operational amplifier connected as a difference amplifier. It can
be used for finding the difference of two voltages each multiplied by some constant
(determined by the resistors).

i. State the assumptions when using the ideal operational amplifier. (4 marks)

ii. Find the output voltage, v
0
if v
1
= 2V and v
2
= 4V. (8 marks)


Figure 4 for Question 3 (a)





b) For the voltage follower in Figure 5, find the current, i
x
, and the power absorbed
by the 30k resistor. (8 marks)









Figure 5 for Question 3 (b)


i
x

EEEB113, Semester 2 2010/2011
Page 6 of 8
QUESTION 4 [20 marks]

a) The circuit in Figure 6 is supplied with a voltage source of V
s
= 5u(t). The unit step
function u(t) is 0 for negative values of t and 1 for positive values of t.
i) What is the behavior of the capacitor under DC condition? (1 mark)
ii) Calculate the initial capacitor voltage, v(0

) (2 marks)
iii) Calculate the time constant, of the RC circuit when t > 0 (2 mark)
iv) Find v(t) for t > 0 (3 marks)
v) Calculate the value of v(t) at time t = 1 ms (2 marks)








Figure 6 for Question 4 (a)



b) The circuit in Figure 7 has reached steady state before the switch is closed at t = 0.
Find i(t) for t > 0.
(10 marks)







Figure 7 for Question 4 (b)

+

10 20
t = 0
10 V 1/10 F
i(t)
10 H
+

10 3
5 V
s
0.5 F v(t)
+

EEEB113, Semester 2 2010/2011
QUESTION 5 [20 marks]

a) For the following pairs of sinusoids, determine which one leads and by how much

i. v
1
(t) = 4cos(60t + 10) and v
2
(t) = 20cos(60t) (2 marks)

ii. v(t) = 10cos(4t 60) and i(t) = 4sin(4t + 50) (2 marks)





b) Transform the sinusoid to phasors and draw their corresponding phasor diagrams
separately.

i. v(t) = 10cos(4t 60) (2 marks)

ii. i(t) = 4cos(60t + 10) (2 marks)





c) Use the circuit below

i. Transform the circuit in Figure 8 from time domain to frequency domain
(4 marks)

ii. Solve for
o
(t) (8 marks)



Figure 8 for Question 5 (c)


-END OF QUESTION PAPER-
60 sin (200t) V
EEEB113, Semester 2 2010/2011
Page 8 of 8
APPENDIX: USEFUL FORMULA


DC CIRCUITS

1
st
order RL or RC circuits:

Source-free response: () = ()
-t:


Step response: () = () + |() - ()]
-t:



2
nd
order, RLC circuits:

Series RLC: o = I / ,
o
= VI /

Parallel RLC: o = () / ,
o
= VI /


When ( >
o
)

then circuit response is an overdamped response:

() =
1

S
1
t
+
2

S
2
t


When ( =
o
)

then circuit response is a critically damped response:

() = (
1
+
2
)
-ut


When ( <
o
)

then circuit response is an underdamped response:

() =
-ut
(
1
cos
d
+
2
sin
d
)


where
1,2
= -o _ o
2
-
o
2


d
=
o
2
- o
2



AC CIRCUITS

C
=

L
= I