DESIGN AND IMPLEMENTATION OF SIMPLE COMMUTATION METHOD MATRIX CONVERTER

MR. VEERADATE PIRIYAWONG

A THESIS SUBMITTED IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF MASTER OF SCIENCE IN ELECTRICAL POWER ENGINEERING SIRINDHORN INTERNATIONAL THAI-GERMAN GRADUATE SCHOOL OF ENGINEERING (TGGS) GRADUATE COLLEGE KING MONGKUT'S INSTITUTE OF TECHNOLOGY NORTH BANGKOK ACADEMIC YEAR 2007 COPYRIGHT OF KING MONGKUT'S INSTITUTE OF TECHNOLOGY NORTH BANGKOK

Name Thesis Title

: Mr.Veeradate Piriyawong : Design and Implementation of Simple Commutation Method Matrix Converter Major Field : Electrical Power Engineering King Mongkut's Institute of Technology North Bangkok Thesis Advisor : Dr.Teratam Bunyagul Mr.Khatathap Swatdipisal Academic Year : 2007 Abstract The indirect matrix converter is a converter with no energy storage dc-link. The lack of energy storage components in the dc-link is one of the advantages of the matrix converter. Furthermore, the matrix converter features full four-quadrant operation and sinusoidal input current. The output voltages ratio is limited to 0.866 of the input voltage. The indirect matrix converter needs six bidirectional switches in the rectification stage to connect with six unidirectional switches in the inversion stage. Bidirectional switches are not available on the market today and need to be constructed from semiconductor devices. Most research work about matrix converters has so far regarded the modulation and control of the matrix converter. The practical experience is still very limited. In this thesis presents a indirect matrix converter using simple commutation method base on AC/DC/AC converter. It combines the control method between the rectification stage and the inversion stage which can largely simplified modulation in rectification stage and all bidirection switches at line side turn on and turn off at zero current. MATLAB/Simulink modeling and simulation of the three-phase indirect matrix converter feeding a various load (R, RL, RC and induction motor) was carried out. This model has been performed with four kHz switching frequency. The model has been designed to support the implementation with a DSP control board and commutation bidirectional switches by FPGA board for which each bidirectional switch consists of two mosfets and two internal diodes in a common source configuration. The experimental results of various loads, the input line current, output phase voltage waveforms are presented with their spectra to confirm the input currents has sinusoidal and maximum output voltage per input voltage ratio is 0.866 with regard to operation under balance and undistorted supply voltage. (Total 75 pages) Keywords : Indirect matrix converter, Simple commutation method, Openloop control, Various Load

__________________________________________________________________________Advisor

ii

: : : : . : 2550

0.866 / (, , )

iii

 , 0.866 ( 75 ) : , , ,

____________________________________________________
iv

ACKNOWLEDGEMENTS I would like to thank my advisor, Dr. Teratam Bunyagul, for his help and guidance during my graduate studies at King Mongkuts Institute of Technology North Bangkok. Im also very grateful to Mr. Khatathap Swatdipisal for his valuable advice on the framework of this thesis, his continued guidance and support during the completion of the work, and his careful review of the results. His impressive knowledge, technical skills and human qualities have been a source of inspiration and a model for me to follow. Im thankful for the opportunity to be a staff of the Electrical Machines and Drives System Laboratory and to watch it grow into the Modern Power electronics and Drive Control Group (MPED). It has been a memorable experience, both professionally and personally. I would also like to acknowledge MPED group students for working with me on the thesis, and all others who made my work and my stay in MPED more enjoyable. Especially, I would like to express deep gratitude to my mother who have provided endless encouragement and support.

Veeradate Piriyawong

TABLE OF CONTENTS Page Abstract (in English) ii Abstract (in Thai) iii Acknowledgements v List of Tables vii List of Figures viii List of Abbreviation and Symbols xi Chapter 1 Introduction 1 1.1 Propose of the study 1 1.2 Scope of the study 1 1.3 Method 1 1.4 Tools 2 1.5 Utilization of the study 2 Chapter 2 Fundamental of matrix converter 3 2.1 Literature survey 3 2.2 Theory of matrix converter 4 2.3 The input filter 14 2.4 The clamp circuit 14 2.5 The bidirectional switch 15 2.6 Current commutation 16 2.7 Motivation of this work 22 Chapter 3 Design of indirect matrix converter with simple commutation method 21 3.1 PWM method for rectifier side 24 3.2 Basic space vector pwm method 26 3.3 Pulse width method for inverter side 31 3.4 Waveforms of both input current and output voltage 33 3.5 Four step commutate method 34 3.6 Clamp circuit design 41 3.7 Input filter design 44 Chapter 4 Simulation and experimental results 46 4.1 The simulation of indirect matrix converter 46 4.2 The simulation results and experimental result of four step commutate 48 4.3 The hardware of indirect matrix converter 50 4.4 The simulation and experimental results of Rload 52 4.5 The simulation and experimental results of RLload 55 4.6 The simulation and experimental results of RCload 59 4.7 The simulation and experimental results of motor 62 Chapter 5 Conclusion 66 5.1 Conclusion 66 5.2 Future work 67 References 68 Appendix A ECTI conference 2006 70 Biography 75

vi

LIST OF TABLES Table 3-1 3-2 3-3 3-4 3-5 Page 26 27 28 35 39

The duty cycle d1, d2 and switching pattern Device on/off patterns and resulting instantaneous voltage of a 3-phase power inverter Switching patterns, corresponding space vectors and their (d-q) components Non-hazardous combinations of devices state List of legal device state combinations for three-input to one-output direct AC-AC converter

vii

LIST OF FIGURES Figure 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8 2-9 2-10 2-11 2-12 2-13 2-14 2-15 3-1 3-2 3-3 3-4 3-5 3-6 3-7 3-8 3-9 3-10 3-11 3-12 3-13 3-14 3-15 Simplified circuit of a 3 3 Matrix Converter General form of switching pattern Illustrating maximum voltage ratio of 50% Illustrating voltage ratio improvement to 87% Output voltage space vectors Example of output voltage space vector synthesis Possible way of allocating states within switching sequence Diode bridge bi-directional switch cell Switch cell (a) common emitter back-to-back(b)common collector back to back A basic current commutation (a) avoid short circuit input lines (b) avoid open circuits output lines Two phase to single phase matrix converter Four step semi-soft current commutation between two bidirectional switch cells Two step semi-soft current commutation between two bi-directional switch cells Two step semi-soft current commutation with current sign detection within the switch cell Voltage based current commutation Diagram of indirect matrix converter Power circuit topology for a three-phase VSI Power bridge for a three-phase VSI Basic space vectors Projection of the reference voltage vector PWM sequence for the proposed converter The space vector PWM converter General commutation circuit of two bi-directional switches Four-step switching diagram for two bi-directional switches Four-step switching diagram for three bi-directional switches Switching diagram for three bi-directional switches 12-patch switching state scheduler Two way selector circuit Clamp circuit Discharging of the induction machine inductances to the clamp capacitor during fault situation (a) Equivalent model motor and induction motor (b) Current in induction motor Single phase RLC analysis Bode plot no-load The simulation by MATLAB / Simulink (a) The overall simulation system (b) The rectification stage (c) The inversion stage (d) the control unit The circuit simulation using MATLAB/Simulink Overall circuit configuration of switch sequencer Page 5 6 8 9 11 12 13 16 16 17 18 19 20 21 22 23 26 27 29 30 32 32 34 36 37 38 40 41 41

3-16 3-17 4-1

43 44 45

4-2 4-3

46 47 48

viii

LIST OF FIGURES (CONTINUED) Figure 4-4 The three phase input signal of commutation circuit 4-5 The simulation results of the three phase to one sequencer 4-6 The simulation results of the three phase to one sequencer in xilinx software 4-7 The experimental results of four step commutation method (a)The current sign is negative (b)The current sign is positive 4-8 The picture of experiment (a) Overall system (b) The rectification stage (c) The picture of inversion stage (d) The control unit 4-9 The waveform of VAf and VA operated with Rload (a) Simulation results of VAf and VA (b) Experimental results of VA (c) Experimental results of VAf. 4-10 The waveform of VA and iA operated with Rload (a) Simulation results of VA and iA*15 (b) Experimental results of VA and iA 4-11 The waveform of iA FFT operated with Rload (a) Simulation results of iA FFT (b) Experimental results of iA FFT 4-12 The waveform of Vdc operated with Rload (a) Simulation results of Vdc (b) Experimental results of Vdc 4-13 The waveform of ia and Van operated with Rload (a) Simulation results of ia and Van (b) Experimental results of ia and Van 4-14 The FFT of iA operated with Rload (a) Simulation results of ia FFT (b) Experimental results of ia FFT 4-15 The FFT of Van operated with Rload (a) Simulation results of Van FFT(b) Experimental results of Van FFT 4-16 The waveform of Vab operated with Rload (a) Simulation results of Vab (b) Experimental result of Vab 4-17 The waveform of VA and VAf operated with RLload (a) Simulation results of VAf and VA (b) Experimental results of VA (c) Experimental results of VAf. 4-18 The waveform of VA and iA operated with RLload (a) Simulation results of VA and iA*15 (b) Experimental results of VA and iA 4-19 The waveform of iA FFT operated with RLload (a) Simulation results of iA FFT (b) Experimental results of iA FFT 4-20 The waveform of Vdc operated with RLload (a) Simulation results of Vdc (b) Experimental results of Vdc 4-21 The waveform of ia and Van operated with RLload (a) Simulation results of ia and Van (b) Experiment results of ia and Van 4-22 The waveform of ia FFT operated with RLload (a) Simulation results of ia FFT (b) Experimental results of ia FFT 4-23 The waveform of Van FFT operated with RLload (a) Simulation results of Van FFT (b) Experimental results of Van FFT 4-24 The waveform of Vab operated with RLload (a) Simulation results of Vab (b) Experimental results of Vab 4-25 The waveform of VA and VAf operated with RCload (a) Simulation results of VAf and VA (b) Experimental results of VA (c) Experimental results of VAf. Page 49 49 50 50 52 53 53 53 54 54 55 55 55 56 57 57 57 58 58 58 59 59

ix

LIST OF FIGURES (CONTINUED) Figure 4-26 The waveform of VA and iA operated with RCload (a) Simulation results of VA and iA*15 (b) Experimental results of VA and iA 4-27 The waveform of iA FFT operated with RCload (a) Simulation results of iA FFT (b) Experimental results of iA FFT 4-28 The waveform of Vdc operated with RCload (a) Simulation results of Vdc (b) Experimental results of Vdc 4-29 The waveform of ia and Van operated with RCload (a) Simulation results of ia and Van (b) Experiment results of ia and Van 4-30 The waveform of ia FFT operated with RCload (a) Simulation results of ia FFT (b) Experimental results of ia FFT 4-31 The waveform of Van FFT operated with RCload (a) Simulation results of Van FFT (b) Experimental results of Van FFT 4-32 The waveform of Vab operated with RCload (a) Simulation results of Vab (b) Experimental results of Vab 4-33 The waveform of VA and VAf operated with motor (a) Simulation results of VAf and VA (b) Experimental results of VA (c) Experimental results of VAf. 4-34 The waveform of VA and iA operated with motor (a) Simulation results of VA and iA*15 (b) Experimental results of VA and iA 4-35 The waveform of iA FFT operated with motor (a) Simulation results of iA FFT (b) Experimental results of iA FFT 4-36 The waveform of Vdc operated with motor (a) Simulation results of Vdc (b) Experimental results of Vdc 4-37 The waveform of ia and Van operated with motor (a) Simulation results of ia and Van (b) Experiment results of ia and Van 4-38 The waveform of ia FFT operated with motor (a) Simulation results of ia FFT (b) Experimental results of ia FFT 4-39 The waveform of Van FFT operated with motor (a) Simulation results of Van FFT(b) Experimental results of Van FFT 4-40 The waveform of Vab operated with motor (a) Simulation results of Vab (b) Experimental results of Vab Page 60 60 61 61 61 62 62

63 63 64 64 64 65 65 65

LIST OF ABBREVIATION AND SYMBOLS PWM MC DMC CMC VM IMC SCM BDS DSP FPGA SVM PSB VSI CSI FOC R L C Pulse Width Modulation Matrix Converter Direct Matrix Converter Convenional Matrix Converter Venturinis Method Indirect Matrix converter Simple Commutation Method Bi-Directional Switch Digital Signal Processor Field Programable Gate Array Space Vector Modulation Power System Blockset Voltage Source Inverter Current Source Inverter Field Oriented Control Resistor Inductor Capacitor

xi

CHAPTER 1 INTRODUCTION
The direct matrix converter (DMC) is a development of the cycloconverter which uses nine bidirectional switches so arranged that any of three input phases can be connected to any output phase. The voltage at any input terminal may be made to appear at any output terminal while the current in any phase of load may be drawn from any phase or phases of the input supply. With initial progress reported by Venturini and Alesina in 1980. This method was further modified to increase output to input voltage transfer ratio from 0.5 to 0.866. In Venturinis method (VM) a desired set of three-phase output voltage may be synthesized from a given set of three phase input sinusoidal voltages by sequential piecewise sampling. The indirect matrix converter (IMC) has received considerable attention as it provides a good alternative to double-sided PWM voltage source rectifier-inverter having advantage of being a two stage converter with six bidirectional switches and six one directional for three phase to three phase conversion and inherent bidirectional power flow, sinusoidal input/output waveforms with modulate switching frequency, the possibility of compact design due to the absence of dc-link reactive components and controllable input power factor independent of output load current. The main disadvantages of matrix converter are the inherent restriction of the voltage transfer ratio (0.866), more complex control and protection strategy. This master thesis deals with the indirect matrix converter control strategy by using simple commutation method (SCM) for simulation of MATLAB/Simulink with regard to operation under balance and undistorted supply voltage. A novel of simple commutation method algorithm was developed and implemented using digital signal processor TMS320F2812. A prototype indirect matrix converter was constructed to verify performance of modulator. The output voltage and the input current waveforms generated by the matrix converter. 1.1 Propose of the study 1.1.1 To model and simulate by using SCM. 1.1.2 To analysis input and output of SCM. 1.1.3 To implement on DSP. 1.1.4 To implement commutation method on FPGA. 1.1.5 To integrate hardware and software of matrix converter. 1.2 Scope of the study 1.2.1 Modeling, simulation matrix converter by using SCM. 1.2.2 Construct hardware prototype of matrix converter. 1.3 Method 1.3.1 Study in indirect control technique in simple commutation method. 1.3.2 Modeling and simulation indirect matrix converter in MATLAB/Simulink 1.3.3 Analysis the result of input and output harmonics in matrix converter.

2 1.3.4 1.3.5 1.3.6 1.3.7 Implement from simulation to Digital Signal Processor. Implement bidirectional switches sequence in FPGA. Construct matrix converter hardware. Integrate all matrix converter system.

1.4 Tools 1.4.1 Personal computer 2.4GHz or higher, RAM minimum 512MB. 1.4.2 MATLAB/Simulink software. 1.4.3 DSP TMS320F2812 Board 1.4.4 FPGA Spartan III 1.5 Utilization of the study 1.5.1 The control technique of simple commutation method. 1.5.2 The software simulation for indirect matrix converter by using SCM. 1.5.3 The knowledge of implementation in Digital Signal Processor. 1.5.4 The knowledge of implementation in FPGA. 1.5.5 The practical circuit of matrix converter.

CHAPTER 2 FUNDAMENTAL OF MATRIX CONVERTER The purpose of this chapter is to give a review of key aspects concerning matrix converter operation and to establish the state of the art of this technology. It begins by studying the topology of the Matrix Converter, the main control techniques, the practical implementation of bi-directional switches and commutation strategies. 2.1 Literature survey The Matrix Converter is a forced commutated converter which uses an array of controlled bidirectional switches as the main power elements to create a variable output voltage system with unrestricted frequency. It does not have any dc-link circuit and does not need any large energy storage elements. The matrix converter is an array of bidirectional switches as the main power elements, which interconnects directly the power supply to the load, without using any dc-link or large energy storage elements. The most important characteristics of matrix converters are 1) simple and compact power circuit 2) generation of load voltage with arbitrary amplitude and frequency 3) sinusoidal input and output currents 4) operation with unity power factor 5) regeneration capability. These highly attractive characteristics are the reason for the tremendous interest in this topology. The key element in a matrix converter is the fully controlled four quadrant bidirectional switch, which allows high frequency operation. The early work dedicated to unrestricted frequency changers used thyristors with external forced commutation circuits to implement the bi-directional controlled switch [1, 2]. With this solution the power circuit was bulky and the performance was poor.The introduction of power transistors for implementing the bidirectional switches made the matrix converter topology more attractive [3, 4, 5]. However, the real development of matrix converters starts with the work of Venturini and Alesina published in 1980 [6, 7]. They presented the power circuit of the converter as a matrix of bi-directional power switches and they introduced the name Matrix Converter. One of their main contributions is the development of a rigorous mathematical analysis to describe the low-frequency behavior of the converter, introducing the low frequency modulation matrix concept. In their modulation method, also known as the direct transfer function approach, the output voltages are obtained by the multiplication of the modulation (also called transfer) matrix with the input voltages.A conceptually different control technique based on the fictitious dc link idea was introduced by Rodriguez in 1983 [8]. In this method the switching is arranged so that each output line is switched between the most positive and most negative input lines using a PWM technique, as conventionally used in standard voltage source inverters. This concept is also known as the indirect transfer function approach [9]. In 1985/86, Ziogas et al published 2 papers [10, 11] which expanded on the fictitious dc link idea of Rodriguez and provided a rigorous mathematical explanation. In 1983 Braun [12] and in 1985 Kastner and Rodriguez [13] introduced the use of space vectors in the analysis and control of matrix converters. In 1989, was published the first of a series of the papers [14, 15, 16, 17, 18, 19] in which principles of the Space Vector Modulation (SVM) were applied to the matrix converter with the

4 modulation problem [20]. The modulation methods based on the Venturini approach, are known as direct methods, while those based on the fictitious dc link are known as indirect methods It was experimentally confirmed by Kastner and Rodriguez in 1985 and Neft and Schauder in 1992 that a matrix converter with only 9 switches can be effectively used in the vector control of an induction motor with high quality input and output currents. However, the simultaneous commutation of controlled bidirectional switches used in Matrix Converters is very difficult to achieve without generating overcurrent or overvoltage spikes that can destroy the power semiconductors. This fact limited the practical implementation and negatively affected the interest in Matrix Converters. Fortunately, this major problem has been solved with the development of several multistep commutation strategies that allow safe operation of the switches. In 1989 Burany introduced the later named semi-soft current commutation technique. Other interesting commutation strategies were introduced by Ziegler et al and Clare and Wheeler in 1998. Today the research is mainly focused on operational and technological aspects: reliable implementation of commutation strategies [21]; protection issues [22, 23]; implementation of bidirectional switches and packaging [24, 25]; operation under abnormal conditions; ride-through capability [26] and input filter design [27, 28]. 2.2 Theory of matrix converter 2.2.1 Fundamental The Matrix Converter is a single stage converter which has an array of m n bidirectional power switches to connect, directly, an m-phase voltage source to an nphase load. The Matrix Converter of 3 3 switches, shown in Figure 2-1, has the highest practical interest because it connects a three-phase voltage source with a three-phase load, typically a motor.Normally, the matrix converter is fed by a voltage source and for this reason, the input terminals should not be short-circuited. On the other hand, the load has typically an inductive nature and for this reason an output phase must never be opened. Defining the switching function of a single switch as
1, switch SKj closed S Kj = K = {A, B, C} j = {a, b, c} 0, switch SKj open

Eq.2-1

The constraints discussed above can be expressed by

S Aj + S Bj + SCj = 1

j = {a, b, c}

Eq.2-2

With these restrictions, the 3 3 Matrix Converter has 27 possible switching states.

5
vA A vB 0 B iB iA SAa

vC C iC va ia vb ib vc ic

FIGURE 2-1 Simplified circuit of a 3 3 Matrix Converter.

The load and source voltages are referenced to the supply neutral, 0 in the Figure 2-1, and can be expressed as vectors defined by:

va (t ) Vo = vb (t ) vc (t )

v A (t ) ; Vi = vB (t ) vC (t )

Eq.2-3

The relationship between load and input voltages can be expressed as:
va (t ) S Aa (t ) S Ba (t ) SCa (t ) v A (t ) v (t ) = S (t ) S (t ) S (t ) v (t ) Bb Cb b Ab B vc (t ) S Ac (t ) S Bc (t ) SCc (t ) vC (t ) Vo = T Vi Where T is the instantaneous transfer matrix. In the same form, the following relationships are valid for the input and output currents:
ia (t ) io = ib (t ) ic (t ) iA (t ) ; ii = iB (t ) iC (t ) Eq.2-5

Eq.2-4

6 ii = T T io Where T T is the transpose matrix of T . Eq.2-4 and Eq.2-6 give the instantaneous relationships between input and output quantities. To derive modulation rules, it is also necessary to consider the switching pattern that is employed. This typically follows a form similar to that shown in the Figure 2-2.
SAa=1 tAa SBa =1 tBa SCa=1 tCa

Eq.2-6

Output phase a

SAb=1 tAb SAc=1 tAc T

SBb=1 tBb SBc=1 tBc (sequence time)

SCb=1 tCb SCc=1 tCc

Output phase b

Output phase c Repeats

seq

FIGURE 2-2 General form of switching pattern.

By considering that the bidirectional power switches work with high switching frequency, a low frequency output voltage of variable amplitude and frequency can be generated by modulating the duty cycle of the switches using their respective switching functions. Let mKj (t) be the duty cycle of switch SKj, defined as mKj(t)=tKj/Tseq, which can have the following values

0 < mKj < 1

K = {A, B, C } j = {a, b, c}

Eq.2-7

The low-frequency transfer matrix is defined by

mAa (t ) mBa (t ) mCa (t ) M (t ) = mAb (t ) mBb (t ) mCb (t ) mAc (t ) mBc (t ) mCc (t )

Eq.2-8

The low-frequency component of the output phase voltage is given by Vo (t ) = M (t ) Vi (t ) Eq.2-9

7 The low-frequency component of the input current is ii = M T (t ) io Eq.2-10

2.2.2 Basic modulation solution The modulation problem normally considered for the matrix converter can be stated as follows: Given a set of input voltages and an assumed set of output currents
cos(i t ) cos(o t + o ) cos( t + 2 / 3) , i = I cos( t + + 2 / 3) , Vi = Vim i om o o o cos(i t + 4 / 3) cos(o t + o + 4 / 3)

Eq.2-11

find a modulation matrix M(t) such that

cos(o t ) cos(i t + i ) cos( t + 2 / 3) , i = q cos( ) I cos( t + + 2 / 3) Eq.2-12 Vo = qVim o o om i i i cos(o t + 4 / 3) cos(i t + i + 4 / 3)

and that the constraint Eq.2-2 is satisfied. In Eq.2-12 q is the voltage gain between the output and input voltages. There are 2 basic solutions:
1 + 2q cos(mt 2 / 3) 1 + 2q cos(mt 4 / 3) 1 + 2q cos(mt ) 1 1 + 2q cos(mt ) 1 + 2q cos(mt 2 / 3) M 1 = 1 + 2q cos(mt 4 / 3) 3 1 + 2q cos(mt 2 / 3) 1 + 2q cos(mt 4 / 3) 1 + 2q cos(mt )

Eq.2-13 With m = (o i ) and 1 + 2q cos(mt 2 / 3) 1 + 2q cos(mt 4 / 3) 1 + 2q cos(mt ) 1 1 + 2q cos(mt ) M 2 = 1 + 2q cos(mt 2 / 3) 1 + 2q cos(mt 4 / 3) 3 1 + 2q cos(mt 4 / 3) 1 + 2q cos(mt ) 1 + 2q cos(mt 2 / 3) with m = (o + i ) Eq.2-14

The solution in Eq.2-13 yields i = o giving the same phase displacement at the input and output ports whereas the solution in Eq.2-14 yields i = -o giving reversed phase displacement. Combining the two solutions provides the means for input displacement factor control.This basic solution represents a direct transfer function approach and is characterised by the fact that, during each switch sequence time (Tseq), the average output voltage is equal to the demand (target) voltage. For this to be possible it is clear that the target voltages must fit within the input voltage envelope for any output frequency. This leads to a limitation on the maximum voltage ratio.

8 2.2.3 Voltage ratio limitation and optimisation The modulation solutions in Eq.2-13 and Eq.2-14 have a maximum voltage ratio q of 50% as illustrated in Figure 2-3.
1.2 PU 0.8 0.4 0 -0.4 -0.8 -1.2 0 120 240
o

Input voltage

Target output voltages

360

FIGURE 2-3 Illustrating maximum voltage ratio of 50%

An improvement in the achievable voltage ratio to 3/2 or 87 % is possible by adding common mode voltages to the target outputs as shown in equation Eq.2-15.
cos(ot ) 1 cos(3o t ) + 2 1 3 cos(3i t ) 6 Vo = qVim cos(ot + 2 / 3) 1 cos(3ot ) + 2 1 3 cos(3i t ) 6 1 1 cos(ot + 4 / 3) 6 cos(3ot ) + 2 3 cos(3i t )

Eq.2-15

The common mode voltages have no effect on the output line to line voltages, but allow the target outputs to fit within the input voltage envelope with a value of q up to 87% as illustrated in Figure 2-4.
1.2 PU 0.8 0.4 0 -0.4 -0.8 -1.2 0 120 240
o

Input voltage

Target output

360

FIGURE 2-4 Illustrating voltage ratio improvement to 87%

9 The improvement in voltage ratio is achieved by redistributing the null output states of the converter (all output lines connected to the same input line) and is analagous to the similar well established technique in conventional dc link PWM converters. It should be noted that a voltage ratio of 87% is the intrinsic maximum for any modulation method where the target output voltage equals the mean output voltage during each switching sequence. 2.2.4 Venturini modulation methods The first method attributable to Venturini is defined by equations Eq.2-13 and Eq.2-14. However, calculating the switch timings directly from these equations is cumbersome for a practical implementation. They are more conveniently expressed directly in terms of the input voltages and the target output voltages (assuming unity displacement factor) in the form of Eq.2-16.
m Kj = t Kj Tseq = 1 2v K v j 1 + 2 3 Vim for K = A, B, C and j = a, b, c Eq.2-16

This method is of little practical significance because of the 50% voltage ratio limitation.Venturinis optimum method employs the common mode addition technique defined in equation Eq.2-15 to achieve a maximum voltage ratio of 87%. The formal statement of the algorithm, including displacement factor control, in Venturinis key paper is rather complex and appears unsuited for real time implementation. In fact, if unity input displacement factor is required then the algorithm can be more simply stated in the form of Eq.2-17. 1 2v v 4q mKj = 1 + K 2 j + sin(i t + K ) sin(3i t ) 3 Vim 3 3 for K = A, B, C and j = a, b, c K = 0,2 /3,4 /3 for K = A,B,C respectively

Eq.2-17

Note that in Eq.2-17, the target output voltages, vj, include the common mode addition defined in Eq.2-15. In Eq.2-17 provides a basis for real-time implementation of the optimum amplitude Venturini method which is readily handled by processors up to sequence (switching) frequencies of tens of kHz. Input displacement factor control can be introduced by inserting a phase shift between the measured input voltages and the voltages, vK, inserted into Eq.2-17. However, like all other methods, displacement factor control is at the expense of maximum voltage ratio. 2.2.5 Scalar modulation methods The scalar modulation method of Roy [29, 30] is typical of a number of modulation methods which have been developed where the switch actuation signals are calculated directly from measurements of the input voltages. The motivation behind their development is usually given as the perceived complexity of the Venturini method. The scalar method relies on measuring the instantaneous input voltages and comparing their relative magnitudes following the algorithm below. Rule1: Assign subscript M to the input which has a different polarity to the other two.

10 Rule2: Assign subscript L to the smallest (absolute) of the other two inputs. Third input is assigned subscript K The modulation duty cycles are then given by: , mMj = 1 (mLj + mKj ) Eq.2-18 2 1.5V 1.5Vim for j = a, b, c Again, common mode addition is used with the target output voltages, vj, to achieve 87% voltage ratio capability.Despite the apparent differences, this method yields virtually identical switch timings to the optimum Venturini method. Expressed in the form of Eq.2-17 the modulation duty cycles for the scalar method are given in Eq.2-19.
2 im

mLj =

( v j vM ) v L

, mKj =

( v j vM ) v K

1 2v K v j 2 mKj = 1 + + sin(i t + K ) sin(3i t ) 2 3 3 Vim

Eq.2-19

At maximum output voltage (q = 3/2), equations Eq.2-17 and Eq.2-19 are identical. The only difference between the methods is that the rightmost term addition is taken pro-rata with q in the Venturini method and is fixed at its maximum value in the scalar method. The effect on output voltage quality is negligible except at low switching frequencies where the Venturini method is superior. 2.2.6 Space vector modulation methods The space vector method (SPVM) is well known and established in conventional PWM inverters. Its application to matrix converters is conceptually the same, but is more complex. With a matrix converter, the SVM can be applied to output voltage and input current control. A comprehensive discussion of the SVM and its relationship to other methods is provided in another paper in this issue. Here we just consider output voltage control to establish the basic principles.The voltage space vector of the target matrix converter output voltages is defined in terms of the line to line voltages by Eq.2-20.

Vo (t ) =

2 ( vab + avbc + a 2vca ) where a = exp( j 2 / 3) 3

Eq.2-20

In the complex plane, Vo (t ) is a vector of constant length (3qVim) rotating at angular frequency o. In the SVM, Vo (t ) is synthesised by time averaging from a selection of adjacent vectors in the set of converter output vectors in each sampling period. For a matrix converter, the selection of vectors is by no means unique and a number of possibilities exist which are not discussed in detail here.

11
Imag

vbc

vab = 0 Grp IIa

1
vca = 0 Grp IIc

vbc = 0 Grp IIb

vab

Real

3
vbc = 0 Grp IIb

5
vca = 0 Grp IIc

4
vab = 0 Grp IIa

vca

FIGURE 2-5 Output voltage space vectors

The twentyseven possible output vectors for a three-phase Matrix Converter can be classified into three groups with the following characteristics: Group I: each output line is connected to a different input line. Output space vectors are constant in amplitude, rotating (in either direction) at the supply angular frequency. Group II: two output lines are connected to a common input line, the remaining output line is connected to one of the other input lines. Output space vectors have varying amplitude and fixed direction occupying one of six positions regularly spaced 600 apart. The maximum length of these vectors is 2/3Venv where Venv is the instantaneous value of the rectified input voltage envelope. Group III: all output lines are connected to a common input line. Output space vectors have zero amplitude (ie located at the origin). In the SVM, the group I vectors are not used. The desired output is synthesised from the group II active vectors and the group III zero vectors. The hexagon of possible output vectors is shown in Figure 2-5, where the group II vectors are further sub-divided dependent on which output line to line voltage is zero. Figure 2-6 shows an example of how Vo (t ) could be synthesised when it lies in the sextant between vector 1 and vector 6. Vo (t ) is generated through time averaging by choosing the time spent in vector 1 (t1) and vector 6 (t6) during the switching sequence. Here it is

12 assumed that the maximum length vectors are used, although that does not have to be the case. From Figure 2-6 the relationship in Eq.2-21 is found. t1 =
Vo Tseq sin(), Venv

t6 =

Vo Tseq sin(60 ), Venv

t0 = Tseq (t1 + t6 )

Eq.2-21

where t0 is the time spent in the zero vector (at the origin). 2/3Venv

Vo

2/3Venv

6
2/3Venv t1 /Tseq
60o

2/3Venv t6/Tseq

FIGURE 2-6 Example of output voltage space vector synthesis

There is no unique way for distributing the times (t1, t6, t0) within the switching sequence. One possible method is shown in Figure 2-7.

t1/2

t6/2

t0

t6/2

t1/2

Tseq

FIGURE 2-7 Possible way of allocating states within switching sequence

For good harmonic performance at the input and output ports it is necessary to apply the SVM to input current control and output voltage control. This generally requires four active vectors in each switching sequence, but the concept is the same. Under balanced input and output conditions, the SVM technique yields similar results

13 to the other methods mentioned earlier. However, the increased flexibility in choice of switching vectors for both input current and output voltage control can yield useful advantages under unbalanced conditions. 2.2.7 Indirect modulation methods These methods aim to increase the maximum voltage ratio above the 86.6% limit of other methods. To do this the modulation process defined in Eq.2-9 is split into two steps as indicated in Eq.2-22. Vo = ( AVi ) B Eq.2-22

In Eq.2-22, pre-multiplication of the input voltages by A generates a fictitious DC link and post multiplication by B generates the desired output by modulating the fictitious DC link. A is generally referred to as the rectifier transformation and B as the inverter transformation due to the similarity in concept with a traditional rectifier/DC link/inverter system. A is given by Eq.2-23.
T cos(i t ) A = K A cos(i t + 2 / 3) cos(i t + 4 / 3)

Eq.2-23

Hence:
T cos(i t ) cos(i t ) cos( t + 2 / 3) cos( t + 2 / 3) = 3K AVim AVi = K AVim i i 2 cos(i t + 4 / 3) cos(i t + 4 / 3)

Eq.2-24

B is given by (2-25).
cos(ot ) cos( t + 2 / 3) = KB o cos(ot + 4 / 3)

Eq.2-25

Hence:
cos(ot ) 3K A K BVim Vo = ( AVi ) B = cos(ot + 2 / 3) 2 cos(ot + 4 / 3)

Eq.2-26

The voltage ratio q = 3KAKB/2. Clearly the A and B modulation steps are not continuous in time as shown above but must be implemented by a suitable choice of the switching states.To maximise the voltage ratio the step in A is implemented so that the most positive and most negative input voltages are selected continuously. This yields KA = 23/ with a fictitious DC link of 33Vim/ (the same as a 6-pulse

14 diode bridge with resistive load). KB represents the modulation index of a PWM process and has the maximum value (squarewave modulation) of 2/ . The overall voltage ratio q therefore has the maximum value of 63/2 = 105.3%.The voltage ratio obtainable is obviously greater than that of other methods but the improvement is only obtained at the expense of the quality of either the input currents, the output voltages or both. For values of q > 0.866, the mean output voltage no longer equals the target output voltage in each switching interval. This inevitably leads to low frequency distortion in the output voltage and/or the input current compared to other methods with q < 0.866. For q < 0.866, the indirect method yields very similar results to the direct methods.
2.3 The Input Filter This has to reduce the input current ripple with minimum installed energy on the reactive elements. The most used topology is an LC series circuit. The use of more complex topologies has been recommended in the literature in order to achieve higher attenuation at the switching frequency, but they are not practical. The design of the input filter has to accomplish the following: Produce an input filter with a cutoff frequency lower than the switching frequency,Where Lin, Cin are the value of the inductance and the capacitor of the input filter and is the resonance pulsation of the input filter. Maximize the displacement angle for a given minimum output power where is the input active power (considering a close to unity power factor at full load); are the rated input phase voltage and current of the converter; is the minimum power level where the displacement angle reaches its limit ad is the pulsation of the power grid. Minimize the input filter volume or weight for a given reactive power, by taking into account the energy densities which are different for film capacitors than for iron chokes where capacitor are the installed VA in reactive components and Minimize the voltage drop on the filter inductance at the rated current in order to provide the highest voltage transfer ratio:where is the drop in voltage magnitude due to the influence of the input filter and is the filter inductance in p.u. Usually, the cutoff frequency of the LC input filter is chosen to provide a given attenuation at the switching frequency 2.4 The Clamp Circuit Similar to standard diode bridge VSI, the matrix converter topology needs to be protected against overvoltage and overcurrent. Furthermore, this topology is more sensitive to disturbances and therefore more susceptible to failures due to the lack of an energy storage element in the dc link. Disturbances, which may cause hardware failures, are: Faulty interswitch commutation, such as internal short circuit of the mains or disconnecting the circuit of the motor currents Shutdown of the matrix converter during an overcurrent situation on the motor side Possible overvoltage on the input side caused by the converter power-up or by voltage sags The protection issues for matrix converters have received increased attention, in order to build a reliable prototype. A solution to solve some of the problems consists

15 of connecting a clamp circuit on the output side one patent being issued for the necessity of clamping the output lines. The clamp circuit consists of a B6 fast recovery diode rectifier and a capacitor to store the energy accumulated in the inductance of the load, caused by the output currents. The worst case regarding the energy level stored in the leakage inductance occurs when the output current reaches the overcurrent protection level, causing a converter shutdown. Transferring the energy safety from the leakage inductance in the clamp capacitor gives the design criteria for choosing the value of the capacitance: Where is the current level which triggers the overcurrent protection, is the overall leakage inductance of the induction motor, is the value of the clamp capacitor, and is the maximum allowable overvoltage.
2.5 The bidirectional switch The matrix converter requires a bi-directional switch capable of blocking voltage and conducting current in both directions. Unfortunately there are no such devices currently available, so discrete devices need to be used to construct suitable switch cells. 2.5.1 Realization with discrete semiconductors The diode bridge bi-directional switch cell arrangement consists of an IGBT at the center of a single-phase diode bridge [19] arrangement as shown in Figure 2-8. The main advantage is that both current directions are carried by the same switching device, therefore only one gate driver is required per switch cell. Device losses are relatively high since there are three devices in each conduction path. The direction of current through the switch cell cannot be controlled. This is a disadvantage, as many of the advanced commutation methods described later require this.

FIGURE 2-8 Diode bridge bi-directional switch cell

16

FIGURE 2-9 Switch cell (a) Common emitter back-to-back (b) Common collector back to back.

The common emitter bi-directional switch cell arrangement consists of two diodes and two IGBTs connected in anti-parallel as shown in Figure 2-9(a). The diodes are included to provide the reverse blocking capability. There are several advantages in using this arrangement when compared to the previous example. The first is that it is possible to independently control the direction of the current. Conduction losses are also reduced since only two devices carry the current at any one time. One possible disadvantage is that each bi-directional switch cell requires an isolated power supply for the gate drives. The common collector bi-directional switch cell arrangement is shown in Figure 2-9(b). The conduction losses are the same as for the common emitter configuration. An often quoted advantage of this method is that only 6 isolated power supplies are needed to supply the gate drive signals. However, in practice, other constraints such as the need to minimise stray inductance mean that operation with only six isolated supplies is generally not viable. Therefore the common emitter configuration is generally preferred for creating the matrix converter bi-directional switch cells.Both the common collector and common emitter configurations can be used without the central common connection, but this connection does provide some transient benefits during switching. In the common emitter configuration the central connection also allows both devices to be controlled from one isolated gate drive power supply.
2.6 Current commutation Reliable current commutation between switches in matrix converters is more difficult to achieve than in conventional voltage source inverters since there are no natural freewheeling paths. The commutation has to be actively controlled at all times with respect to two basic rules. These rules can be visualized by considering just two switch cells on one output phase of a matrix converter. It is important that no two bidirectional switches are switched on at any instant, as shown pictorially show in the Figure 2-10 (a).

17

Load (a) (b)

Load

FIGURE 2-10 A.Basic Current Commutation (a) Avoid short circuits input lines (b)Avoid open circuits output lines

This would result in line-to-line short circuits and the destruction of the converter due to over currents. Also, the bi-directional switches for each output phase should not all be turned off at any instant, as shown in Figure 2-10 (b). This would result in the absence of a path for the inductive load current, causing large overvoltages. These two considerations cause a conflict since semiconductor devices cannot be switched instantaneously due to propagation delays and finite switching times. The two simplest forms of commutation strategy intentionally break the rules given above and need extra circuitry to avoid destruction of the converter. In overlap current commutation, the incoming cell is fired before the outgoing cell is switched off. This would normally cause a line-to-line short circuit but extra line inductance slows the rise in current so that safe commutation is achieved. This is not a desirable method since the inductors used are large. The switching time for each commutation is also greatly increased which may cause control problems. Dead time commutation uses a period where no devices are gated, causing a momentary open circuit of the load. snubbers or clamping devices are then needed across the switch cells to provide a path for the load current. This method is undesirable since energy is lost during every commutation and the bi-directional nature of the switch cells further complicates the snubber design. The clamping devices and the power loss associated with them also results in increased converter volume.

18
Switch Cell 1 (SAa)

SAa1
VA

SAa2 SBa1 IL RL LOAD

VB

SBa2
Switch Cell 2 (SBa)

FIGURE 2-11 Two phase to single phase Matrix Converter

2.6.1 Current direction based commutation A more reliable method of current commutation, which obeys the rules, uses a four-step commutation strategy in which the direction of current flow through the commutation cells can be controlled. To implement this strategy the bi-directional switch cell must be designed in such a way as to allow the direction of the current flow in each switch cell to be controlled.Figure 2-11 shows a schematic of a two phase to single phase matrix converter, representing the first two switches in the converter shown in Figure 2-1. In steady state, both of the devices in the active bidirectional switch cell are gated to allow both directions of current flow. The following explanation assumes that the load current is in the direction shown and that the upper bi-directional switch (SAa) is closed. When a commutation to SBa is required, the current direction is used to determine which device in the active switch is not conducting. This device is then turned off. In this case device SAa2 is turned off. The device that will conduct the current in the incoming switch is then gated, SBa1 in this example. The load current transfers to the incoming device either at this point or when the outgoing device (SAa1) is turned off. The remaining device in the incoming switch (SBa2) is turned on to allow current reversals. This process is shown as a timing diagram in Figure 2-12, the delay between each switching event is determined by the device characteristics.

19

SAa SBa SAa1 SAa2 SBa1 SBa2

td Timing Diagram
IL > 0
0 1 1 1 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 1 1 0 0 0 1 0 1 0

0 0 1 0 0 0 1 1

0 1

S = SAa Ba SAa1 = SAa2 SBa1 SBa2

1 1 1 1

IL < 0

Steady State

Transitional States

Steady State

State Representation

FIGURE 2-12 Four step semi-soft current commutation between two bidirectional switch cells

This method allows the current to commutate from one switch cell to another without causing a line-to-line short circuit or a load open circuit. One advantage of all these techniques is that the switching losses in the silicon devices are reduced by 50% because half of the commutation process is soft switching, and hence this method is often called semi-soft current commutation. One popular variation on this current commutation concept is to only gate the conducting device in the active switch cell, which creates a two-step current commutation strategy. All the current commutation techniques in this category rely on knowledge of the output line current direction. This can be difficult to reliably determine in a switching power converter, especially at low current levels in high power applications where traditional current sensors such as hall-effect probes are prone to producing uncertain results. One method that has been used to avoid these potential hazard conditions is to create a near zero current zone where commutation is not allowed to take place, as shown for a two-step strategy in the state representation diagram in Figure 2-13. However, this method will give rise to control problems at low current levels and at start-up.

20

SAa SBa SAa1 SAa2 SBa1 SBa2

td Timing Diagram
IL:> IZ
1 0 0 0 1 1 0 0 0 1 0 0 0 1 0 1 0 0 0 1 0 1 1 0 1 0

0 0 1 0 0 0 1 1

0 1

S = SAa Ba SAa1 = SAa2 SBa1 SBa2

IZ >IL<IZ

1 1 1 1

IL < -IZ

0 1

Steady State

Transitional States

Steady State

State Representation

IL [Amps] IL >IZ

IZ -IZ

IL<-IZ Time [secs]

FIGURE 2-13 Two step semi-soft current commutation between two bi-directional switch cells

To avoid these current measurement problems a technique for using the voltage across the bi-directional switch to determine the current direction has been developed. This method allows very accurate current direction detection with no external sensors. Because of the accuracy available using this method, a two-step commutation strategy can be employed with deadtimes when the current changes direction, as shown in Figure 2-14. This technique has been coupled with the addition of intelligence at the gate drive level to allow each gate drive to independently control the current commutation.

21
SAa SBa SAa1 SAa2 SBa1 SBa2
td Timing Diagram
1 0 0 0 0 1 1 0 1 0 0 0 1 0

IL > 0

0 1

S = SAa Ba SAa1 = SAa2 SBa1 SBa2

0 0 0 0

0 0 0 0

IL < 0

0 1 0 0

0 1

1 1 1 1 0 0 0 1

0 1 0 1

Steady State

Transitional States

Steady State

State Representation

FIGURE 2-14 Two step semi-soft current commutation with current direction detection within the switch cell

2.6.2 Relative voltage magnitude based commutation There have been two current commutation techniques proposed which use the relative magnitudes of input voltages to calculate the required switching patterns. In the reduction to a two phase to single phase converter these both look identical and resulting timing and phase diagrams are shown in Figure 2-15. The main difference between these methods and the current direction based techniques is that freewheel paths are turned on in the input voltage based methods. In Metzi current commutation all the devices are closed except those required to block the reverse voltage. This allows for relatively simple commutation of the current between phases. Only one extra device is closed and the commutation process has to pass between the voltage of the opposite polarity during every commutation leading to higher switching losses. To successfully implement this type of commutation it is necessary to accurately measure the relative magnitudes of the input voltages. 2.6.3 Soft switching techniques In many power converter circuits the use of resonant switching techniques has been proposed and investigated in order to reduce switching losses. In Matrix Converters resonant techniques have the additional benefit of solving the current commutation problem. The techniques developed fall into two categories: resonant switch circuits and auxiliary resonant circuits. All these circuits significantly increase the component count in the Matrix Converter; increase the conduction losses and most require modification to the converter control algorithm to operate under all conditions.

22
SAa SBa SAa1 SAa2 SBa1 SBa2
td Timing Diagram
1 1 1 0 0 1 0 1 1 0 0 1 1 1

VA > VB

0 1

S = SAa Ba

VB < VA

1 0 1 1

0 1

1 0 0 1

1 1 0 1

1 1 1 1

SAa1 = SAa2 SBa1 SBa2

Steady State

Transitional States

Steady State

State Diagram
FIGURE 2-15 Voltage based current commutation 2.7 Motivation of this work The indirect matrix converter with SVM method represents the three-phase input currents and output line-to-line voltages as space vectors. It is based on the concept of approximating a rotating reference voltage vector with those voltages physically. The modulation process uses two procedures; vector selection and vector on-time duration calculation. At a given time instant Ts, the SVM method selects four stationary vectors to approximate a desired reference voltage with the constraint of unity input power factor. To achieve this, the amplitude and phase angle of the reference voltage vector are calculated and the desired phase angle of the input current vector is determined in advance. However, commutation problem and complicated PWM method in rectification stage keep it from being utilized. The simple commutation method use results of divide voltage to make PWM in rectification stage.it is matrix converter base on AC/DC/AC topology with advantages over the usual matrix converter topology. Firstly, it has the same performance as a indirect matrix converter with SVM method in terms of voltage transfer ration capacity, four quadrant operation, unity input power factor, no DC capacitor and sine waveforms with only high order harmonics in both line and load side. Secondly, the PWM method utilized at inverter stage can be used and it can largely simplify its control complexity in rectification stage. Thirdly, all the switches at line side turn on and turn off at zero current; the converter does not have any commutation problems as required by the indirect matrix converter. Theoretical analyses are discussed in chapter 3, the simulation results and experimental results in chapter 4.

CHAPTER 3 DESIGN OF THE INDIRECT MATRIX CONVERTER WITH SIMPLE COMMUTATION METHOD This chapter, deals with analysis of indirect matrix converter by using simple commutation method [31]. This method is the indirect method base on AC/DC/AC converter as shown in Figure 3-1. In the analysis of performances is made with regard to operation under balanced and undistorted supply voltage.

FIGURE 3-1 Diagram of indirect matrix converter On the input side

VA = Vm cos(i t ), 2 ), 3 2 ) VC = Vm cos(i t + 3 VB = Vm cos(i t

Eq.3-1

24

VA, B ,C are phase input voltage A, B, C.

On the load side

ia = Io cos(i t + o ), ib = Io cos(i t + o ic = Io cos(i t + o + 2 ) 3

2 ), 3
Eq.3-2

i , o are input and output frequencies. o is initial electric angle of A phase output current Vm ,Io are Amplitude of input voltage, output current respectively.
3.1 PWM method for rectifier side Supposed no input filter in the line side Since the input line voltages balanced, they have two possible conditions for input phase voltages. 1. Two voltages positive, and one is negative Supposing that phases A and B are positive, phase C is negative. One can derive:

VC = VA + VB
Under this condition, switch SCn must be conducting state while S Ap and S Bp are modulated and all other switch are kept in off state While Sap is turned on, The DC voltage is equal to VAC and is positive. The duty ratio of Sap is given by

d AC =

cos A cos C

Eq.3-3

While S Bp is turned on, The DC voltage is equal to VBC and is positive. The duty ratio of S Bp is given by

d BC =

cos B cos C

Eq.3-4

The average DC side voltage in this switching cycle is

Vdc = d AC (VA + VC ) + d BC (VB + VC )

Eq.3-5

25 Substitute Eq.3-1, Eq.3-13-3, Eq.3-4 in Eq.3-5 obtain

Vdc =

3 Vm 2 cos C

2. Two voltages negative, and one is positive Under this condition, switch SCp must be conducting state while S An , S Bn are modulated and all other switch keep in off state While SCp is turned on, The DC voltage is equal to VCA and is positive. The duty ratio of S Ap is given by

d AC =

cos A cos C

Eq.3-6

While S Bn is turned on, The DC voltage is equal to VCB and is positive. The duty ratio of S Bn is given by

d BC =

cos B cos C

Eq.3-7

The average DC side voltage in this switching cycle is

Vdc = d AC (VC + VA ) + d BC (VC + VB )

Substitute Eq.3-1, Eq.3-6, Eq.3-7 in Eq.3-8 obtain

Eq.3-8

Vdc =

3 Vm 2 cos C

Utilizing the same approach, one can obtain the corresponding duty ratio and switching state for all other circuit conditions. The average value of DC voltage during each of these switching cycle is

Vdc =

3 Vm 2 cos in

Eq.3-9

where, cos in = max( cos A , cos B , cos C )

26
TABLE 3-1 The duty cycle d1, d2 and switching pattern

a
Dutycycle
Value
Conduting switches

to

to

to

5 6

d1
d ba

d2 d ca

d1
d bc

d2
d ac

d1 d cb
S bp
Scn

d2 d ab
San

S ap
Sbn

S cn
Scn
Sbp

S ap

5 are shown in 6 6 Table 3-1. While one can establish the corresponding values and patterns with the same approach.
The duty cycle d1, d2 and switching pattern while

< A <

3.2 Basic space vector pwm method The Space Vector Modulation (SVM) refers to a special switching sequence of the upper three power devices of a three-phase voltage source inverters (VSI) used in application such as AC induction and permanent magnet synchronous motor drives. This special switching scheme for the power devices results in 3 pseudo-sinusoidal currents in the stator phases.

FIGURE 3-2 Power circuit topology for a three-phase VSI

It has been shown that SVPWM generates less harmonic distortion in the output voltages or currents in the windings of the motor load and provides more efficient use of DC supply voltage, in comparison to direct sinusoidal modulation technique.

27

FIGURE 3-3 Power bridge for a three-phase VSI

For the three phase power inverter configurations shown in Figure 3-2 and Figure 3-3, there are eight possible combinations of on and off states of the upper power mosfets. These combinations and the resulting instantaneous output line-to-line and phase voltages, for a dc bus voltage of Vdc, are shown in Table 3-2.
TABLE 3-2 Device on/off patterns and resulting instantaneous voltages of a 3-phase power inverter

Sap Sbp Sap Scn Sbn Scn 0 0 0 1 1 1 0 0 1 1 1 0 0 0 1 1 1 1 1 1 0 0 1 1 0 1 0 1 0 1 1 1 0 0 0 0 0 0 1 1 0 0 1 0 1 0 1 0

Van 0 2Vdc 3 -Vdc 3 Vdc 3 -Vdc 3 Vdc 3 -2Vdc 3 0

Vbn 0 -Vdc 3 2Vdc 3 Vdc 3 -Vdc 3 -2Vdc 3 Vdc 3 0

Vcn 0 -Vdc 3 -Vdc 3 -2Vdc 3 -2Vdc 3 Vdc 3 Vdc 3 0

Vab 0 Vdc -Vdc 0 0 Vdc -Vdc 0

Vbc 0 0 Vdc Vdc -Vdc -Vdc 0 0

Vca 0 -Vdc 0 -Vdc Vdc 0 Vdc 0

The quadrature quantities in d-q frame corresponding to these 3 phase voltages are given by the general Clarke transform equation:
Vds =Van Vqs = 2Vbn +Van 3

Eq.3-10

In matrix from the above equation is also expressed as,

28
1 1 Vds 2 2 V = 3 qs 3 0 2 1 Van 2 Vbn 3 Vcn 2

Eq.3-11

Due to the fact that only 8 combinations are possible for the power switches, Vds and Vqs can also take only a finite number of values in the (d-q) frame according to the status of the transistor command signals (c, b, a). These values of Vds and Vqs for the corresponding instantaneous values of the phase voltages (Van, Vbn, Vcn) are listed in Table 3-3. These values of Vds and Vqs, listed in Table 3-3, are called the dq components of the basic space vectors corresponding to the appropriate transistor command signal (c,b,a).The space vectors corresponding to the signal (c,b,a) are listed in the last column in Table 3-3. For example, (c,b,a)=001 indicates that the space vector is U0.The eight basic space vectors defined by the combination of the switches are also shown in Figure 3-4. In Figure 3-4, vectors corresponding to states 0 (000) and 7 (111) of the switching variables are called the zero vectors.
TABLE 3-3 Switching patterns, corresponding space vectors and their (d-q) components

Sap 0 0 0 0 1 1 1 1

Sbp 0 0 1 1 0 0 1 1

Sap 0 1 0 1 0 1 0 1

Scn 1 1 1 1 0 0 0 0

Sbn 1 1 0 0 1 1 0 0

Scn 1 0 1 0 1 0 1 0

Vds 0 2Vdc 3 -Vdc 3 -Vdc 3 -Vdc 3 Vdc 3 -2Vdc 3 0

Vqs 0 0
Vdc Vdc
- Vdc

Vector O000 U0
3 3
3

U120 U 60 U 240 U 300 U180 O111

- Vdc 3 0

29

FIGURE 3-4 Basic space vectors

3.2.1 Decomposing the reference voltage vector V* The objective of Space Vector PWM technique is to approximate a given stator reference voltage vector V* by combination of the switching pattern corresponding to the basic space vectors. The reference voltage vector V* is obtained by mapping the desired three phase output voltages (line to neutral) in the (d-q) frame through the Clarke transform defined earlier. When the desired output phase voltages are balanced three phase sinusoidal voltages, V* becomes a vector rotating around the origin of the (d-q) plane with a frequency corresponding to that of the desired three phase voltages. The magnitude of each basic space vector, as shown in Figure 3-5, is normalized by the maximum value of the phase voltages. Therefore, when the maximum bus voltage is Vdc , the maximum line to line voltage is also Vdc , and so the maximum phase voltage(line to neutral) is Vdc
3 . From Table 3-3, the magnitude of the basic space 3 the

vectors is 2Vdc 3. When this is normalized by the maximum phase voltage Vdc magnitude of the basic space vectors becomes 2 space vectors are indicated in Figure 3-5.

3 . These magnitudes of the basic

30

V*

V * = MVmax e j

2 3

2 3

FIGURE 3-5 Projection of the reference voltage vector

Representing the reference vector V * with the basic space vectors requires precise control of both the vector magnitude M (also called the modulation index) and the angle. The aim here is to rotate V * in the d-q plane at a given angular speed (frequency) The vector magnitude M controls the resultant peak phase voltage generated by the inverter. In order to generate the reference vector V * , a time average of the associated basic space vectors is required, i.e. the desired voltage vector V * located in a given sector, can be synthesized as a linear combination of the two adjacent space vectors, Ux and Uy which frame the sector, and either one of the two zero vectors. Therefore,
V * = dxUx + dyUy + dzUz

Eq.3-12

where Uz is the zero vector, and dx, dy and dz are the duty ratios of the states X, Y and Z within the PWM switching interval. The duty ratios must add to 100% of the PWM period, i.e: dx + dy + dz = 1 Vector V * in Figure 3-5 can also be written as: V * = MVmax e j = dxUx + dyUy + dzUz
Eq.3-13

where M is the modulation index and Vmax is the maximum value of the desired phase voltage. By projecting V * along the two adjacent space vectors Ux and Uy , we have,

31
MVmax cos = dx Ux + dy Uy cos 60 MVmax sin = dy Uy sin 60

Eq.3-14

Since the voltages are normalized by the maximum phase voltage, Vmax=1. 2 (when normalized by maximum phase voltage), the Then by knowing Ux = Uy = 3 duty ratios can be derived as,

dx = M sin(60 ) dy = M sin( )

Eq.3-15

These same equations apply to any sector, since the d-q reference frame, which has here no specific orientation in the physical space, can be aligned with any space vector.
3.3 Pulsewidth method for inverter side The space vector PWM method will be utilized for the inverter side. Initially, it 3 Vm , and the expected output voltage is is assumed that the DC voltage is 2

3 3 Vm Vo _ ref = k 0 ; 0 < k < 2 2

where :
2 3 2 3

Eq.3-16

Vo _ ref = VA + VB e

+ VC e

Eq.3-17

0 = 0 + is the output voltage angle is the angle between output voltage and current
The time sequence of the inverter side switching is shown in Figure 3-7. The Figure 3-6 shows the PWM sequence for both input and output side converters. One can determine from this figure that on the rectifier side, only two commutation events occur during each switching cycle.

32

k I o cos cos in

3 Vm (2 cos in )

FIGURE 3-6 PWM sequence for the proposed converter

V 2 , t2

Vo = k

3Vm o 2

V 1 , t1

3Vm 2

FIGURE 3-7 The space vector PWM converter

Figure 3-7 shows the space vector PWM for inverter while 0 < 0 <
duration of V1 , V1 are

.The time

33 k sin( 0 ) k sin( 0 ) 3 t10 = ts ; t20 = ts sin sin 3 3 In actual system, the average DC voltage is
of V1 , V2 and V0 for this case are; t1 = t10 cos in ; t2 = t20 cos in ; t0 = ts t1 t2 Eq.3-19

Eq.3-18

3 Vm so that the time durations 2 cos(in )

The time sequence of the inverter side switching is shown in Figure 3-7. The various time intervals in the figure can be derived as:
' ' ' t1' = tcom d1 t0 2; t2 = t1' d1t1 ; t3 = t2 d1t2 '' '' ' t1'' = tcom d 2 t0 2; t2 = t1'' d 2t1 ; t3 = t2 d 2t2

Eq.3-20

tcom = tstart + d1ts ; tend = tstart + ts Since idc equals alternately ia , ic and 0 for vectors V 1 ,V 2 and V 0 respectively, one obtains the average dc current for this switching period as:

idc _ avg = idc _ avg = idc _ avg

t1ia t2ic ts kI o cos in Eq.3-21

2 [sin( o ) cos oi sin o cos( oi + )] 3 3 = kI o cos( o oi ) cos in = kI o cos cos in

Moreover, from Eq.3-21, one can establish that the duty cycle of vectors ,using the same 3 method, one can again obtain the corresponding time durations for the relevant vectors. Moreover, it can be shown that the average dc current over each cycle always equals Eq.3-22.
3.4 Waveforms of both input current and output voltage

V 1 ,V 2 and V 0 equal each other over both intervals d1 , d 2 .When o >

, from Figure 3-7 and Table 3-1, it can be 6 6 seen that during the d1 period in which Sap, Sbn are conducting, one obtains isa1 = isb1 = idc ,and isc1 = 0 ; During the period d 2 , switches Sap and Scn are conducting in which case isa 2 = isc 2 = idc , and isb 2 = 0 . Over this switching cycle 3
ein = e a .The average input currents during this switching cycle are

Supposing 0 < o <

< a <

34
isa = idc _ avg = k I o cos cos a isb = d1 idc _ avg = k I o cos cos b isc = d 2 idc _ avg = k I o cos cos c The output voltage vector is:
V o = d1 Vsab cos a k o + d 2 Vsac cos a k o

Eq.3-22

Eq.3-23

Substituting Eq.3-5 into Eq.3-24, one can finally determine that the actual output voltage vector is

Vo = k

3Vm o 2

3.5 Four step commutate method This strategy has a general validity, in a sense that it does not depend on the matrix converter control algorithm employed. In order to explain the strategy it is helpful to refer to the simplified commutation circuit shown in Figure 3-8.

ia

VA

VB

Va

FIGURE 3-8 General commutation circuit of two bi-directional switches. The strategy assumes that when the output phase is connected to an input phase both the mosfet of the bi-directional switch, SAa for instance, have to be turned on. Due to the finite turn off and turn-on time of the mosfet as well as the different propagation time delay of their gating signals, when the commutation of the output phase between the two input lines is required it is not possible to simultaneously switching off SAa and switching on SBa. For instance, assuming that VA > VB, if the device SBan, because of the aforementioned time delays, turns on before the device SAap turns off, a short circuit current starts to flow between the two input phases. In a dual way, assuming that Io > 0, if the device SAap turns off before the device SBap turns on, the output

35
current is interrupted and a voltage spike is induced on the opened switches. The way to solve the problem consist in a careful control of the switching instants and in performing the commutation using only non-hazardous switch state combinations. In Table 3-4 a group of non-hazardous combinations, accordingly to the output current sign, is given. TABLE 3-4 Non-hazardous combinations of devices state.

State 1 2 3 4 5 6 7 8

SAap 1 0 1 0 0 0 1 0

SAan 1 0 0 1 0 0 0 1

SBap 0 1 0 0 1 0 1 0

SBan 0 1 0 0 0 1 0 1

Sign ia +++ + + -

The ON state of a device is indicated by 1 and the OFF state by 0. It has to be noted that the switch states 1 and 2, are unconditional states, since they may exist independently by the current sign; but switch states 3 to 8 are conditional states, since they are legal till the current sign is the one dictated by the most right hand-side column. Now, a commutation process always starts from and terminates to an unconditional state. This transition cannot be made directly in one step but it has to be made through a sequence of several conditional states. In the case a 1 to 2 commutation is required and the output current ia is positive, the switching state sequence to perform consists of the following four steps: 1. turning off SAan 2. turning on SBap 3. turning off SAap 4. turning on SBan Accordingly to the sign of output current that must be measured in general Step 1 consists in turning off the mosfet which is not conduting the output current within the off-going bi-directional switch, SAa in the case. Step 2 consists in turning on the mosfet which will conduct the output current within the oncoming bi-directional switch, SBa BS2 in the case. Step 3 consists in turning off the mosfet which is conducting the output current within the offgoing bi-directional switch. Step 4 consists in turning on the mosfet which will not conducting the output current within the oncoming bi-directional switch. In the same way, if the output current ia is negative, the switching state sequence to follow is

36 1. turning off SAap 2. turning on SBan 3. turning off SAan 4. turning on SBap Symmetrical switching state sequence have to be used when the output current has to be commutated from SBa to SAa. In order to ensure that the actual sequence of the mosfet gating signals is required, a short time delay is insert between consecutive steps. The time delay has to be set to a value higher than maximum propagation time delay difference of the mosfet gating signals.

FIGURE 3-9 Four-step switching diagram for two bi-directional switches

In Figure 3-9 the four-step switching diagram for two bi-directional switches is shown and the output current commutation instant is highlighted. The numeration of the steps refers to a commutation from SAa to SBa.

37

SAap

SAan

SAa SBa
VA
VB
VC

ia

SCa

Va

FIGURE 3-10 Four-step switching diagram for three bi-directional switches

It has to be noted that the output current commutation always takes place after step 2 or 3, depending on the polarity of the voltage across the two switches. In an unconditional state, whenever the output current is dictated to reverse by the source and the load, it is able to do it automatically. Looking at the switching diagram in Figure 3-8 and Figure 3-9, it can be also noted that during a commutation sequence it is impossible for the output current to change direction. This is the main potential drawback of the strategy. But it becomes a minor problem when an output current sensor with good resolution is used, since breaking a current, even an inductive one, at the zero crossing does not cause significant over voltages. It is worth noting that the extension of this commutation strategy to a power converter with a higher number of input phases, as the matrix converter is, does not imply significant complications because the commutation always takes place between two bi-directional switches and the other are idle during the process. With reference to the topology shown in Figure 3-10 the switching diagram for three bi-directional switches is given in Figure 3-11.

38

SAap SAan SBap SBan SCap SCan 1 1 0 0 0 0

I>0

I<0

Step 1 td1
1 0 0 0 0 0 0 1 0 0 0 0

Step 2 td2
1 0 0 0 1 0 0 1 0 0 0 1

Step 3 td3
0 0 0 0 1 0 0 0 0 0 0 1

Step 4 td4
0 0 0 0 1 1

FIGURE 3-11 Switching diagram for three bi-directional switches.

The four-step commutation strategy does not have significant hardware requirements apart from some sort of output current sign circuit measurement. It carries out safe commutation of the output current and no snubber networks are needed. The time step delays can be set to the same constant value or different constant values or to different variable values . As a matter of fact, it is important to point out that the sum of the time step delays settles the minimum duty cycle that the converter modulation control is able to apply to the output and hence it settles the width of the control discontinuity in the linear modulation region of the converter. In other words the sum of the time step delays settles the theoretical minimum time for which an output phase can be connected to an input phase. The strategy can be quite easily implemented into programmable logic devices like FPGA.

39

TABLE 3-5 List of legal device state combinations for three-input to one-output direct AC-AC converter.

State 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

SAap on off off on off off off off off on off off off on off

SAan on off off off on off off off off off on off off off on

SBap off on off off off on off off off on off on off off off

SBan off on off off off off on off off off on off on off off

SCap off off on off off off off on off off off on off on off

SCan off off on off off off off off on off off off on off on

3.5.1 Commutation by FPGA For a three-phase matrix converter, each output phase has three bidirectional switches, giving six switching devices. Application of the commutation procedure involves changing the switching states of the six devices sequentially. Each step will give a unique six switch state combination. Altogether there are 15 permitted six switch state combinations, as shown in Table 3-6. When an output terminal is switched from one of the three input phases to another, six state combinations among the fifteen are required; the first is fixed by the initial states of the six devices before the commutation commences and the last is determined by the requested States of the devices. The four intermediate or transition states depend on the direction of current flow, the original input phase to which an output is connected, and the desired input phase. For one output phase to be able to commutate safely between three input phases during either inward (negative) or outgoing (positive) current flow. There are 12 different ways to combine six out of 15 switch state combinations, therefore forming a 12-path switching state scheduler, illustrated in Figure 3-12.

40
1* 5 4 11 10 7 6 8 14 9 4 15 5

2*

12

3*

13

FIGURE 3-12 12-patch switching state scheduler

A logic circuit is here proposed as a better alternative to the schematic FPGA based circuit. This uses only a few flip-flops and logic gates, and is simple, inexpensive, easy to understand and performs the commutation sequence control accurately. State sequencer circuit: In the proposed multi-stepped switching procedure, consider the control pulses for four devices during the transitional interval when (say) output phase A is switched from input phase a to input phase b. The first pulse for turning off the device in the outgoing phase a is applied before that for turning on the device in the incoming phase b, by one switching or clock cycle td. In the case of positive (supply to load) current flow. The control pulses for devices in the positive current path encompass those for devices in the reverse direction. Moreover the trailing edge of the former is two clock cycles delayed compared with that of the latter. The situation is reversed when the current direction is negative (load to supply). The initial part of the pulse circuit for generating such signals consists of three D flip-flops and AND gate combinations, each for one input phase. A time delay of one clock cycle is generated between each pair of the three phase signals. Each of these signals is injected into a 2 bit shift-register circuit obtaining three output pulses delaying their inputs by two clock cycles, respectively. Subsequently, if the input and output of the same shift register are ANDed together, a control signal with a pulse width as wide as that of the input extended by two clock cycles is generated. By contrast, when both signals are ORed, a narrower pulse is obtained equal to that of the input minus two clock cycles.

41
An+Ad An*Ad

1 2 3 6 5

Xp

Xn

CS

FIGURE 3-13 Two way selector circuit

To make the above circuit workable for both positive and negative current directions, a logic network functioning as a two-way selector can be used for each input signal. This consists of one inverter, four AND gates and two OR gates (Figure 3-13). The outputs of both OR and AND gates, An*Ad and An + Ad, respectively, are applied to the circuit, and a logic signal CS from a current direction sensor is used to enable AND gates 1 and 4. Its inversion is applied to control AND gates 2 and 3. When CS is positive, An + Ad, is applied to OR gate 5 through AND gate 1. Meanwhile An*Ad, is applied to OR gate 6 through AND gate 4, thus generating the desired control signals at terminals Xp and Xn. On the other hand, when AND gates 2 and 3 are enabled by a negative CS, the two outputs of the circuit are reversed.
3.6 Clamp circuit design

A B C

Rc

Cc

a b c

FIGURE 3-14 Clamp circuit

A typical clamp circuit for protection of a matrix converter is shown in the Figure 3-14.The clamp consists of two B6 rectifier bridges using fast-recovery diodes at the input and output. A capacitor takes the commutation energy. A resistor can discharge the capacitor. Under normal conditions, the clamp only has to cope with the energy stored in the leakage inductances. The critical situation for the design of concerns the faults. The design of the clamp is carried out under the assumption that a fault has generated an error signal to the power converter. All switches in the converter are turned off immediately. The task of the clamp is now to de-energize the load without damaging the power switches. The total energy stored in a three-phase inductance carrying sinusoidal balanced currents is calculated as

42
1 1 i i i 3 2 2 2 QL = L(iA + iB + iC ) = L( A + B + C ) = LI 2 2 2 2 2 2 4
2 2 2

Eq.3-24

where QL is the total energy stored in the three load inductances, iA , iB and iB are the three phase currents, and I is the rms value of the line currents. is the energy to transfer to the clamp in the case that the matrix converter feeds a passive load. In the case of an induction motor load, the situation is more complicated. Figure 3-15 shows a simplified equivalent circuit of the induction motor when the clamp capacitor is charged through the clamp diodes. All switches in the converter are turned off. In Figure 3-15, is the stator current, the rotor current, and the magnetizing current. is the stator leakage inductance and the rotor leakage inductance. is the magnetizing inductance of the motor, and is the clamp capacitor. During the fault when the clamp diodes are conducting, the clamp capacitor will be connected Figure 3-15. Discharging of the induction machine inductances to the clamp capacitor during a fault situation. (a) Equivalent model of converter and across the input terminals of the motor with such a voltage induction motor. (b) Currents in induction motor. polarity that the motor will be de-energized. The initial clamp voltage equals the peak line input voltage, which for a 110V network corresponds to 155 V. The magnetizing current total amount of energy transferred to the clamp is, therefore, is assumed constant during the discharge.
L s

is

ir

L r

im

vc

Cc

Lm

(a) FIGURE 3-15 Discharging of the induction machine inductances to the clamp Capacitor during fault situation (a) Equvalent model motor and induction motor (b) Current in induction motor

43

is

ir

im

(b) FIGURE 3-15 (CONTINUED)

The rotor current calculated as will change from the initial current to the level of the magnetizing current The clamp diodes will conduct until the stator current reaches zero. This is shown in Figure 3-15 (b). The total amount of transferred to the clamp is , therefore, calculated as 3 2 Qmotor = (Ls is2 + Lr ir2 + Lr im ) 4 which, for the worst case condition where im equals zero, corresponds to 3 Qmotor ,max = is2 (Ls +Lr ) , for im = 0 and ir = is 4 Eq.3-26 Eq.3-25

The energy Qmotor ,max is used as a design parameter for the clamp capacitor. The voltage rise of the clamp capacitor is calculated as 1 ( vc20 Cc ) + Qmotor ,max vc1 = 2 1 Cc 2

Eq.3-27

Where vc1 is the voltage across the clamp capacitor after the motor has been deenergized. Only the magnetic energy is transferred to the clamp capacitor. Due to the large mechanical time constants, the speed of the motor is unaffected during the clamp operation. When the motor is de-energized, the inertia of the motor and load will determine the time to standstill. To calculate the capacitance needed in the clamp, Eq.3-26 is inserted into Eq.3-27.

44 3 2 Ilim (Ls +Lr ) 2 = v 2 1552 max

Cc =

2Qmotor ,max
2 v 2 v c0 max

Eq.3-28

The term in Eq.3-27 has been substituted with the hardware current limit of the converter This shows that there are three design parameters for the clamp capacitor: the voltage rating of the semiconductors, the leakage inductances of the attached motor, and the hardware current limit of the converter. An interesting aspect is to calculate the required capacitance for the different motors assuming a hardware current limit of 150% of the nominal motor current.
3.7 Input filter design It is important to note that the output voltage (V j , j = {a, b, c}) are synthesized

using the three input voltages (Vi , i = { A, B, C}) and that the input currents (ii , i = { A, B, C}) are synthesized using the three output currents (i j , j = {a, b, c}) , which are sinusoidal if the load has a low pass frequency response shown in the Figure 3-16.

i = { A, B, C}

i = { A, B, C}

FIGURE 3-16 Single phase RLC analysis

The filter can be modelled with the aid of the following equations:
diA + iA R f ; iA = iCf + iAf dt d (iCf + iAf ) dV VA = VCf + Lf + (iCf + iAf )R f ; iCf = Cf Cf dt dt dVCf d dVCf VA = VCf + Lf Cf + iAf + R f iAf (t ) + Cf dt dt dt dVCf (t ) d dVCf (t ) VA (t ) = VCf (t ) + L f Cf + iAf (t ) + R f iAf (t ) + Cf dt dt dt V ( s ) - (Lf s + R f )iAf ( s ) VCf ( s ) = VAf ( s ) = A Eq.3-29 Lf Cf s 2 + R f Cf s + 1 VA = VCf + L f

45 where x(s) denotes the Laplace transform of x(t). In addition,

ii ( s ) = iif ( s ) + Cf sVi ( s )

Eq.3-30

Replacing Eq.3-29 in Eq.3-30 we have:

ii ( s ) = sC f 1 iif ( s) + Vi ( s ) 2 L f C f s + R f Cf s + 1 L f Cf s + R f Cf s + 1
2

Eq.3-31

From Eq.3-29 it can be seen that if the filter parameters are properly selected, the switch array input voltages will be similar to those at the grid. This is very important, because the modulation principles work under the assumption that vsi = vi. Eq.3-31 states that the input currents isi are simply a filtered version of the input voltages vsi. The nature of the former filter is low pass, thus eliminating high frequency harmonics of ii can be easily achieved. The latter filter is a pass-band filter and because of the low frequency nature of vsi, one can assume that the effect of this voltage in isi is negligible. The result of simulation RLC filter with no load has cutoff frequency about 1.2 kHz shown in Figure 3-17 with parameter R f = 0.1, Lf = 0.7mH, Cf = 30uF

V if

ii

ii
V if

FIGURE 3-17 Bode plot no-load

CHAPTER 4 SIMULATION AND EXPERIMENTAL RESULTS 4.1 The simulation of indirect matrix converter The indirect matrix converter circuit in Figure 4-1 was simulated using MATLAB/Simulink and Power System Blockset using the various load as shown overall simulation in Figure 4-1(a).It consists of 6 bi-directional switches using mosfet common source antiparallel with RC snubber and four step commutate technique in rectification stage in Figure 4-1(b) and 6 unidirectional switches using mosfet two level space vector in Figure 4-1(c) and the control unit using simple commutation method for rectification stage and inversion stage in Figure 4-1(d).

(a)

(b) FIGURE 4-1 The simulation by MATLAB/Simulink (a) The overall simulation system (b) The Rectification stage (c) The inversion stage (d) the control unit

47

(c)

(d) FIGURE 4-1 (CONTINUED)

FIGURE 4-2 The circuit simulation using MATLAB/Simulink.

48 Figure 4-2 shows the simulation result under Simulink. The waveforms shown from top to bottom are Vdc, Idc, PWM inverter and PWM rectifier gate voltages respectively. From this result, it can be found that the DC current is very small (0.05A - 0.1A) while the rectifier side is commutating. Thus in order to avoid voltage peaks while the rectifier is commutating, a small value of snubber capacitors can parallel with the rectifier side switches to eliminate the commutation voltage spikes. 4.2 The simulation results and experimental results of four step commutate method The inputs to the circuit must be synchronized to the system clock and this is achieved by using synchronizing D flip-flops in Figure 4-3. As there are always characteristic discrepancies among notionally identical flip-flops, which may cause undesirable overlapping between two signals, an AND gate is inserted after the synchronization stage. Taking a synchronized control signal and the inversion of its adjacent signal as inputs, the gate enables the input to traverse to the next stage when it becomes the reverse of its adjacent signal, thus preventing the chance of overlapping.

SAap SAa CLK

D
SET

SET

SET

SET

CLR

CLK

CLR CLR

CLR

CLK CLK SAap

SBap SBa CLK

D
SET

SET

SET

SET

CLR

CLK

CLR CLR

CLR

CLK CLK SBan

SCap SCa CLK

D
SET

SET

SET

SET

CLR

CLR

CLK

CLR

CLR

CLK

CLK SCan

CS

FIGURE 4-3 Over all circuit configuration of switch sequencer. Taking the three-phase pulse-width-modulation input signals in Figure 4-4 and a current direction sign as inputs, the circuit generates six control pulses for three bidirectional switches in a matrix converter in Figure 4-5. It ensures safe commutation under any combination of the input signals. The actual time interval of the commutation steps depends on the slew rate of the switching devices used. This is used by the PWM generator and also taken to set the clock frequency of the logic circuit, hence determining the delay time equal turn off time of semiconductor in

49 Simulink software use clock frequency equal 20uS and in xilinx software use 50nS in Figure 4-6 but in experiment use delay time equal 5uS in figure 4-7 .

FIGURE 4-4 The three input signal of commutation circuit.

0 1 2 3 4 0 1 2 3 4

Ia<0

Ia>0

SAap
1 0 0 0 0

1 1 1 01

SAan
1 1 1 0 0

1 0 0 01

SBap
0 0 0 0 1

0 0 1 11

SBan
0 0 1 1 1

0 0 0 0 1

SCap SCan

td=20us

td=20us

FIGURE 4-5 The simulation results of three phase to one sequencer

50

FIGURE 4-6 The simulation results of three phase to single phase sequencer in xilinx software
0 1 2 3 4

SAp SAn SBp SBn

SAp
0 0 0 0 1 1

SAn SBp SBn

I<0

I>0

(a)

(b)

FIGURE 4-7 The experimental results of four step commutate method (a) The current sign is negative (b) The current sign is positive 4.3 The hardware experiment of indirect matrix converter A 110V,three-phase matrix converter prototype in Figure 4-8(a) has been built to verify the proposed approach. The converter is controlled using the simple commutation method with 1.5 kW motor load), analog signal conditioning and protection circuits. 12 discrete mosfets with common source anti-parallel and 6 discrete mosfets for inversion PWM, voltage, current sensors and snubber circuits are constructed. In Figure 4-8 (b) and (c) shows practical rectification and inversion stage. The complete control system is implemented on TMS320R2812 DSP board. FPGA board contains FPGA surveyor III XC3S200F4 for four step commutation in the Figure 4-8(d).

51

(a)

(b)

(c) FIGURE 4-8 The picture of experiment (a) the overall system (b) the rectification stage (c) The picture of the inversion stage (d) the control unit

52

(d) FIGURE 4-8 (CONTINUED) 4.4 The simulation and experimental results of Rload Figures 4-9 (a) shows ideal sinusoidal voltage VA supplied to matrix converter and the simulation results of phase voltage after RLC filter VAf (b), (c) shows experimental results of the input voltage waveform and phase voltage after RLC filter. Figure 4-10 (a) shows simulated input phase voltage VA and input line current iA (b).experiment of input phase voltage (Ch.1) and input current (Ch.2,[2.5A/div]). In Figure 4-11 (a) The frequency spectrum of input current is represented. The significant harmonics are around n times of switching frequency. Figure 4-12 shows the pulsation voltage of DC link Vdc. Figure 4-13 (a) simulation results of output phase voltage Van and output current ia (b) experimental results of output phase voltage (Ch.1) and output current (Ch.2,[2.5A/div]). In Figure 4-14 and 4-15 the frequency spectrum of output current and output voltage. Figure 4-16 (a) simulation results of line to line output voltage (b) experimental results of line to line output voltage

(a) FIGURE 4-9 The waveform of VAf and VA operated with Rload (a) Simulation results of VAf and VA (b) Experimental results of VA (c) Experimental results of VAf

53

(b) FIGURE 4-9 (CONTINUED)

(c)

(a)

(b)

FIGURE 4-10 The waveform of VA and iA waveform operated with Rload (a) Simulation results of VA and iA*15 (b) Experimental results of VA and iA

(a)

(b)

FIGURE 4-11 The waveform of iA FFT operated with Rload (a) Simulation results of iA FFT (b) Experimental results of iA FFT

54

(a)

(b)

FIGURE 4-12 The waveform of Vdc operated with Rload (a) Simulation results of Vdc (b) Experimental results of Vdc

(a)

(b)

FIGURE 4-13 The waveform of ia and Van operated with Rload (a) Simulation results of ia and Van (b) Experimental results of ia and Van

(a)

(b)

FIGURE 4-14 The waveform of ia FFT operated with Rload (a) Simulation results of ia FFT (b) Experimental results of ia FFT

55

(a)

(b)

FIGURE 4-15 The waveform of Van FFT operated with Rload (a) Simulation results of Van FFT (b) Experimental result of Van FFT

(a)

(b)

FIGURE 4-16 The waveform of Vab operated with Rload (a) Simulation results of Vab (b) Experimental results of Vab 4.5 The simulated and experimental results of RLload Figures 4-17 (a) shows ideal sinusoidal voltage VA supplied to matrix converter and the simulation results of phase voltage after RLC filter VAf (b), (c) shows experimental results of the input voltage waveform and phase voltage after RLC filter. Figure 4-18 (a) shows simulated input phase voltage VA and input line current iA (b).experiment of input phase voltage (Ch.1) and input current (Ch.2, [2.5A/div]). In Figure 4-19 (a) The frequency spectrum of input current is represented. The significant harmonics are around n times of switching frequency. Figure 4-20 shows the pulsation voltage of DC link Vdc. Figure 4-21 (a) simulation results of output phase voltage Van and output current ia (b) experimental results of output phase voltage (Ch.1) and output current (Ch.2, [2.5A/div]). In Figure 4-22 and 4-23 the frequency spectrum of output current and output voltage. Figure 4-24 (a) simulation results of line to line output voltage (b) experimental results of line to line output voltage

56

(a)

(a)

(b)

FIGURE 4-17 The waveform of VAf and VA operated with RLload (a) Simulation results of VAf and VA (b) Experimental results of VA (c) Experimental results of VAf

(a)

(b)

FIGURE 4-18 VA and iA waveform operated with RLload (a) Simulation results of VA and iA (b) Experiment results of VA and iA

57

(a)

(b)

FIGURE 4-19 The FFT of iA waveform operated with RLload (a) Simulation results of iA FFT (b)Experimental results of iA FFT

(a)

(b)

FIGURE 4-20 The waveform of Vdc operated with RLload (a) Simulation results of Vdc (b) Experimental results of Vdc

(a)

(b)

FIGURE 4-21 The waveform of Van and ia operated with RLload (a) Simulation results of Van and ia (b) Experimental result of Van and ia

58

(a)

(b)

FIGURE 4-22 The waveform of ia FFT operated with RLload (a) Simulation results of ia, FFT (b) Experimental results of ia FFT

(a)

(b)

FIGURE 4-23 The waveform of Van FFT operated with RLload (a) Simulation results of Van FFT (b) Experimental results of Van FFT

(a)

(b)

FIGURE 4-24 The waveform of Vab operated with RLload RLload (a) Simulation results of Vab (b) Experimental results of Vab

59 4.5 The simulated and experimental results of RCload Figures 4-25 (a) shows ideal sinusoidal voltage VA supplied to matrix converter and the simulation results of phase voltage after RLC filter VAf (b), (c) shows experimental results of the input voltage waveform and phase voltage after RLC filter. Figure 4-26 (a) shows simulated input phase voltage VA and input line current iA (b).experiment of input phase voltage (Ch.1) and input current (Ch.2,[2.5A/div]). In Figure 4-27 (a) The frequency spectrum of input current is represented. The significant harmonics are around n times of switching frequency. Figure 4-28 shows the pulsation voltage of DC link Vdc. Figure 4-29 (a) simulation results of output phase voltage Van and output current ia (b) experimental results of output phase voltage (Ch.1) and output current (Ch.2,[2.5A/div]). In Figure 4-30 and 4-31 the frequency spectrum of output current and output voltage. Figure 4-32 (a) simulation results of line to line output voltage (b) experimental results of line to line output voltage

(a)

(b)

(c)

FIGURE 4-25 The waveform of VAf and VA operated with RCload (a) Simulation results of VAf and VA (b) Experimental result of VAf (c) Experimental results of VA

60

(a)

(b)

FIGURE 4-26 The waveform of VA and iA*15 operated with RCload (a) Simulation results of VA and iA*15 (b) Experimental results of VA and iA

(a)

(b)

FIGURE 4-27 The waveform of iA FFT operated with RCload (a) Simulation results of iA FFT (b) Experimental results of iA FFT

(a)

(b)

FIGURE 4-28 The waveform of Vdc operated with RCload (a) Simulation results of Vdc (b) Experimental results of Vdc

61

(a)

(b)

FIGURE 4-29 The waveform of ia and Van operated with RCload (a) Simulation results of ia and Van (b) Experimental results of ia and Van.

(a)

(b)

FIGURE 4-30 The waveform of Van FFT operated with RCload (a) Simulation results of Van FFT (b) Experimental results of Van FFT

(a)

(b)

FIGURE 4-31 The waveform of ia FFT operated with RCload (a) Simulation results of ia FFT (b) Experimental results of ia FFT

62

(a)

(b)

FIGURE 4-32 The waveform of Vab operated with RCload (a) Simulation results of Vab (b) Experimental results of Vab. 4.6 The simulated and experimental results of motor Figures 4-33 (a) shows ideal sinusoidal voltage VA supplied to matrix converter and the simulation results of phase voltage after RLC filter VAf (b), (c) shows experimental results of the input voltage waveform and phase voltage after RLC filter. Figure 4-34 (a) shows simulated input phase voltage VA and input line current iA (b).experiment of input phase voltage (Ch.1) and input current (Ch.2,[2.5A/div]). In Figure 4-35 (a) The frequency spectrum of input current is represented. The significant harmonics are around n times of switching frequency. Figure 4-36 shows the pulsation voltage of DC link Vdc. Figure 4-37 (a) simulation results of output phase voltage Van and output current ia (b) experimental results of output phase voltage (Ch.1) and output current (Ch.2,[2.5A/div]). In Figure 4-38 and 4-39 the frequency spectrum of output current and output voltage. Figure 4-40 (a) simulation results of line to line output voltage (b) experimental results of line to line output voltage

(a) FIGURE 4-33 The waveform of VAf and VA operated with motor (a) Simulation results of VAf and VA (b) Experimental results of VAf (c) Experimental results of VA

63

(b) FIGURE 4-33 (CONTINUED)

(c)

(a)

(b)

FIGURE 4-34 The waveform of VA and iA operated with motor (a) Simulation results of VA and iA (b) Experimental results of VA and iA

(a)

(b)

FIGURE 4-35 The waveform of iA FFT operated with motor (a) Simulation results of iA FFT (b) Experimental results of iA FFT

64

(a)

(b)

FIGURE 4-36 The waveform of Vdc operated of motor (a) Simulation results of Vdc (b) Experimental results of Vdc

(a)

(b)

FIGURE 4-37 The waveform of Van and ia operated with motor (a) Simulation results of Van and ia (b) Experimental results of Van and ia

(a)

(b)

FIGURE 4-38 The waveform of Van FFT operated with motor (a) Simulation results of Van FFT (b) Experimental results of Van FFT

65

(a)

(b)

FIGURE 4-39 The waveform of ia FFT operated with motor (a) Simulation results of ia FFT (b) Experimental results of ia FFT

(a)

(b)

FIGURE 4-40 The waveform of Vab operated with motor (a) Simulation results of Vab (b) Experimental results of Vab The simulation and experimental results have been done using the following parameters: three phase source voltage 110 Vline-line rms, 50Hz, load resistance R = 13.5 Ohm, load inductance L = 13.5mH, load capacitance C = 30uF Motor TERCO, 1.5 kW, 220/380V, Delta/Star, 6.75/3.9 A, 1470RPM Rls = 4.8 Ohms, Rlr = 4.0 Ohms, Lls = 19 mH, Llr = 19 mH Lm = 0.356 H, J = 0.05 kg*m2 modulation index k = 0.866, output frequency fo = 50Hz switching frequency fsw = 4kHz and simulation step 0:001ms. The parameters of the input filter are Lf = 0.7mH, Rf = 0.1Ohm and Cf = 30uF. The parameters of the switches are Ron = 0.1 Ohm, Roff = 100 kOhm

CHAPTER 5 CONCLUSION AND SUGGESTION

5.1 Conclusion The matrix converter topology has been known for more than twenty years and since then it appeared as an attractive solution for adjustable speed drive applications. The indirect matrix converter is a AC/DC/AC converter which performs the AC /AC power conversion in a double step and not via a DC link as in traditional indirect converters. It consists of 6 bi-directional switches and 6 unidirectional switches The matrix converter has several advantages over traditional rectifier-inverter type power converters. It provides sinusoidal input and output waveforms with neither low order harmonics nor sub-harmonics. It has inherent bi-directional energy flow capability and the input power factor can be fully controlled. Moreover, due to the lack of the DC link it allows to get rid of the relevant bulky and lifetime-limited energy-storing capacitors. However, the matrix converter can not be defined as an all silicon converter solution since some energy storage requirements are imposed by the current filter which is needed at the input in order to prevent the converter input current switching harmonics from flowing onto the AC mains. A theoretical limit of the matrix converter is the reduced input-to-output voltage transfer ratio, which is set to 0.866 under the constraint of sinusoidal input and output waveforms. But it has not been due to this voltage limit if the matrix converter technology have taken more than twenty years for appearing on the adjustable speed drives market. The delay was mainly due to several practical obstacles related to the matrix converter control complexity and much more to the implementation of the bidirectional switches, which rises a series of problems related to commutation and protection of the bi-directional switches. With regard to the control algorithms strategies based on the simple commutation method has been considered. For this strategy a theoretical analysis supported by numerical simulations have carried out. Particular attention has been given to the performance under ideal input supply voltage conditions. It should be noted that matrix converters, due to the absence of the DC link capacitors, are sensitive to input voltage disturbances, as they are directly transmitted to the output if not properly compensated. Since, real system are always unbalanced to a certain extent and distorted by non linear loads, the capability to compensate for input voltage disturbances is somehow a mandatory feature for a reliable and effective control algorithm.The indirect matrix converters for three phase to three-phase conversion were analyzed and simulated using the various load (R, RL,RC, 2 hp induction machine). The indirect matrix converters have been designed and simulated using Xilinx ISE webpack 8.1i, Matlab/Simulink and Power System Blockset and the prototype has been built to demonstrate the feasibility of the proposed topologies and control strategies. A theoretical analysis along with numerical simulations have represented the preliminary work for a following series of experimental tests which have required the implementation of the control algorithm on a matrix converter prototype. This represented an important part of the activity carried out. The experimental results

67 obtained for the strategies showed the validity of the theoretical input current analysis and confirmed the numerical results. As far as the commutation strategies is concerned most of the today available commutation strategies have been thoroughly investigated and reviewed. The strategies rely on the possibility to selectively enable the conduction of the positive and negative output current polarity. Therefore, these strategies have to be intended only for bi-directional switches implemented by an anti-parallel arrangement of two discrete power semiconductor devices with series diode. In order to safely commutate the load current between two bi-directional switches it is mandatory some knowledge of the commutation conditions: the voltage across the commutating bi-directional switches or the output current must be measured. These information are required in order to determine the proper sequence of switching states combinations that does not lead to the hazard either of a short circuit or of an open circuit. This is the common operating principle of all the commutation strategies. an original commutation strategy, named four-step has been proposed and implemented on a Field Programmable Gate Array. 5.2 Future work The scope for future work is highlighted in this section. The suggestions made are discussed with respect to the work done in this thesis. This thesis study on the indirect matrix converter system is made using an openloop V/Hz induction motor drive system but the control strategy in practical system for the true four-quadrant operation of the drive can be studied, whereby the control of simple commutation method the AC/DC is the rectification stage and DC/AC is the inversion stage at the output is obtained by two level space vector modulation signals fed to inverter stage. However under practical conditions, varying speeds of induction motor on the inverter stage would require a closed-loop system whereby Field oriented control (FOC) Operation. Also the energy load in the case of the FOC can be flowed to input ac line. The simple commutation method using with divide result of phase voltage to make PWM in Rectification stage regard to operation under balance and undistorted supply voltage However, the ac line side disturbances can degrade its performance and reliability. the behavior of the matrix converter drive under abnormal input line voltage conditions has been investigated. A technique to eliminate the input current distortion due to the input voltage unbalance has been developed. The power line failure behavior has also been investigated and the rapid re-starting capability of the matrix converter drive has been interested.

REFERENCES
1. 2. 3. L. Gyugi. and B. Pelly. Static Power Frequency Changers Theory Performance and Applications. New york : John Wiley and Sons, 1976. E. Stacey. An unrestricted frequency changer employing force commutated Thyristors. PESC. 1976 : 165-173. V. Jones. and B. Bose. A frequency step-up cycloconverter using power transistors in inverse-series mode. Int. Journal Electronics. 1976 : 573-587. A. Daniels. and D. Slattery. New power converter technique employing power transistors. IEE Proc. 1978 : 146-150. A. Daniels. and D. Slattery. Application of power transistors to polyphase regenerative power converters. IEE Proc. 1978 : 643-647. M. Venturini. A new sine wave in sine wave out, conversion technique which eliminates reactive elements. Proc. POWERCON 7. 1980. M. Venturini. and A. Alesina. The generalised transformer: A new bidirectional sinusoidal waveform frequency converter with continuously adjustable input power factor. IEEE PESC. 1989 : 242-252. J. Rodriguez. A new control technique for AC-AC converters. IFAC Control in Power Electronics and Electrical Drives. 1983 : 203-208. J. Oyama, T. Higuchi, E. Yamada, T. Koga and T. Lipo New control strategy for Matrix Converter. IEEE PESC. 1989 : 360-367. P. D. Ziogas, S.I. Khan and M. H. Rashid. Analysis and design of forced commutated cycloconverter structures with improved transfer characteristics. IEEE Trans. Ind. Electron. 1986 : 271-280. P. Ziogas, S. Khan and M. Rashid. Some improved forced commutated cycloconverter structures. IEEE Trans. Ind. Application. 1985 : 1245-1253. M. Braun and K. Hasse A direct frequency changer with control of input reactive power. IFAC Control in Power Electronics and Electrical Drives. 1983 : 187-194. G. Kastner and J. Rodriguez A forced commutated cycloconverter with control of the source and load currents. EPE. 1985 : 1141-1146. C. L. Neft and C. D. Schauder Theory and design of a 30-HP Matrix Converter. IEEE Trans. Ind. Application. 1992 : 546-551. N. Burany Safe control of four-quadrant switches. IEEE Ind. Application. 1989 : 1190-1194. M. Ziegler and W. Hofmann Performance of a two steps commutated Matrix Converter for ac-variable-speed drives. EPE. 1999. M. Ziegler and W. Hofmann Semi natural two steps commutation strategy for Matrix Converters. IEEE PESC. 1998 : 727-731. L. Empringham, P. Wheeler, and J. Clare Intelligent commutation of Matrix Converter bi-directional switch cells using novel gate drive techniques. IEEE PESC. 1998 : 707-713.

4. 5. 6. 7.

8. 9. 10.

11.

12.

13. 14. 15. 16. 17. 18.

69 19. L. Empringham, P. Wheeler and J. Clare Bi-directional switch current commutation for Matrix Converter applications. PEMatrix Converter. 1998 : 42-47. 20. L. Empringham, P. Wheeler and J. Clare Matrix converter bi-directional switch commutation using intelligent gate drives. IEE PEVD. 1998 : 626-631. 21. J.H. Youm and B.H Kwon Switching technique for current-controlled AC to AC converters. IEEE Trans. Ind. Application. April 1999. 22. P. Nielsen, F. Blaabjerg, and J. Pedersen Novel solutions for protection of Matrix Converter to three phase induction machine. IEEE Ind. Applicat. 1997 : 1447-1454. 23. J. Mahlein and M. Braun A Matrix Converter without diode clamped overvoltage protection. IPEMatrix Converter. 2000 : 817-822. 24. C. Klumpner, P. Nielsen, I. Boldea and F. Blaabjerg New steps towards a lowcost power electronic building block for Matrix Converters. IEEE Ind. Applicat. 2000. 25. J. Chang, T. Sun, A. Wang, and D. Braun Medium power AC-AC converter based on integrated bidirectional power modules adaptive commutation and DSP control. IEEE Ind. Application. 1999. 26. C. Klumpner, I. Boldea, and F. Blaabjerg Short term ride through capabilities or direct frequency converters. IEEE PESC. 2000. 27. P. Wheeler, H. Zhang, and D. Grant A theoretical and practical consideration of optimised input filter design for a low loss Matrix Converter. IEE PEVD. 1994 : 363-367. 28. C. Klumpner, P. Nielsen, I. Boldea and F. Blaabjerg A new Matrix Convertermotor (Matrix ConverterM) for industry application. IEEE Ind. Applicat. 2000. 29. Roy G. Duguay L. Manias S. and April G.E. Asynchronous Operation of Cycloconverter with Improved Voltage Gain by Employing a Scalar Control Algorithm. IEEE IAS. 1987 : 889-898. 30. Roy G. and April G. E. Cycloconverter Operation Under a New Scalar Control Algorithm, IEEE PESC. 1989 : 368-375. 31. Lixiang Wei, Thomas. A. Lipo A Novel Matrix Converter Topology with simple communication. IEEE. 2001 : 1749-1754.

APPENDIX A ECTI conference 2006

71

ANALYSIS AND COMPARISION OF CONTROL TECHNIQUES IN MATRIX CONVERTERS

Veeradate Piriyawong and Khatathap Swatdipisal Electrical Engineering Department, Faculty of Engineering, King Mongkuts Institute of Technology North Bangkok, Bangkok,10800, Thailand. elefone@hotmail.com , ktts@kmitnb.ac.th ABSTRACT In this paper, it is analysis and comparision contrast between two type of three phase AC-AC matrix converters strategy : direct method namely, the venturinis method and indirect method.The indirect method usually refer to space vector modulation (SVM). In this paper will selected one of many method in the indirect method base on AC/DC/AC converter namely, the simple commutation method.In the comparision of relative performances is made with regard to operation under balanced and undistorted supply voltage.The simple commutation method uses a simpler method than venturinis method but the venturinis method is superior performance in term of output voltage harmonics. Keyword : Matrix converter , Direct method, Simple commutation, comparision 1. Introduction The basic circuit of three phase to three phase matrix converter, shown in fig.1, consist of three groups.Each of the nine switches can either block or conduct the current in both direction thus allowing any of output phases to be connected to any of input phases.The input side of the converter is voltage source, and the output is current source.Only one of the three switches connected to the same output phase can be on at any instant of time.

Fig.2 overall circuit of matrix converter system 2. Analysis of modulation method 2.1 Direct method(Venturinis method) The first switching strategy for matrix converters was proposed by Venturini in 1980[1].This method was further modified to increase output to input voltage transfer ratio from 0.5 to 0.866[2]. In Venturinis method a desired set of three phase output voltage may be synthesized from a given set of three phase input sinusoidal voltages by sequential piecewise sampling.The three phase output phase voltages can be expressed in following matrix form[3]

[v oph ] = [ M ][viph ]

(1)

viph , voph is input and output phase voltage M is instanous input transfer matrix
cos(i t ) v a [viph ] = vb = Vim cos(i t vc cos( t + i Vim is amplitude of input voltage 2 ) 3 2 ) 3

Fig.1 basic circuit of three phase to three phase matrix converter In general, low-pass filters are need at both the input and output terminals to filter out the high frequency. An overall circuit of matrix converter system is given in fig.2. Each power circuit is protect all switches opened by voltage clamp circuit. For three phase motor loads the output filter may not be necessary.

i is input frequency
v A M aA M bA M cA v a v B = M bA M bB M cB v b v C M cA M bC M cC v c T [iiph ] = [ M ][ioph ]
iiph , ioph is input and output phase current
(2)

(3)

72
M T is transpose of M i a M aA M bA M cA i A ib = M bA M bB M cB i B i c M cA M bC M cC iC At any time period 0 M ij 1

(4)

i {a, b, c} and j { A, B, C}

M
j =1

ij

=1

b) Input current vectors Fig.3 Output voltage and input current hexagons a) Output voltage vectors b) Input current vectors

If angle displacement between input current and voltage is zero, the duty cycle are given general form by

1 M ij = {1 + 2 q cos( i t 2 ( j 1) ) 3 3 1 [cos( o t 2 (i 1) ) cos(3 o t ) + 3 6 1 2 cos(3 i t )] q [cos(4 i t 2 3 3 3 2 ( j 1) ) cos(2 i t 2 (1 j ) )]} 3 3

t2 =
(5)

QTs cos i cos 30 0

sin(60 0 0 ) sin i

(7)

t3 =

QTs sin(600 0 ) 0 cos i cos 30

0

(8)

sin(60 i )
t4 = sin 0 sin i (9) cos i cos 30 0 where Q = Vol / Vil is the voltage transfer ratio, QTs

o
q

is output frequency

is output to input ratio 2.2 Indirect method 2.2.1 Space vector Modulation(SVM) The space vector modulation technique adopt a different approach to the Venturini method by selecting the valid switching states of three phase matrix converter as show in fig.3 and calculation their corresponding on time durations.This method was initially presented by Huber[4].The modulation process uses two procedure ; vector selection and vector on time calculation[5].The SVM selects four stationary vectors to approximate a designed a reference voltage with constraint of unity input power factor. To calculate the on-time durations of chosen vectors,General fomular derived for estimating the four vector time widths.

voltage and phase current, 0 and i are the phase angles of the output voltage and input current vectors,whose values are limited within the

i is the phase angle between input line to line

0 60 0 range.The residual time within Ts is then

taken by zero vector; thus,

t 0 = Ts

t
i =1

(10)

t1 =

QTs sin(600 0 ) 0 cos i cos 30

0

2.2.2 Simple Commutation After the SVM was presented, other researcher focus on eliminating the DC capacitor in traditional AC/DC/AC converter[6]. In Fig.4 shown the modified matrix converter, it is also similar to traditional AC/DC/DC

(6)

sin(60 i )

Fig.4 Basic topology of the proposed matrix converter a) Output voltage vectors

73
d bc =
cos b cos c

On the input side

(17)

2 V a = V m cos( i t ), Vb = V m cos( i t ), 3 2 Vc = V m cos( i t + ) 3 V a ,b,c are phase input voltage a , b , c.

The average DC side voltage in this switching cycle is (11)

V dc = d ac (V Sc + V Sa ) + d bc (V Sc + V Sb )
Substitute (13),(14) in (15) obtain

(18)

i A = I o cos( i t + o ),

On the load side

Vdc =

3 Vm 2 cos c

2 ), 3 2 iC = I o cos( i t + o + ), 3 i , o are input and output frequencies. i B = I o cos( i t + o

(12)

PWM Method for inverter side The space vector PWM method will be utilized for the inverter side[7]. Initially, it is assumed that the DC voltage is

o is initial electric angle of A phase output current

Vm , I o are Amplitude of input voltage, output current
respectively. PWM Method for rectifier side Supposed no input filter in the line side Since the input line voltages balanced,they have two possible conditions for input phase voltages. 1) two voltages positive, and one is negative Supposing that phases a and b are positive,phase c is negative.One can derive:

Vo _ ref

3 Vm ,and the expected output voltage is 2 3 3 Vm = k (19) 0 ; 0 < k < 2 2

j
2 3

where : Vo _ ref = V A + V B e

+ VC e

2 3

0 = 0 + is the output voltage angle is the angle between output voltage

and current The time sequence of the inverter side switching is shown in Fig.5

V Sc = V Sa + V Sb
Under this condition ,switch Scn must be conducting state while Sap, Sbp are modulated and all other switch keep in off state While Sap turned on,The DC voltage is equal to Vac and is positive. The duty ratio of Sap is given by

d ac =

cos a cos c

(13)

While Sbp turned on,The DC voltage is equal to Vbc and is positive. The duty ratio of Sbp is given by

d bc

cos b = cos c

(14)

Fig.5 PWM sequence for the proposed Converter 3. Comparision in result of simulation The matrix converter operated at switching frequency of fs =1.5kHz (fs >> fi & fo) was simulated with MATLAB / Simulink and Power System Blockset . In the Fig.6-7 are presented output line voltage and output phase current of two control method.The output line voltage maximum value is 1.732 pu (maximum value of input line voltage). The maximum output line voltage and fundamental of output phase current is same value.The output current have fundamental 50Hz. In Fig.8-9 are presented the FFT output / input ratio of voltage and FFT output phase current.

The average DC side voltage in this switching cycle is

Vdc = d ac (VSa + V Sc ) + d bc (V Sb + V Sc )
Substitute (13),(14) in (15) obtain

(15)

Vdc =

3 Vm 2 cos c

2) two voltages negative, and one is positive Under this condition ,switch Scp must be conducting state while San, Sbn are modulated and all other switch keep in off state While Scp turned on,The DC voltage is equal to Vca and is positive. The duty ratio of Sap is given by

d ac =

cos a cos c

(16)

While Sbn turned on,The DC voltage is equal to Vcb and is positive. The duty ratio of Sbn is given by

74

(a) direct method Fig.6 Output line voltage and output phase current of direct method

(b) simple commutation Fig.9 frequency spectra of output phase current (a) direct method (b) simple commutation Simulation parameter fs = 1.5kHz, fi=50Hz, fo=50Hz,Vm=1pu, Lload=30mH, Rload=10 Ohm q=0.5, No input filter 4. Conclusion Two control technique (Venturini method and simple commutation method) of matrix converter have been compared.The main advantage of Venturinis method is superior performance in term of output voltage harmonics but the modulation equation is complicate to programming on Digital Signal Processor.The simple commutation method uses a simpler method than Venturini method. 5. Reference 1. M.Venturini,A new sin wave in, sinwave out technique eliminates reactive elements. Proc.of Powercon, 1980 2. M.Venturini and A.Alesina, Analysis and Design of optimum-amplitude nine switch direct AC-AC converter.IEEE pp.101-112, 1989 3. P.Veeradate, S. Khatathap, The Modeling and Simulation Close Loop Vector Control of Induction Motor Using Matrix Converter, EECON28, 2005 4. L.Huber and D.Borojevic, Space vector modulator forced commutated cyclo converters. Proc IAS89 Vol 1,1989 5. C.Watthanasarn, L.Zhang and D T W Liang, Analysis and DSP implementation of modulation algorithm for AC-AC matrix converters.IEEE 1996 6. S. Kim and S-K. Sul and T.A.Lipo, AC/AC power convesion based on matrix converter topology with unidirectional switches, IEEE 2000 pp.139-145. 7. Lixiang Wei,T.A. Lipo, A Novel Matrix Converter topology with simple commutation. IEEE 2001

Fig.7 Output line voltage and output phase current of indirect method (simple commutation) The output voltage have a ratio at fundamental frequency (50 Hz) 0.5 and the output current has peak values of 3.64 mA at fundamental frequency 50 Hz and its comprises a very small sub harmonic located around switching frequency 1500Hz.

(a) direct method

(b) simple commutation Fig.8 frequency spectra ratio of output/Input phase voltage (a) direct method (b) simple commutation

75 BIOGRAPHY Name : Mr. Veeradate Piriyawong Thesis title : Design and Implementation of Simple Commutation Method Matrix Converter Major Field : Electrical Power Engineering Biography Veeradate Piriyawong was born in Thamaka, Kanchanaburi on December 30, 1980. He entered King Monguts Institute of Technology North Bangkok in June of 1998 in the engineering curriculum. He received his B.S. degree in Electrical Engineering in 2002 from King Monguts Institute of Technology North Bangkok. During 2002 and 2003, the author worked as an engineering at Techsource System Thailand in Bangkok, Thailand.While employed by Techsource, he learned MATLAB/Simulink, simulated electrical drives system, and model algorithms for embedded processors. In 2003, he enrolled into the M.Sc. program in Sirindhorn International ThaiGerman Graduate School of Engineering (TGGS) at King Monguts Institute of Technology North Bangkok. In December of 2005, he began working as a staff at the Electrical Machines and Drive Systems Laboratory. His research interests include matrix converter and modeling and control of electrical drives. My contact address is 25/7 Moo 13, Tumbol Prathean, Ampur Thamaka, Kanchanaburi, 71130, Thailand and my email address is elefone@hotmail.com