IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO.

5, MAY 2009

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Control and Resonance Damping of Voltage-Source and Current-Source Converters With LC Filters
Yun Wei Li, Member, IEEE
AbstractIn this paper, the closed-loop control of both voltagesource converter (VSC) and current-source converter (CSC) systems with LC lters is investigated, with a focus being put on the damping of LC resonance. First, both single-loop and multiloop control schemes for a voltage-source inverter (VSI) with output LC lter are analyzed, where the design and tuning procedure can also be applied to a current-source inverter (CSI) with output CL lter. It is shown that both VSI and CSI systems are subject to LC resonance, even with multiloop control, while the CSI system is also subject to LC resonant frequency variations. On the other hand, the LC resonant frequencies in both current-source rectier (CSR) and voltage-source rectier (VSR) systems with input LC lter circuits are relatively xed due to the small variation range of source impedance. To further dampen the LC resonance in these converter systems, active damping techniques such as virtual harmonic damper and control-signal-shaping methods are investigated, and their implementation into the converter systems is discussed in detail. Experimental results from both a VSC system and a CSC system are obtained. Index TermsActive damping, closed-loop control, currentsource converters (CSCs), LC resonance, Posicast controller, three-step compensator, virtual resistor, voltage-source converters (VSCs).

I. I NTRODUCTION OLTAGE-SOURCE converters (VSCs) and currentsource converters (CSCs) are two topologies that are widely used in power conversion applications such as uninterruptible power supplies (UPSs) [1][8], active lters [9][11], distributed generation (DG) systems [12][16], electric drives, custom power devices [17][24], etc. Most of these converter systems consist of both active switching devices such as insulated-gate bipolar transistors (IGBTs), integrated gatecommutated thyristors (IGCTs), and gate turn-off thyristors with pulsewidth modulation (PWM) and passive components such as inductors and capacitors to assist in device commutations and switching harmonic ltering. Among these applications, the VSCs are generally used with effective switching frequencies of a few thousand hertz for relatively low power applications or for high-power application with multilevel topologies. CSC systems, on the other hand, are mostly used at high power level with switching frequencies in a range of a

Manuscript received June 7, 2008; revised August 8, 2008. First published November 18, 2008; current version published April 29, 2009. The author is with the Department of Electrical and Computer Engineering, University of Alberta, Edmonton, AB T6G 2V4, Canada (e-mail: yunwei. li@ece.ualberta.ca). Color versions of one or more of the gures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identier 10.1109/TIE.2008.2009562

few hundred hertz [15], [30], [31], [45] to reduce the switching losses. An important area of study on the converter systems is the high-performance control to ensure that the converter system output voltage and/or current closely tracks the desired references with both good transient and steady-state performances. Numerous control methods have been reported in the literature, including deadbeat control [6], adaptive control [7], repetitive control [8], robust H-innity control [4], [21], sliding-mode control [5], and classical control with PI or P + resonant controllers [1][3], [14], [25][28]. For a converter system with input or output LC lter circuit, another issue is the damping of LC resonance, which, if not carefully addressed, will introduce transient distortions and steady-state harmonics around the LC resonant frequency or even affect the overall system stability. As passive damping using physical resistors involves excessive energy losses, a preferred approach is therefore to dampen the LC resonance through a properly designed control scheme. In this paper, some commonly employed closed-loop control strategies for VSC and CSC systems are investigated. The design and analysis of these closed-loop control schemes are presented, with a focus being put on their effects on the damping of LC resonance introduced by the LC lters. Specically, for a voltage-source inverter (VSI) with output LC lter, both single-loop and multiloop control schemes are discussed. It is shown that both control schemes are subject to LC resonance due to the limited control loop gains for high-/low-frequency disturbance attenuation. With a duality to a VSI system, the current-source inverter (CSI) system is also subject to LC resonance. However, the resonant frequency in a CSI system would vary widely, depending on the loads connected. In the contrary, the LC resonant frequencies in both current source rectier (CSR) and voltage source rectier (VSR) systems with input LC lter circuits are relatively xed due to the small variation range of source impedance. To further dampen the LC resonance in a converter system, virtual harmonic resistive damper and control-signalshaping techniques can be employed. The virtual harmonic damper functions by mimicking a physical resistor at only the harmonic frequencies without power losses. However, the ltering process in the virtual harmonic damper is subject to degraded dynamic performance. The control-signal-shaping method, functioning by shaping the PWM signal to cancel the oscillatory effect through a sequence of step responses, is therefore sensitive to LC resonant frequency variations. For a converter system with a relatively xed LC resonant frequency, the signal-shaping controller such as the two-step

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resonance (see Fig. 8 for a Bode plot), which is mainly caused by the reference feedforward loop [21]. B. Multiloop Control To have a system with improved transient and steady-state performances, multiloop control can be used, where an inner current loop functions by improving the overall system stability and attenuating the LC resonance introduced by the lter. The design of the multiloop control is an interactive process, where the outer voltage loop controller is designed with specied bandwidth and error-tracking requirements based on a given plant including inner current loop, while the inner current regulator is tuned with consideration of its inuences on the generated new plant (for the outer loop) and its relations to disturbance rejection capability. It is worth mentioning that either lter inductor current (If ) or lter capacitor current (IC ) can be used as the inner loop control variable. While the lter capacitor current feedback is usually used for better rejection of load current disturbance, the lter inductor current feedback is considered here due to its better performance for LC resonance damping and the ability of overcurrent protection. The damping performance difference with different feedback alternatives is caused by the different overall current loop gains (with consideration of the output load) when the same controller gain kC is used. The relatively larger gain associated with the lter inductor current feedback loop introduces better damping performance [29]. With an inner current loop, the new plant (with the reference current I as input and the capacitor voltage VC as output) is shown in GV (IN ) = Cf Lf s2 kC + (Cf Rf + Cf kC )s + 1 (1)

Fig. 1. Three-phase VSI system with output LC lter.

Posicast controller or the three-step compensator can be used within the closed-loop control path. For a converter system with a variable resonant frequency, the virtual harmonic damper is an effective method. It is also shown in this paper that the combination of the virtual harmonic damper and control signal shaping can further improve the damping performance. This combination approach is particularly attractive for a gridinterfacing converter system. Experimental results from both a VSC system and a CSC system are obtained. II. C LOSED -L OOP C ONTROL OF VSI W ITH O UTPUT LC F ILTER C IRCUIT A VSI with output LC lter is shown in Fig. 1. This VSI can be connected as a shunt inverter system such as a UPS or power-electronic-interfaced DG systems. It can also be in the form of a series-connected inverter system such as a dynamic voltage restorer (DVR) [17][22]. In a more complex system like a unied power quality compensator or a grid-interfacing compensator [14], [23], [24], both shunt- and series-connected VSIs will present. Irrespective of how such a VSI system is connected, the output LC lter tends to introduce the LC resonance into a system. A. Single Voltage Loop Fig. 2(a) shows the single-voltage-loop control of a VSI system. This control scheme is commonly used to save cost (on current sensors) while still maintaining the ability of good reference voltage tracking. However, the tradeoff between steadystate response, transient response, and stability is severe, as large control gains are generally required for good steadystate and transient performances, but they generally deteriorate the system stability. If smaller gains are used for an adequate stability margin, the system will be subject to sluggish response and signicant steady-state error. A possible solution for the conicting requirements is to implement a voltage feedforward loop from the voltage reference V to the modulator input VInv [see Fig. 2(a)]. The voltage controller can be a PI controller in the synchronous dq frame (where fundamental components are dc signals) or a P + resonant controller in the stationary frame, as shown in Fig. 2(a). In effect, the P + resonant controller is derived by transforming a synchronous frame PI controller to the stationary frame [25][27] and can practically be implemented using the form GPR (s) = kP + 2 2kI cut s/(s2 + 2cut s + 0 ), where kP is the proportional gain, kI is the integral term at the fundamental frequency (0 ), and cut is the cutoff bandwidth which determines the controllers performance under frequency variations [25]. This single-loop feedback scheme, however, is subject to serious LC

where kC is the current loop controller gain. From (1), the natural frequency and damping ratio can be obtained as n = 1/(Cf Lf ) and = (Cf Rf + Cf kC )/(2 Cf Lf ), respectively. Obviously, the natural frequency is only determined by the output LC lter. However, the current controller gain kC can change the system damping ratio, with a higher kC leading to a better damped system. To illustrate this, the new plants with different current regulator gains are shown in Fig. 3. As expected, a larger kC results in a larger damping ratio and therefore introduces more effective damping. However, it can also be seen from Fig. 3 that a larger kC will introduce larger phase shift at the operating frequency. This phase shift should be compensated by the outer voltage loop in order to minimize the voltage-control steady-state error. With an interactive multiloop controller tuning process, the gains of outer voltage loop controller change with the variation of inner current regulator gain at a specied nal control loop bandwidth and steady-state error. To further illustrate these effects, the nal control loop bandwidth of 5000 rad/s and a steady-state error of 1% at the fundamental frequency are dened rst. The nal open-loop system (with the voltage error as input and the capacitor voltage as output) and voltage controller can then be obtained. Considering a P + resonant

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Fig. 2.

Control schemes for the VSI system in stationary frame using (a) single-loop feedforward + feedback and (b) double-loop control.

Fig. 3.

Plants with closed current loop under different current regulator gains.

controller (GPR ) for the voltage loop, the nal open-loop transfer function can be obtained as GV (OL) = GPR GV (IN ) = where a4 = Cf Lf a3 = Cf Rf + Cf kC + 2cut Cf Lf
2 a2 = Cf Lf 0 + 2cut (Cf Rf + Cf kC ) + 1 2 a1 = 2cut + 0 (Cf Rf + Cf kC ) 2 a0 = 0 . 2 kC kP s2 + 2cut kC (kP + kI )s + kC kP 0 a4 s4 + a3 s3 + a2 s2 + a1 s + a0

Fig. 4. Effects of different current regulator gains on (a) voltage controller and (b) nal open-loop system (at xed bandwidth and steady state error).

(2)

With (2), the voltage controller parameters can be obtained by solving two equations: one at the fundamental frequency to meet the steady-state-error requirement, and the other one at the bandwidth frequency to meet the bandwidth requirement. With a selected cut (8 rad/s), the proportional gain kP and the integral gain kI for the voltage controller can be determined. The effects of current controller gains on the obtained voltage controller and nal open-loop system are shown in Fig. 4. It can be seen that with the increase of kC , voltage controller gain needs to be decreased (except at the fundamental frequency) to maintain the same control bandwidth. While with the same

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Fig. 6.

Different locations of virtual resistor in an LC circuit.

Fig. 5. Frequency response of lter inductor feedback current to inverter output (at xed bandwidth and steady-state error).

bandwidth maintained, different kC values will change the shape of the nal open-loop system, as shown in Fig. 4(b), where a larger kC produces higher gains at low frequencies. These high gains will amplify the low-frequency noises such as the subharmonics or the measurement dc offsets and therefore affect the system stability. To avoid it, either more complex voltage compensator [22] or lower current regulator gain will be required. Similar effects can also be observed from Fig. 5, where it can be seen that a larger kC will amplify the low-/highfrequency inductor current disturbances. An analysis of the load current disturbance has also been done with similar plot as in Fig. 5 obtained, meaning that a larger kC results in a system that is sensitive to both low- and high-frequency current disturbances. The value of kC is therefore always limited due to practical considerations such as amplication of current harmonic noise or dc offset in current and voltage measurements. Finally, with considerations of all these factors, the criterion of tuning kC is to choose a kC as large as possible, provided that the stability of the system from the voltage and current feedback disturbances is adequately maintained. It can be seen from Fig. 4(b) that with a selected kC = 0.9, the resultant system will still have a slight resonant peak at the LC cutoff frequency. C. Further LC Resonance Damping Methods Other than the control schemes, the loads connected to a VSI system may slightly affect the LC resonance by providing some damping. The load effects on the resonance can be explained from the energy point of view. Assuming a xed load voltage magnitude, a smaller load resistance will generally dissipate the resonance energy more quickly and therefore provide relatively more damping than a larger load resistance. With the presence of a series load inductance (in an inductive load), the voltage drop across the load resistance is reduced, thus reducing the resonance energy absorption by the load and reducing the

damping effect. It is worth mentioning that the load effects on the resonance (both overshoot and resonant frequency) in a VSI system are very limited [21]. To further dampen the LC resonance, one method is to employ the virtual resistor, which is realized by control and functions by emulating a physical resistor but without the associated losses [31], [34][36]. There are four possible locations for the virtual resistor in an LC lter circuit, as shown in Fig. 6: in parallel/series with the inductor or in parallel/series with the capacitor. For a virtual resistor in parallel with the inductor or capacitor (realized by dividing the inductor or capacitor voltage by the desired virtual resistance), differentiators are required to convert the current signal from the virtual resistor loop output to the voltage signal that can be applied to the PWM modulator in the VSI [35]. The differentiators can be avoided with the multiloop control scheme, where the current signal can be applied to the reference current for the inner current loop [see Fig. 2(b)]. However, as the inner loop usually employs a limited gain, as discussed earlier, the virtual resistor control accuracy will suffer in this case. In the contrary, a virtual resistor in series with the lter inductor or capacitor (realized by multiplying the inductor or capacitor current with the desired virtual resistance) can be directly applied to the PWM modulator. Considering that the inductor current is already measured in the VSI multiloop control scheme, a virtual resistor in series with the lter inductor is a better option. Designed to ideally dampen the LC resonance, the virtual resistors, however, can interfere with the fundamental current/ voltage control performance or cause modulation index saturation or overmodulation problems [31], [34], [45]. To avoid this, the fundamental components in the virtual harmonic control loop should be ltered out, and the resultant virtual resistor only takes effect at all the harmonic frequencies as a virtual harmonic damper (Rh ). However, this fundamental component ltering will affect the control scheme transient performance, as will be discussed in the next section. Alternative methods to eliminate the LC resonance include feedforward control signal compensation using the LC lter model [32] and control signal shaping using compensators [21], [33], [38][41]. Among them, the two-step (or half-cycle) Posicast controller has recently been identied as a simple and effective approach for resonance elimination while with the same tracking performance attained [39][41]. As shown in Fig. 7, the Posicast controller functions by splitting a step input command into two intermediate steps. By properly timing the interval (Td ) of the two steps, the system response produced by the second step can cancel the oscillatory response excited by the rst step, resulting in an oscillation-free step

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Fig. 7.

Compensation principle of the two-step Posicast controller.

Fig. 9. Three-phase CSI system with output CL lter.

distortion to resonance compensation. Furthermore, the highfrequency attenuation characteristics of the original control scheme are not affected by the Posicast control, except for the notches at (Tr /Td )n 1 (n is an integer) times the resonant frequency. III. C LOSED -L OOP C ONTROL OF CSI W ITH O UTPUT CL F ILTER C IRCUIT CSCs are mainly used at high-power applications [15], [30], [31], [45] with a low switching frequency of a few hundred hertz due to the concerns of losses at high power level. Majority of CSCs are used in drive applications [30], while some other applications have also been seen in static synchronous compensator (STATCOM) [42], active lters [43], etc. As a CSC system requires capacitors to assist device commutations, it is also subject to LC resonance. The attenuation of LC resonance is more challenging in a CSC system due to the low switching frequencies. A CSI circuit with CL output lter is shown in Fig. 9, where the lter inductor can be either an intentionally added inductor [42] or the load or line inductance as in most drive applications. The block diagram representation of the multiloop control scheme of this CSI system is shown in Fig. 10. As shown, it consists of an inner capacitor or inductor voltage loop and an outer inductor current loop. The duality of the multiloop control of a CSI with CL lter and a VSI with LC lter was reported in [28], with the matched variables being IL(CSI ) VC(VSI) , VC(CSI) If (VSI) , and VL(CSI) IC(VSI) . The alternatives of using inductor current or capacitor current feedback in a VSI inner current loop are therefore transformed to capacitor voltage or inductor voltage feedback in the CSI inner voltage loop. As the inductor voltage might not be accessible (when Lf is the load/line inductance) and considering the LC resonance attenuation, the capacitor voltage is preferred to be used for the inner loop. With similar control and system schemes, the multiloop controller design of a CSI system can be conducted in a similar approach, as discussed in Section II. Considering an inner voltage loop with proportional controller (kV ) and an outer current loop with P + resonant controller (see Fig. 10), the new plant with inner voltage loop can be obtained as GC(IN ) = kV . Cf Lf s2 + (Cf Rf + Lf kV )s + (1 + Rf kV ) (5)

Fig. 8. Bode plots of the single-voltage-loop control with reference feedforward and Posicast controllers.

response. The transfer function of the Posicast controller is expressed in Gtsp = sTd 1 + e 1+ 1+ (3)

where is the step response overshoot of the lightly damped system and Td should be selected as half of the resonance period (Tr ) for complete LC resonance elimination. To reduce its sensitivity to LC resonant frequency variations, the Posicast controller can be inserted within a feedback control loop (to shape the modulation signal) as a more robust option [39] [41]. For digital implementation, the two-step Posicast transfer function in (3) must rst be discretized as GZtsp = 1 + z int(Td /Ts ) 1+ 1+ (4)

where Ts is the system sampling period and int( ) denotes the integer number of the delayed samples. This discrete form implies that if Td /Ts is not an integer, the fractional part of it could result in delay time error in the Posicast compensation. A higher sampling frequency will therefore give ner delayed samples for timing the second step command. Usually, for a highswitching VSI, this delay error is quite small, e.g., with a 5-kHz switching frequency and a same system sampling frequency, the maximum delay time error introduced by discretization is t = 0.1 ms. This error can be further eliminated by the threestep compensator, as will be discussed in Section IV. The performance of Posicast controller in a single-loop scheme is shown in Fig. 8. Compared to the control scheme without Posicast, the LC resonance is almost completely eliminated, and the digitization process introduces only very slight

With (5), the natural frequency and damping ratio can be obtained as n = (1+Rf kV )/(Cf Lf ) and = (Cf Rf + Lf kV )/(2 Cf Lf (Rf kV +1)). Unlike a VSI system, where only the damping ratio is related to the inner controller gain,

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Fig. 10. Multiloop control of the CSI system in stationary frame.

Fig. 11. CSI control scheme with virtual harmonic damper.

both the resonant frequency and the damping ratio of a CSI system are affected by the inner voltage regulator. Note that, by assuming Rf = 0, the resonant frequency in a CSI system is also constant. However, this resonant frequency will vary due to the series connection of the CSI system to the outer system, which are mainly inductive due to the inductive load and line impedance. The series-connected inductance will add to the lter inductance and seriously affect the resonance frequency. As the LC resonant frequency for a CSI system will vary in a wide range, depending on the load, it is difcult to use the control-signal-shaping techniques discussed in Section II-C. As a damping method immune to resonant frequency variations, the virtual harmonic damper is particularly suitable for such a CSI system. A close examination of the four possible locations of the virtual resistor in Fig. 6 reveals that, by emulating a physical damping resistor (Rh ) in parallel with the CSI output capacitor, the virtual harmonic control scheme can be easily realized with the capacitor voltage feedback (this also represents a duality with the VSI, where a virtual damping resistor in series with the lter inductor is preferred). The CSI control scheme with virtual harmonic damper is shown in Fig. 11, where the damping current (current owing into the damping resistor) is obtained as IDamp = VC /Rh , which is then subtracted from Iinv before being fed to the CSI PWM modulator. As mentioned earlier, in order to avoid interference with the fundamental current control loop and to prevent overmodulation caused by the relatively large amplitude, the fundamental component should be ltered out to ensure that the damping current IDamp only contains harmonic current components. This can be done by using a high-pass lter (HPF) in the synchronous frame or a digital notch lter in the stationary frame. With good steady-state performance, the HPF and digital notch lter, however, will degrade the transient damping performance for the virtual harmonic damper, particularly when this is a disturbance from the lter capacitor feedback voltage. This is caused by the tradeoff between the dynamic response and high-

frequency signal distortion in both the HPF and the digital notch lter (e.g., a smaller cutoff frequency in an HPF gives slow response, while a larger cutoff frequency leads to highfrequency signal distortions). To ensure the proper damping of LC resonance and considering the low LC resonant frequency for a low-switching CSC, the retrieval of undistorted harmonic signal is the prevailing factor, and this gives rise to the undesirable transient IDamp overshoot [45]. To reduce this overshoot, a larger virtual resistance Rh is required (see Fig. 11), which might lead to an incomplete resonance damping. A possible solution to avoid the undesirable transient caused by the ltering process is to let the virtual resistor loop respond to only the disturbance signals [36]. To realize this, a compensation control block needs to be designed to ensure that the reference to output transfer function is unchanged with the addition of virtual resistor loop. However, with an unchanged reference to output transfer function, the virtual resistor loop might not properly respond to the LC resonance excited by a sudden reference change. Finally, it is commented that in a low-switching high-power CSC system, multisampling needs to be implemented for the virtual resistor control loop to ensure a high-samplingfrequency-to-harmonic-frequency ratio and, therefore, a stable and effective control loop at harmonic frequencies. IV. C LOSED -L OOP C ONTROL OF R ECTIFIERS W ITH I NPUT LC F ILTER LC lter circuits are also commonly used in VSR and CSR to improve the input-line-current waveforms. For the rectier control, either a single-loop or a multiloop control scheme can be used, with the outer loop being the dc current for a CSR system and the dc voltage for a VSR system. As a rectier system is interfaced to the grid, any disturbance in the grid will also excite the LC resonance. A. Closed-Loop Control of CSR A CSR system with input LC lter circuit is shown in Fig. 12. Similar to that in a CSI system, the lter inductor in a CSR system is in series connection to the outer system. However, as the outer system in a CSR is the line impedance, which will only vary in a small range [44], the LC resonance in a CSR system is relatively xed. As a result, the controlsignal-shaping method could be implemented. On the other hand, the virtual harmonic damper can also be employed for a CSR system to emulate physical resistors in parallel with the

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Fig. 12. Three-phase CSR system with input LC lter. Fig. 14. Control scheme for the CSR with both virtual harmonic damper and three-step compensator.

Fig. 13. Compensation principle of the three-step compensator.

input lter capacitor (similar to the implementation to a CSI system). However, the implementation of these control techniques on a CSR system is subject to two complications. First, unlike a high-switching VSC system, the ratio of Td /Ts is low for a low-switching CSC system, which will lead to signicant delay time error during digital implementation if the two-step Posicast controller is used. The second complication is the transient damping performance degradation caused by the HPF or notch lter, as mentioned earlier for the CSI system, which is particularly important here as a rectier is subject to frequent grid voltage transients/disturbances. To achieve accurate waveform-shaping compensation, one method is to change the sampling frequency and switching frequency according to the system resonant frequency, as reported in [38]. Considering the application complexity, a better way is to use the accurate three-step compensator [45] by separating the step response into three steps with magnitudes of A1 A2 A3 and delay times of Td and 2Td for the second and third steps, respectively, as shown in Fig. 13. The transfer function of such a three-step compensator is shown as GTh = A1 + A2 eTd s + A3 e2Td s . (6)

Fig. 15. Bode plots of the CSR input current (Iw ) disturbance to the line current (Is ).

To avoid the delay time error, the delay time Td for the three-step compensator can be rst selected according to the system switching and sampling frequencies to ensure an integer Td /Ts . The magnitudes of the three segment steps can then be calculated as follows for accurate implementation 1 A1 = 12 cos en Td +e2n Td 2 cos en Td A2 = 12 cos en Td +e2n Td (7) 2n Td A3 = 12 cos ee n Td +e2n Td where n and are the plant natural frequency and damping ratio and = (Td /Tr )2 is the angle delay corresponding to Td in time domain, with Tr being the resonance period. By separating a single-step response into three segment steps with (6) and (7), each segment response has the same oscillatory term (determined by the lightly damped plant) but with its own magnitude

and delay time (determined by the three-step compensator). Once the third segment step is added, the compensator reaches its steady state, resulting in a smooth summation response. Similar to the two-step Posicast controller, the three-step compensator can be implemented conveniently without changing the existing switching and sampling frequencies. Note that this method is still sensitive to line-impedance variations, which result in incomplete LC resonance compensation. Furthermore, the modulation-signal-shaping techniques cannot compensate for disturbances outside of the dc-current control loop, such as the grid voltage disturbance. On the other hand, the virtual harmonic damper can be realized in a similar way as in a CSI system by measuring the lter capacitor voltage and applying an HPF or a notch lter. This damping method is immune to resonant frequency variations. However, its dynamic response is degraded, as discussed earlier. To improve the dynamics of harmonic damper control loop, a larger virtual resistor value has to be selected to reduce the overshoot but at the expense of longer resonance settling time. In order to complement each others functionalities, a combination of both methods would be a better solution [45]. Fig. 14 shows the control scheme of a CSR system with both the control-signal-shaping compensator and the virtual harmonic damper. A single dc-current feedback loop is implemented here, while more control loops can also be used for reactive power control or power factor regulation [32]. The system damping performance is shown in Fig. 15, where it

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TABLE I PARAMETERS OF THE VSC SYSTEM

Fig. 16. Three-phase VSR system with input LC lter.

can be seen that the three-step compensator can accurately eliminate the resonant peak, while the virtual resistor alone cannot completely dampen the resonance due to the large resistance required for transient overshoot reduction. By using the combination damping method, the CSR system has a negative notch at the resonant frequency. This negative notch provides an additional margin for the three-step compensator to withstand system parameter variations. As shown in Fig. 15, with a 50% increase of lter inductance, the three-step compensator alone leads to a residual resonant peak. This residual resonant peak can be effectively reduced by the virtual resistor if both damping methods are employed. Finally, similar to the two-step Posicast controller, the three-step compensator also exhibits multiple-notch-lter like characteristic. B. Closed-Loop Control of VSR A three-phase VSR with input LC lter circuit is shown in Fig. 16. A multiloop control scheme is usually used for such a system, with an outer dc voltage control loop and an inner converter input current (Iin ) control loop. The inner loop functions to provide more control exibilities by regulating the reactive power or power factor. Although the multiloop tuning considerations discussed in Section II-B are also applicable here, further tuning of the dc voltage controller (usually a PI controller) using the zero-pole placement technique is a more common practice for a rectier system [33], [45]. Similar to a CSR system, both the virtual harmonic damper and control-signal-shaping techniques can be used for a VSR system to the dampen resonance from different sources. For the virtual harmonic damper loop, a virtual resistor in parallel with the lter inductor (Lf ) or capacitor can be easily implemented in a VSR system with inner current (Iin ) control loop [36], and the implementation of Rh in parallel with the lter capacitor is preferred here because the capacitor voltage is normally measured for the purpose of grid synchronization. Although similar control strategy can be implemented, the presence of an additional inductor (Lin ) at the VSR input, which is required to assist in device commutations in a VSC, actually makes the lter circuit an LCL lter. Since this paper focuses on the converter system with LC lter circuit, the VSR system is not further discussed. More discussions of the control issues related to an LCL lter can be found in [33] and [37]. V. E XPERIMENTAL I NVESTIGATIONS Experimental investigation results from both a highswitching IGBT-based VSC system and a low-switching IGCTbased CSC system are obtained to illustrate the LC resonance

Fig. 17.

Experimental DVR system based on VSI.

damping performance. For the VSC system, a 200-kVA DVR system is employed (Table I). Fig. 17 shows the experimental DVR system, which consists of series-connected injection transformers, a three-phase VSI, inverter output LC lters, and a dc-link capacitor. The power system upstream to the DVR is emulated by a programmable voltage source and a step-up transformer, which steps up the voltage source output from 380-V to 10-kV level. A step-down transformer is used to transform the 10-kV voltage back to 380 V before connecting the load. The basic operational principle of the DVR is to inject an appropriate voltage in series and protect the downstream loads during upstream voltage sags. In this experiment, both linear and nonlinear loads are employed. The single-loop control with reference feedforward scheme [Fig. 2(a)] is implemented. For further resonance damping, the two-step Posicast controller is inserted within the control loop. Fig. 18 shows the transient waveforms when the DVR is started upon the detection of an upstream voltage sag (source voltage drops from 1 to 0.8 p.u.). A linear load is employed at the downstream side. It can be seen that with the singleloop control, the start-up transient is subject to serious LC resonance, and the two-step Posicast controller can effectively eliminate this resonance, even with a small digital implementation error, as discussed in Section II-C. Fig. 19 shows the VSI systems start-up transient under a nonlinear load (diode rectier with a capacitor and a resistor connected in parallel). As shown, with the nonlinear load at downstream, the high-frequency harmonic currents continuously excite the LC resonance, and therefore, slight oscillations are added to the DVR output voltage, even during steady state. This steady-state resonance can also be compensated by the two-step Posicast controller, as shown in Fig. 19(b). Fig. 20 shows the frequency spectrum analysis of the waveforms in Fig. 19. It can be seen that the high-frequency harmonics (11th,

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TABLE II PARAMETERS OF THE CSC SYSTEM

Fig. 18. Start-up transient of DVR voltages. (a) Without Posicast control. (b) With Posicast control (with linear load).

Fig. 21. DC current under grid voltage drop. (a) Without damping. (b) With virtual resistor Rh = 1.5 p.u. (c) With virtual resistor Rh = 4 p.u.

Fig. 19. Start-up transient of DVR voltages. (a) Without Posicast control. (b) With Posicast control (with nonlinear load).

Fig. 20. Frequency spectra of DVR voltage. (a) Without Posicast control. (b) With Posicast control (with nonlinear load).

13th, and 17th) around the DVR LC resonant frequency are effectively reduced by using the Posicast control, resulting in a decreased total harmonic distortion.

Experimental results obtained from a CSC system are also obtained. A 10-kVA CSR prototype setup, as shown in Fig. 12, is employed with the parameters shown in Table II. For the experimental system, the source voltage is emulated by a programmable source at 208 V. The IGCT-based CSR system is operated with a low switching frequency of 540 Hz. The combination of the control-signal-shaping method (with three-step compensator) and the virtual harmonic damper is implemented in the CSR system (as shown in Fig. 14) to dampen the LC resonance from different sources. Triple sampling is used for the virtual harmonic resistor realization to ensure a stable and effective control loop (with an effective-sampling-frequencyto-resonant-frequency ratio of about 14 : 1). The experimental results are shown in Figs. 2123. Fig. 21 shows the results from a grid voltage disturbance (a voltage drop from 1.0 to 0.8 p.u.). The dc-link currents with virtual resistors Rh = 1.5 p.u. and Rh = 4 p.u. are shown in Fig. 21(b) and (c), respectively. Compared to the dc current without damping [Fig. 21(a)], it is obvious that the HPF in the virtual harmonic resistor gives rise to the degraded transient of the dc current. However, this dc-current transient overshoot can be effectively reduced with a larger virtual resistor. Fig. 22 shows the CSR system performance under a dccurrent reference change. As can be seen in Fig. 22(a), with a dc-current reference change from 15 to 5 A, an obvious LC resonance is present in the line current if no damping

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VI. C ONCLUSION In this paper, the control and damping of both VSC and CSC systems with LC lters have been investigated. It is shown that the LC resonance will appear in both VSC and CSC systems, even with a multiloop control scheme. This LC resonance can be effectively dampened by employing control-signal-shaping techniques. For converter systems with a variable LC resonance, the virtual harmonic resistive damper can be implemented. It was also shown that the combination of the virtual harmonic damper and control signal shaping can be used to address the transient issue associated with the virtual harmonic damper and the parameter sensitivity of control-signal-shaping methods. This combination approach is particularly suitable for a grid-interfacing converter system considering the grid voltage disturbances and limited variation range of grid impedance. Experimental investigations have been conducted on both a highswitching VSI system and a low-switching CSR system. It has been shown that with proper damping techniques implemented, both transient performance and steady-state waveforms can be improved. R EFERENCES
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Fig. 22. Line current under dc-current reference change. (a) Without damping. (b) With virtual resistor. (c) With both damping methods.

Fig. 23. Line current under dc-current reference change. (a) Accurate threestep damping. (b) Inaccurate three-step damping. (c) Combination damping method (with inaccurate three-step damping).

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Yun Wei Li (S04M06) received the B.Sc. in Engineering degree from Tianjin University, Tianjin, China, in 2002, and the Ph.D. degree from Nanyang Technological University, Singapore, in 2006. In 2005, he was a Visiting Scholar with the Institute of Energy Technology, Aalborg University, Aalborg East, Denmark. From 2006 to 2007, he was a Postdoctoral Research Fellow with the Department of Electrical and Computer Engineering, Ryerson University, Toronto, ON, Canada. Since leaving Rockwell Automation Canada in 2007, he has been an Assistant Professor with the Department of Electrical and Computer Engineering, University of Alberta, Edmonton, AB, Canada. His research interests include distributed generation, microgrid, power quality, power converters, and electric motor drives.