Biu din thng tin trong my tnh I. H nh phn (Binary) I.1.

Khi nim: H nh phn hay h m c s 2 ch c hai con s 0 v 1. l h m da theo v tr. Gi tr ca mt s bt k no tu thuc vo v tr ca n. Cc v tr c trng s bng bc lu tha ca c s 2. Chm c s -c gi l chm nh phn trong h m c s 2. Mi mt con s nh phn -c gi l mt bit (BInary digiT). Bit ngoi cng bn tri l bit c trng s ln nht (MSB, Most Significant Bit) v bit ngoi cng bn phi l bit c trng s nh nht (LSB, Least Significant Bit) nh- d-i y: 23 22 21 20 2-1 2-2 MSB 1 0 1 0 . 1 1 LSB Chm nh phn S nh phn (1010.11)2 c th biu din thnh: (1010.11)2 = 1*23 + 0*22 + 1*21 + 0*20 + 1*2-1 + 1*2-2 = (10.75)10. Ch : dng du ngoc n v ch s d-i k hiu c s ca h m. I.2. Bin i t nh phn sang thp phn V d : Bin i s nh phn (11001)2 thnh s thp phn: Trng s v tr: 24 23 22 21 20 Gi tr v tr: 16 8 4 2 1 S nh phn: 1 1 0 0 1 S thp phn: 1*24 + 1*23 + 0*22 + 0*21 + 1*20 = (25)10 I.3. Bin i thp phn thnh nh phn thc hin vic i t thp phn sang nh phn, ta p dng ph-ng php chia lp nh- sau: ly s thp phn chia cho c s thu -c mt th-ng s v s d-. S d- -c ghi li lm mt thnh t ca s nh phn. Sau , s th-ng li -c chia cho c s mt ln na c th-ng s th 2 v s d- th 2. S d- th hai l con s nh phn th hai. Qu trnh tip din cho n khi s th-ng bng 0. V d 1: Bin i s thp phn (29)10 thnh nh phn:

29/2 = 14 + 1(LSB) 14/2 = 7 + 0 7/2 = 3 + 1 3/2 = 1 + 1 1/2 = 0 + 1(MSB) Vy (29)10 = (1101)2 . i vi phn l ca cc s thp phn, s l -c nhn vi c s v s nh -c ghi li lm mt s nh phn. Trong qu trnh bin i, s nh u chnh l bit MSB v s nh cui l bit LSB. V d 2: Bin i s thp phn (0.625)10 thnh nh phn: 0.625*2 = 1.250. S nh l 1, l bit MSB. 0.250*2 = 0.500. S nh l 0 0.500*2 = 1.000. S nh l 1, l bit LSB. Vy : (0.625)10 = (0.101)2. II. H thp lc phn (Hexadecima). II.1. Khi nim: Cc h my tnh hin i th-ng dng mt h m khc l h thp lc phn. H thp lc phn l h m da vo v tr vi c s l 16. H ny dng cc con s t 0 n 9 v cc k t t A n F nh- trong bng sau: Bng 2.1 H thp lc phn: Thp lc phn Thp phn 0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 A 10 B 11 C 12 D 13 14 E Nh phn 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110

15

1111

II.2.Bin i thp lc phn thnh thp phn. Cc s thp lc phn c th -c bin i thnh thp phn bng cch tnh tng ca cc con s nhn vi gi tr v tr ca n. V d : Bin i cc s a.(5B)16. b. (2AF)16 thnh thp phn. a. S thp lc phn: 5 B Trng s v tr: 161 160 Gi tr v tr : 16 1 S thp phn: 5*16 + B*1 = (91)10. b. S thp lc phn: 2 A F Trng s v tr: 162 161 160 Gi tr v tr : 256 16 1 S thp phn: 2*256 + A*16 + F*1 = (687)10.

II.3.Bin i thp phn thnh thp lc phn. bin i cc s thp phn thnh thp lc phn, ta s dng ph-ng php chia lp, vi c s 16. V d : Bin i (1776)10 thnh thp lc phn. 1776/16 = 111 + 0 (LSB). 111/16 = 6 + 15 hoc F. 6/16 = 0 + 6 (MSB). S thp lc phn: (6F0)16. II.4. Bin i thp lc phn thnh nh phn. Cc s thp lc phn rt d i thnh nh phn. Thc ra cc s thp lc phn cng ch l mt cch biu din cc s nh phn thun li hn m thi (bng 2-1). i cc s thp lc phn thnh nh phn, ch cn thay th mt cch n gin tng con s thp lc phn bng bn bit nh phn t-ng -ng ca n. V d: i s thp lc (DF6)16 thnh nh phn: D F 6 1101 1111 0110 (DF6)16 = (110111110110)2. II.5. Bin i nh phn thnh thp lc phn.

 bin i mt s nh phn thnh s thp lc phn t-ng -ng th ch cn gp li thnh tng nhm gm 4 bit nh phn, bt u t du chm nh phn. V d: Bin i s nh phn (1111101000010000)2 thnh thp lc phn. 1111 1010 0001 0000 F A 1 0 S thp lc phn: (FA10)16.

III. H BCD (Binary Code decimal). Gia h thp phn v h nh phn cn tn ti mt h lai: h BCD cho cc s h thp phn m ho bng h nh phn, rt thch hp cho cc thit b o c thm phn hin th s u ra dng cc loi n hin s khc nhau. y dng bn s h nh phn (bn bit) m ho mt s h thp phn c gi tr nm trong khong t 0..9. Nh- vy y ta khng dng ht cc t hp c th c ca 4 bit; v tm quan trng ca cc s BCD nn cc b vi x l th-ng c cc lnh thao tc vi chng. V d: (35)10 = (00110101)2. IV. Bng m ASCII.(American Standard Code for Information Interchange). Ng-i ta xy dng b m biu din cho cc k t cng nh- cc con s V cc k hiu c bit khc. Cc m gi l b m k t v s. Bng m ASCII l m 7 bit -c dng ph bin trong cc h my tnh hin nay. Vi m 7 bit nn c 27 = 128 t hp m. Mi k t (ch hoa v ch th-ng) cng nh- cc con s thp phn t 0..9 v cc k hiu c bit khc u -c biu din bng mt m s nh- bng 2-2. Vic bin i thnh ASCII v cc m k t s khc, tt nht l s dng m t-ng -ng trong bng. V d: i cc k t BILL thnh m ASCII: K t B I L L ASCII 1000010 1001001 1001100 1001100 HEXA 42 49 4C 4C

Bng 2-2: M ASCII. Bits(row)

R O W 0 1 2 3 4 5 6 7 8 9 A B C D E F B4 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 B3 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 B2 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 B1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

000
0 NUL SOH STX ETX EOT ENQ ACK BEL BS HT LF VT FF CR SO SI

Column bits(B7B6B5) 001 010 011 100 101

1 DLE DC1 DC2 DC3 DC4 NAK SYN ETB CAN EM SUB ESC FS GS RS US 2 SP ! # $ % & ( ) * + , . / 3 0 1 2 3 4 5 6 7 8 9 : ; < = > ? 4 @ A B C D E F G H I J K L M N O 5 P Q R S T U V W X Y Z [ \ ] ^ _ 6

110
7

111

\ a b c d e f g h i j k l m n o

p q r s t u v w x y z { | } ~ DEL

Control characters: NUL = Null; DLE = Data link escape; SOH = Start Of Heading; DC1 = Device control 1; DC2 = Device control 2; DC3 = Device control 3. DC4 = Device control 4; STX = Start of text; ETX = End of text; EOT = End of transmission; ENQ = Enquiry; NAK = Negative acknowlege. ACK = Acknowlege; SYN = Synidle; BEL = Bell. ETB = End od transmission block; BS = Backspace; CAN = Cancel. HT = Horizontal tab; EM = End of medium; LF = Line feed; SUB = Substitute. VT = Vertical tab; ESC = Escape; FF = From feed; FS = File separator.

SO = Shift out; RS = Record separator; SI = Shift in; US = Unit separator.

V. Biu din gi tr s trong my tnh. V.I. Biu din s nguyn. a. Biu din s nguyn khng du: Tt c cc s cng nh- cc m ... trong my vi tnh u -c biu din bng cc ch s nh phn. biu din cc s nguyn khng du, ng-i ta dng n bit. T-ng ng vi di ca s bit -c s dng, ta c cc khong gi tr xc nh nh- sau: S bit Khong gi tr n bit: 0.. 2n - 1 8 bit 0.. 255 Byte 16 bit 0.. 65535 Word b. Biu din s nguyn c du: Ng-i ta s dng bit cao nht biu din du; bit du c gi tr 0 t-ng ng vi s nguyn d-ng, bit du c gi tr 1 biu din s m. Nhvy khong gi tr s -c biu din s -c tnh nh- sau: S bit Khong gi tr: n bit 2n-1-1 8 bit -128.. 127 Short integer 16 bit -32768.. 32767 Integer 32 bit -231.. 231-1 (-2147483648.. 2147483647) Long integer V.2. Biu din s thc(s c du chm (phy) ng). C hai cch biu din s thc trong mt h nh phn: s c du chm c nh (fed point number) v s c du chm ng (floating point number). Cch th nht -c dng trong nhng b VXL(micro processor) hay nhng b vi iu khin (micro controller) c. Cch th 2 hay -c dng hin nay c chnh xc cao. i vi cch biu din s thc du chm ng c kh nng hiu chnh theo gi tr ca s thc. Cch biu din chung cho mi h m nh- sau: R = m.Be. Trong m l phn nh tr, trong h thp phn gi tr tuyt i ca n phi lun nh hn 1. S e l phn m v B l c s ca h m. C hai chun nh dng du chm ng quan trng l: chun MSBIN ca Microsoft v chun IEEE. C hai chun ny u dng h m nh phn. Th-ng dng l theo tiu chun biu din s thc ca IEEE 7541985(Institute of Electric & Electronic Engineers), l chun -c mi hng

chp nhn v -c dng trong b x l ton hc ca Intel. Bit du nm ti v tr cao nht; kch th-c phn m v khun dng phn nh tr thay i theo tng loi s thc. Gi tr s thc IEEE -c tnh nh- sau: R = (-1)S*(1+M1*2-1 + ... +Mn*2-n)*2E 7...E 0 -127. Ch : gi tr u tin M0 lun mc nh l 1. - Dng 32 bit biu din s thc, -c s thc ngn: -3,4.1038 < R < 3,4.1038 31 S 30 23 22 0 E7 - E0 |nh tr (M1 - M23)

- Dng 64 bit biu din s thc, -c s thc di: -1,7.10308 < R < 1,7.10308 63 0 S V d tnh s thc: 0100 0010 1000 1100 1110 1001 1111 1100
Phn nh tr: 2-4+2-5+2-8+2-9+2-10+2-12+2-15+ +2-16+2-17+2-18+2-19+2-20+2-21 = 0,1008906. Gi tr ngm nh l: 1,1008906. Phn m: 28+22+20 =133 Gi tr thc (bit cao nht l bit du): 133-128=6. Du: 0 = s d-ng Gi tr s thc l: R = 1,1008906.26 = 70,457.

62 E10 - E0

52 51 nh tr (M1 - M52)

Ph-ng php i s thc sang s du phy ng 32 bit: - i s thp phn thnh s nh phn.

- Biu din s nh phn d-i dng s1, xxxBy (B: c s 2). - Bit cao nht 31: ly gi tr 0 vi s d-ng, 1 vi s m. - Phn m y i sang m excess -127 ca y, -c xc nh bng cch: y + (7F)16. - Phn xxx l phn nh tr, -c -a vo t bit 22..0. V d: Biu din s thc (9,75)10 d-i dng du phy ng. Ta i sang dng nh phn: (9,75)10 = (1001.11)2 = 1,00111B3. Bit du: bit 31 = 0. M excess - 127 ca 3 l: 7F + 3 = (82)16 = 82H = (10000010)2. -c -a vo cc bit tip theo: t bit 30 n bit 23. Bit 22 lun mc nh l 0. Cui cng s thc (9,75)10 -c biu din d-i- dng du phy ng 32 bit nh- sau: 0100 0001 0001 1100 0000 0000 0000 0000
bit |31|30 23|22 0|

NH

I. B nh trong. I.1. C s v b nh. Cc b nh c th chia lm hai loi tng qut, ROM v RAM. ROM l Read-only Memory(b nh ch c) v RAM l Random-access Memory (b nh truy xut ngu nhin). Ni chung ROM cha cc d liu mt cch c nh v khng th thay i. Cn RAM c th c ra v c th ghi vo. Khi nim truy xut ngu nhin c ngha l bt k mt v tr nh no cng c th -c m ra hoc -c gi ra bt k lc no, cc thng tin khng cn phi c ra hay ghi vo mt cch tun t. V thc cht, c RAM v ROM u l truy xut ngu nhin. Ch c iu khc nhau c bn l ROM ch cho php c m khng th ghi vo n, cn RAM l b nh c th c v ghi, v th RAM -c gi l b nh c/ghi. Cu trc b nh

Hnh 2-2 trnh by s khi ca mt mch nh. Mch nh -c ni vi cc b phn khc trong my tnh thng qua cc -ng y a ch v cc -ng dy d liu ca n. Kim sot mch nh bng -ng dy cho php (enable), ring i vi RAM cn c thm -ng dy kim sot c/ghi (Read/write). Cc mch nh ni chung -c t chc d-i dng ma trn, gm nhng hng v nhng ct xc nh v tr hay a ch nh. Mi trong ma trn gi l mt phn t (cell) hay v tr nh (memory location). V tr hay phn t nh -c d tm bng cch chn a ch nh mch gii m a ch. Mch ny gm hai phn: mch chn a ch hng RAS (rowaddress selector) v mch chn a ch ct CAS (Column-address selector). Cc -ng dy a ch s chn a ch hng v ct. -ng dy enable dng m cc mch in li ra b nh theo ba trng thi. Cn -ng dy Read/write quyt nh dng thao tc s thc hin. B nh hoc l c t chc bit hoc l loi c t chc li (word organized). B nh t chc bit c th l-u gi mt bit n trong mi v tr a ch. B nh t chc li s -c la chn c mt nhm phn t nh cng mt lc vi mi v tr a ch. Mi nhm phn t nh th-ng l mt byte (8 bit), hoc mt li (16 bit). S -ng dy a ch ca mch nh s quyt nh s v tr nh cc i tnh theo cng thc sau: S v tr nh cc i = 2N. trong , N l s l-ng cc -ng a ch.

Addre s lines (m)

Memory device

Data lines (n)

Read/write enable (RAM only)

Device(chip ) enable

a. Mch nh c bn (basic memory device)

Column address selector(CAS) Memory address lines from system Read/write enable Row addres s selecto r (RAS) Data Buffers Data lines

Memory matrix

b. S khi (Block diagram) Hnh 2-2 Mch nh.

Device enable

I.2. ROM-BIOS. Bt c h my tnh no cng c mt vi mch ROM. vi mch ny cha ch-ng trnh ca h iu hnh vo ra c s BIOS (basic input/output system). Nhng ch-ng trnh ny cn thit khi ng my v ci t ch lm vic c s cho cc thit b ngoi vi. Ni chung, c th chia ROM thnh bn loi. ROM mt n (maskable ROM) l loi ROM do nh sn xut np sn d liu, khi d liu khng th thay i -c na. ROM c th np ch-ng trnh (PROM programable ROM) l loi mch m ng-i dng c th np d liu vo thng qua thit b t PROM. Khi np th cc d liu trong PROM cng khng th thay i. PROM c th xo, cn gi l EPROM (erasable PROM) l loi ROM m ng-i dng c th np d liu vo v cc d liu c th xo hoc thay i bng mt thit b c bit. EPROM c th xo bng in (electric EPROM) l loi ROM c th np v xo d liu bng in -c m khng phi s dng tia cc tms nh- vi EPROM. Trong cc my tnh hin i, ng-i ta th-ng s dng Flash BIOS dng EEPROM. Nh- vy ni dung BIOS ca my tnh c th -c thay i t-ng thch vi nhng m rng v nng cp h thng, m iu ny l

khng th thc hin i vi nhng my tnh th h c s dng BIOS dng PROM hoc EPROM. BIOS gm nhiu ch-ng trnh v hm. Phn u ca ch-ng trnh BIOS kim tra h thng my tnh, qu trnh ny gi l POST. Nu h thng s dng cc Card (th cm) Plug and Play th giai on ny chnh l lc my tnh truy nhp tham s ca th. BIOS no cng c ch-ng trnh Setup BIOS ng-i dng t chnh tham s cc thit b ngoi vi. I.3. RAM. C th chia RAM thnh hai hoi, RAM tnh (SRAM), c kh nng l-u gi s liu mi mi nu nh- khng mt ngun nui. V RAM ng (DRAM), l loi RAM phi -c lm t-i (refresh) tc l phi np li d liu ang -c l-u tr theo tng chu k. Lm t-i bng cch thc hin thao tc c hoc ghi nhc li. Cng c th lm t-i bng nhng thao tc c bit khc. Loi DRAM c mt phn t nh cao nn gi thnh kh r so vi SRAM. Cc mch nh DRAM -c dng ph bin trong cc th h my tnh hin nay. tit kim s -ng a ch v gim s chn trn IC, hu ht cc loi DRAM u dng ph-ng php a ch multiplex. Trong qu trnh c hay ghi cc -ng a ch u tin cha cc thng tin v hng ri tip sau mang thng tin v ct. kim sot thao tc ny, ng-i ta dng -ng dy RAS v CAS nh- trn hnh 2-3. Khi RAS thp th thng tin trn cc -ng a ch s -c m thng qua mch cht a ch hng (rowaddress latch). Khi CAS thp th thng tin trn cc -ng a ch s -c m thng qua mch cht a ch ct (column-address latch). Vic lm t-i bng d liu c, d liu ghi hoc bng cc thao tc ring. Mch iu khin lm t-i phi chn tun t tng hng cc phn t nh, c mi hng mt ln, cho n khi tt c cc hng u -c lm t-i. l ph-ng php lm t-i tng t. Trong qu trnh khng -c c hay ghi d liu vo b nh cho n khi kt thc qu trnh. Mt cch khc l lm t-i tng hng trong cc chu k ri rc v gi l lm t-i theo chu k n. Row A0 to A6 Row address valid Column A7 to A13

Address lines

RAS

CAS

Column address valid

CS

Chip selected Address latching timing

RAS
A0/A7 A1/A8 A2/A9 A3/A10 A4/A11 A /A 1 128 Buffers sense amps and refresh A7 Column address latch 1 128 Column Decorder CS WR Din Dout

Row addres s Latch

1 Row decorder

DRAM memory array 128x128

CAS

Hnh 2-3. S khi DRAM 16.384 bits(16Kb).

CPU B x l trung tm CPU l ct li ca mt my vi tnh. CPU thc hin mi tnh ton v x l ca h thng -- ngoi tr x l tng c-ng tnh ton c bit trong nhng h thng c mt chip n v ng x l ton,

m chip ny cng -c tch hp ngay trong cc CPU hin nay. Tt c nhng my tnh IBM v t-ng thch IBM s dng nhng b x l h Intel hoc t-ng thch vi b x l h Intel, d chnh nhng b x l c th -c nhiu cng ty khc nhau thit k v sn xut, gm AMD, IBM, Cyric... . Mt trong nhng b x l in hnh thuc h 80x86 ca Intel l b x l 8088. y l b vi x l kh n gin v v vy vic tm hiu n l t-ng i d i vi nhng ng-i bt u thm nhp vo lnh vc vi x l, mt khc vic nm vng cc vn k thut ca b vi x l 8088 s l c s nm bt -c cc k thut ca cc b x l khc trong h 80x86 ca Intel, ca cc h khc v ca cc b x l hin i ngy nay. B vi x l 8088. 1. n v giao din bus (BIU). Theo s khi trn hnh 3-1 ta thy bn trong CPU 8088 c hai khi chnh: khi phi ghp bus (bus interface unit, BIU) v khi thc hin lnh (execution unit, EU). Vic chia CPU thnh hai phn ng thi c lin h vi nhau qua m lnh lm tng ng k tc x l ca CPU. Cc bus bn trong CPU c nhim v chuyn ti tn hiu ca cc khi khc. Trong s cc bus c bus d liu 16 bit ca ALU, bus cc tn hiu iu khin EU v bus trong ca h thng BIU. Tr-c khi i ra bus ngoi hoc i vo bus trong ca b vi x l, cc tn hiu truyn trn bus th-ng -c cho i qua cc b m nng cao tnh t-ng thch cho ni ghp hoc nng cao kh nng phi ghp. BIU bao gm cc thanh ghi on (segment registers: CS, DS, SS, ES), con tr lnh IP (instruction pointer) v b iu khin logic bus (bus control logic, BCL). n v giao din BIU cn c b nh m cho m lnh. B nh ny c chiu di 4 byte (trong 8088) v 6 byte (trong 8086). B nh m m lnh -c ni vi khi iu khn CB (control block) ca n v thc hin lnh EU. B nh ny l-u tr tm thi m lnh trong mt dy gi l hng i lnh. Hng i lnh cho php b vi x l c kh nng x l xen k lin tc dng m lnh (pipelining). Hot ng ca b CPU -c chia lm ba giai on: c m lnh (operation code fetching), gii m lnh (decording) v thc hin lnh (execution). BIU -a ra a ch, c m lnh t b nh, c/ghi d liu t cc cng vo hoc b nh. Ni cch khc BIU chu trch nhim -a a ch ra bus v trao i d liu vi bus.

2. n v thc hin lnh (EU). Trong EU c khi iu khin (control unit, CU). Chnh ti bn trong khi iu khin ny c mch gii m lnh. M lnh c vo t b nh -c -a n u vo ca b gii m, cc thng tin thu -c t u ra ca n s -c -a n mch to xung iu khin, kt qu thu -c l cc dy xung khc nhau tu theo m lnh, iu khin hot ng ca cc b phn bn trong v bn ngoi CPU. Trong EU c khi s hc v lgic (arithmatic and logic unit, ALU) chuyn thc hin cc php tnh s hc v logic m ton t ca n nm trong cc thanh ghi a nng. Kt qu th-ng -c t v thanh ghi AX. Ngoi ra trong EU cn c cc thanh ghi a nng (registers: AX, BX, CX, DX, SP, BP, SI, DI), thanh ghi c FR (flag register) m cng dng ca chng s oc cp n trong phn sau. Tm li, khi CPU hot ng EU s cung cp thng tin v a ch cho BIU khi ny c lnh v d liu, cn bn thn n th gii m v thc hin lnh. 3. Cc thanh ghi. Cc thanh ghi a nng (general registers) C nhim v ghi tham s cho m lnh, y cng l ni lnh tr kt qu v sau khi -c thc hin. Nhng thanh ghi a nng ca vi x l 16 bit l: - AX (accumulator) rng 16 bit, -c chia lm hai phn: 1 byte cao AH v 1 byte thp AL. y l thanh ghi quan trng nht v chuyn -c dng cha kt qu cc thao tc lnh. C ba cch vit AX, AH, AL u c th s dng nh- nng thanh ghi ring bit. - BX (base) thanh ghi c s, rng 16 bit, cng -c chia ra lm BH v BL. y l thanh ghi th-ng dng cha a ch c s ca mt bng dng trong lnh XLAT, C ba cch vit BX, BH, BL u c th s dng nh- nhng thanh ghi ring bit. - CX (count) b m, rng 16 bit. -c chia ra lm CH v CL. Thanh ghi CX -c ng ch s ln lp trong tr-ng hp cc lnh LOOP. Thanh ghi thp CL -c dng cha (nh) s ln quay hoc dch ca cc lnh quay (rotate) v dch (shift). - DX (data) thanh ghi d liu, rng 16 bit. Thanh ghi ny cng thanh ghi AX tham gia vo cc thao tc ca php nhn hoc chia cc s 16 bit. DX cn dng cha a ch 16 bit ca cc cng cng (di hn 8 bit) trong cc lnh truy nhp cc cng ngoi vi (I/O port).

Cc thanh ghi on (segment registers) dng ghi a ch mt on b nh. Vi mch 8088/8086 c 20 -ng dy trn bus a ch. Do cc thanh ghi con tr c thanh ghi ch s ch rng 16 bit nn khng th nh a ch cho ton b nh vt l ca my tnh l (220 = 1.048.576 = 1Mbyte). V vy trong ch thc (real mode) b nh -c chia lm nhiu on mt thanh ghi con tr 16 bit c th qun l -c. Cc thanh ghi on 16 bit s ch ra a ch u ca 4 on trong b nh, dung l-ng ln nht ca mi on nh s di 216 = 64 Kbyte v ti mt thi im nht nh b vi x l ch lm vic -c vi 4 on nh 64Kbyte ny. Vic thay i gi tr ca cc thanh ghi on lm cho cc on c th dch chuyn linh hot trong khng gian 1 Mbyte, v vy cc on c th nm cch nhau khi thng tin cn l-u trong chng i hi dung l-ng 64 Kbyte hoc cng c th nm trm nhau do c nhng on khng dng ht di 64 Kbyte v v th cc on khc c th bt u ni tip ngay sau . a ch ca nh nm u on -c ghi trong mt thanh ghi on 16 bit, a ch ny gi l a ch c s. M-i su bit ny t-ng ng vi cc -ng dy a ch t A4 n A20. Nh- vy gi tr vt l ca a ch on l gi tr trong thanh ghi on dch sang tri 4 v tr. iu ny t-ng -ng vi php nhn vi 24 = 16. a ch ca cc nh khc nm trong on tnh -c bng cch cng thm vo a ch c s mt gi tr gi l a ch lch hay lch (offset), gi nh- th v n ng vi khong lch ca to mt nh c th no so vi u on. lch ny -c xc nh bi cc thanh ghi 16 bit khc ng vai tr thanh ghi lch (offset register). Nguyn tc ny dn n cng thc tnh a ch vt l (physical address) t a ch on (segment) trong thanh ghi on v a ch lch (offset) trong thanh ghi con tr nh- sau: a ch vt l = Thanh ghi on x 16 + Thanh ghi lch Vic dng hai thanh ghi nh thng tin v a ch thc cht to ra mt loi a ch gi l a ch logic v -c k hiu nh- sau: Thanh ghi on : Thanh ghi lch hay segment:offset. a ch kiu segment : offset l logic v n tn ti d-i dng gi tr ca cc thanh ghi c th bn trong CPU v khi cn thit truy nhp nh no th n phi i ra a ch vt l ri -a ln bus a ch. Vic chuyn i ny do mt b to a ch thc hin (phn t trn hnh 3-1). Vi x l 16 bit c 4 thanh ghi on nh- sau:

- CS (code segment) l thanh ghi on m 16 bit. thanh ghi ny phi hp vi con tr lnh IP ghi a ch m lnh trong b nh. a ch y l CS:IP. - DS (data segment) l thanh ghi on 16 bit cho mt on d liu. Thanh ghi ny phi hp vi hai thanh ghi ch s SI v DI nh a ch cho d liu. a ch y cho d liu cn c vo l DS:SI, cho d liu cn ghi ra l DS:DI. - SS (stack segment) l thanh ghi on 16 bit cho mt ngn xp. a ch nh ca ngn xp -c biu din cng vi con tr ngn xp SP l SS:SP. - ES (extra segment) l thanh ghi d liu ph c chiu di 16 bit. Th-ng uc dng nh a ch mt chui. ES:DI l a ch chui cn vit n (chui ch) v DS:SI l a ch chi c vo (chui ngun). Cc thanh ghi con tr v ch s c th -c dng nh- mt thanh ghi a nng 16 bit. Vi mch 8088 c tt c ba thanh ghi con tr l (IP, BP, SP) v hai thanh ghi ch s (SI, DI). Nhim v ca tng thanh ghi nh- sau: - IP (instruction pointer) l con tr ch ti lnh my tip theo. Lnh ny nm trong b nh m a ch on -c ghi trong CS. Nh- vy a ch ca m k=lnh ny l CS:IP. - BP (base pointer) l con tr c s tr v d liu b nh m a ch on -c ghi trong SS. a ch y s l SS:BP. - SP (stack pointer) l con tr ngn xp lun tr vo nh ngn xp m a ch on -c ghi trong SS. a ch y ca d liu l DS:SP. - SI (source index) l ch s ngun, tr vo d liu m a ch on -c ghi trong DS. a ch y ca d liu l DS:SI. - DI (destination index) l ch s ch, cng tr vo on d liu m a ch on ghi trong DS. a ch y ca on d liu l DS:SI. Thanh ghi c FR (flag register) y l thanh ghi kh c bit trong CPU, dng ghi trng thi kt qu cc php x l trong n v s hc v logic ALU hoc mt trng thi hot nh ca EU. Da vo cc c ny ng-i lp trnh c th c cc lnh thch hp tip theo cho b vi x l (cc lenh nhy c iu kin). Thanh ghi ny l mt thanh ghi 16 bit trong 8088/8086. Nh-ng ch c 9 bit trong thanh ghi -c nh ngha v s dng, l: x x x x O D I T S Z x: bit khng -c nh ngha. x A x P x C

Hnh 3-2. S thanh ghi c ca b vi x l 8086/8088. - Bit 0: CF (carry flag) c nh, CF=1 khi c nh hoc m-n t MSB. - Bit 2: PF (parity flag) c parity, PF phn nh tnh chn (parity) ca tng s bit 1 c trong kt qu. C PF =1 khi tng s bit 1 trong kt qu l chn (even parity, parity chn). - Bit 4: AF (auxliary carry flag) c nh ph dng cho cc php tnh vi m BCD. AF = 1 khi c nh hoc m-n t mt s BCD thp (4 bit thp) sang mt s BCD cao (4 bit cao). - Bit 6: ZF (zero flag) c rng, ZF = 1 khi kt qu bng 0. - Bit 7: SF (sing flag) c du, SF = 1 khi kt qu m. - Bit 8: TF (trap flag) c by, TF = 1 khi vi x l trong ch chy tng lnh (ch ny dng khi cn tm li trong mt ch-ng trnh). - Bit 9: IF (interrupt enable flag) c cho php ngt, IF = 1 cho php cc yu cu ngt che -c (maskable interrupt) -c tc ng. - Bit A: DF (direction flag) c h-ng. DF = 1 khi CPU lm vic vi chui k t theo th t t phi sang tri (li). - Bit B: OF (overflow) c trn, OF =1 khi kt qu v-t ra ngoi gii hn, xy ra i vi php tnh c du.