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FREQUENCY SHIFT KEYING MODULATION DEMODULATION SYSTEM TRAINER

MODEL-COM115

More than 2000 Trainers

SIGMA TRAINERS AHMEDABAD (INDIA)

INTRODUCTION This trainer has been designed with a view to provide practical / experimental knowledge of F.S.K. Modulation/Demodulation technique as practically implemented in Digital Communication systems on a SINGLE P.C.B of size. SPECIFICATIONS 1. 2. 3. Power supply requirement : 230V AC, 50 Hz.

Built in Gaussian Noise generator source. On Board Digital Data generator to generate to any binary input word with Bit clock & Word clock. Word Length Word Clock Frequency Data Format : : : : : : : 8 Bits. 8 KHz NRZ 320KHz & 640KHz. Using ASK and adder PLL. 1. 2. 320KHz for Level 1 640KHz for Level - 2

4. 5. 6. 7. 8. 9.

On Board Carrier Oscillators Frequencies Range Modulator Type Demodulator Type FSK frequencies

All parts soldered on single pin TAGs on single PCB of size 14 X 11 with complete circuit diagram Screen Printed. Standard Accessories : 1. 2. A Training Manual. Connecting Patch cords.

CIRCUIT DETAILS OF FREQUENCY SHIFT KEYING MODULATION AND DEMODULATION The FSK Modulation and Demodulation consist of following sections. 1. 2. 3. 4. 5. 6. 7. Digital Data Generator section FSK modulator using Balanced Modulator. Carrier Generator. Adder section. FSK demodulator using PLL detector Data Squarer (Comparator) Section Power supply section

(1) Digital Data Generator section:Here Digital Ics are used to generate NRZ data. This section generates Bit clock, Word clock & NRZ data. The output bits in NRZ word can be selected by pushing data selector switches. The corresponding LEDs become ON for 1 bit and OFF for 0 bit. The left hand side switch S1 produce MSB bit and right hand side switch S8 produce LSB bit. (2) FSK modulator using Balanced Modulator: IC 1496 is used as balanced modulator This IC has two inputs as it works as balanced modulator. The modulating signal is connected at pin 1 through buffer transistor BC548B. The Second input can be connected at pin 4 through buffer transistor BC548B. The RF carrier signal is connected at pin 8 through coupling capacitor from RF carrier oscillator section. The modulated outputs are available at pin 12 and 6 of this IC, which are then balanced amplified by transistor pairs -BC548B and BC558B. The final balanced modulated output is available at O/P terminal.100K preset is used to balance carrier signal while 1K preset is used to balance input audio signal. Output 1K preset is used to adjust output zero DC level. Output 2K2 preset is used to vary output level. The outputs are two ASK Modulated signals. ____ There are two ASK modulators. One is used with NRZ data and other is used with NRZ data. (3) RF Carrier Generator section: The function of this section is to generate phase synchronized carrier signal with respect to modulating digital NRZ input. It converts 640KHz and 320 Khz. TTL Clock signal in to 640KHz and 320KHz. Sinewave carriers signal using pie filter of 100uH coil and two 100 Pf capacitors. These signal are given as carrier signal to balanced modulators as one input. (4) Adder section: This section adds two input signals with unity gain. This is used to add to ASK signals to converts into FSK signal. (5) FSK demodulator: This circuit is based on PLL made of IC 4046. The free running frequency of PLL is set at 320KHz value. Hence when FSK signal having two frequency 320KHz and 640Khz is given to it input, it produced demodulated signal locked to 320Khz. Hence output is raw data signal. This signal is then given to squarer circuit. (6) Data Squarer (Comparator) section: This section converts raw data output of FSK demodulator into pure recovered data using comparator IC 311.

(7) Power supply section: The regulated power supply is used for different supply voltages. Following output D.C. Voltages are required to operate FSK Modulation demodulation system. +15V, 250mA, -15V, 250mA, + 5V, 250mA Three terminal regulators are used for different output voltages i.e. IC 7805 for + 5V, IC 7815 for +15V, IC 7915 for 15V. These ICs are supplied different dc input voltages by two Bridge rectifiers consisting of D1-D4 and D5-D8 & two 1000/25 EC and 1000/10 EC. The capacitors at each input & each output are for filtering purpose. ******************

EXPERIMENTS
(A) BLOCK DIAGRAM OF FSK MODULATION / DEMODULATION
(A) FSK MODULATOR

(B) FSK DEMODULATOR (PLL DETECTOR)

(B) EXPERIMENT PROCEDURE:-

Exp. (1). To generate FSK signal and Demodulate it by PLL detector: 1. 2. 3. 4. 5. Connect CRO Channel-1 at Carrier Clock (Ck) socket and observe it. Connect CRO Channel-1 at Bit Clock (Bk) socket and observe it. Connect CRO Channel-1 at NRZ DATA socket and observe it. Connect CRO Channel-1 at NRZ DATA socket and observe it. _______Waveform (W1) _______Waveform (W2) _______Waveform (W3) _______Waveform (W4)

Connect CRO Channel at RF Carrier socket (in carrier generator section) for frequency 320kHz and 640 KHz. Observe the waveforms on CRO for this two frequency. _____Waveform (W5 & W6) _______Waveform (W3)

6. 7. 8.

Connect CRO Channel-1 at NRZ DATA (NRZ) socket.

Connect CRO Channel 2 at the output of balance modulator-1. Observe ASK output. _______Waveform (W7) Similarly connect CRO Channel 2 at the output of balance modulator-2. Observe ASK output. _______Waveform (W8)

9. 10. 11.

Connect CRO channel-2 at output of adder. Observe FSK output. Observe recovered raw data signal at output of FSK demodulator. Observe received pure NRZ data at the output data square.

_______Waveform (W9) ______Waveform (W10) ______Waveform (W11)

Conclusion: The FSK modulation and demodulation process observed.

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TEST POINT WAVEFORMS W1. Carrier Clock Signal Ck (1.28 MHz): -

W2. Bit Clock Signal Bk (80 KHz): -

W3. NRZ Signal at NRZ terminal of Digital data generator:-

W4. NRZ Signal at NRZ terminal of Digital data generator:-

W5. R.F. Carrier Signal without modulation ( 320KHz ): -

W6. R.F. Carrier Signal without modulation ( 640KHz ): -

W7. ASK modulated output signal from BM-1 (NRZ DATA): -

W8. ASK modulated output signal from BM-2 (NRZ DATA): -

W9. FSK Modulated Output from adder section: -

W10. FSK demodulated Raw Data from demodulator section: -

W11. Recovered NRZ data at o/p of square Circuit: -

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