Академический Документы
Профессиональный Документы
Культура Документы
NC/FB0805
STB12V
L35 1
3 Q3 8550 1
L28 FB0805
MIC12V
MIC12V
15.7mA-19mA
P+5V R7 10K
BR1 GB206 1 3 2 4
R9 1K/0805
FB7 2
FB 1 STBY STBY
D
1 2 Q2 3904
R8 4K7
STANDBY C1 101
L2 1mH/0.05A/6X8 1 + EC1 10uF/400V EC3 10uF/400V 1 4.7U/1A_0805 L3 2 D16 RS1K_SMD + R163 100K/0.5W C99 222/1KV
EEL19 T2 12 D15 5V SR360 11 3 R11 1 2 Q4 8050/DIP A+5V C87 1000UF/16V 2 10UH/2A L30 1 BC11 0.1UF +5V C39 470UF/16V L6 NC/FB0805 L36
P+5V
P+5V
0.8A-1.3A
GND GND
USB/DIGI AUDIO/RGBCVBS/IR
STB12V 3 R3 100R/0805 10
1K/0805
F+
F+
4 1 2 R4 20 3 U10 TNY-275PN S S S S 9 8 5 0R/0.5W/1206 C97 100UF/35V D13 7 1 RS1K_SMD R152 2K L8 NC/FB0805 Z2 7.5V/1W_SMD 3 C106 0.1UF 1 Q7 2 BT8550 R20 STB-25V 1K R21 10K C98 100UF/35V GND R154
AC:200mA-1.4mA DC:140mA-93mA
EN
BP
+ 7 6 5
C
F-
F-
AC:200mA-1.4mA DC:140mA-93mA
510R/0805 R22 -12V R23 Z1 12V/1W_SMD C94 100UF/25V
L7
NC/FB0805
STB-25V
L1 FB0805
P-12V
P-12V
11mA-19mA
3 5551 Q6 5401
10K
R19 10K
STB12V
R5 680R
100
R150
5V +5V
R79 4.7K
R6 100K
1K
R151 1K IC1 1 Ajacent to relevant component demoting specific component shall be replaced only by the component specitied in the circuit for safety reasons Note:Damage rquring service,unplug this produce from the wall oulet and refer servicing
A
C104
0.1UF
TL431 Y1 2
R149 4.7K
222/400V
to qualifled service presonal when replacement parts are required sure the service technician has used replacement parts specified by the manufactruer or have the same characteristics,as the original parts Unauthorized substitution may result in fire,electric shock or other hazards upon completion of any service or repairs this product,Ask the service thechnician to perform safety check to determinw that product is in proper operatin condition
Design: Checked:
TITLE:
AC TO DC
EMC PART
4 3 2
Apprd:
P+12V
CVBS_C P+12V
CVBS J1
R207 1K2 TP7 16:9/TV R247 R202 1K5 R1 22 TP9 P+5V 3 CVBS_G_Y CVBS_G_Y C143 150pF Q1 BT3904 2 R176 75R TP13 SR-OUT 4 YUV-Y SL-OUT 3 8 Y_R_V Y_R_V Cr/YC-Y C132 150pF 0R Cr/YC-Y_OUT NC LMAIN-OUT R248 CVBS TP8 RMAIN-OUT 2 7 1
AUDIO 6CH
01
Cr/YC-Y_OUT YUV-Y Cb/YC-C_OUT RGB/CVBS CVBS 16:9/TV LMAIN-OUT RMAIN-OUT TP80 TP79 TP78 TP77 TP76 TP75 TP83 LMAIN-OUT RMAIN-OUT TP73 TP72 FS3
1 2 3 4 5 6 7 8 9 9PIN/2.0
10
R249 Q23 BT3904 RGB/CVBS R234 4K7 C_B_U C_B_U C138 150pF Cb/YC-C 0R Cb/YC-C_OUT
FS1
1 2
TP12 TP11 TP10 TP17 TP67 TP48 TP49 TP50 TP47 R230 10K CON3 1 2 3 4 5 6 7 8 9 9PIN/2.0 -25V F+ FP+5V DATA CLK STB IRRCV -25V FF+ P+5V R205 75R R201 75R R192 75R R229 10K
P+5V
AV4
TP3
Cr/YC-Y_OUT
TP23
Cr/YC-Y
2 4
1 3 6 8 9
Cb/YC-C
TP22
TP5
YUV-Y
TP6 SVIDEO&CVBS
B
Cb/YC-C_OUT
5 D5V R210 S/PDIF_OUT S/PDIF_OUT 56R 2 1 3 Q22 BT3904 C121 0.1uF TP81 TP82 CON13 R217 P+5V 2R/0805 R164 33R R214 27R R155 56R R14 22R
A
Close to Q22
OPTICAL_SPDIF D5V
1 2 3 3PIN/2.0
R220 MIC1 R262 2K7 R263 2K7 R271 NC/1K R272 NC/4148 0R/NC 2 1 R311 0R LRIN APWM_L-
43K
2.2K C128 160pF -12VA U7A LM4558 1 +12VA R252 47K R251 10K MUTE 8 4 + R186 2K2 3 1 2 Q27 BT3904 C131 1nF 160pF 4 -12VA 7 +12VA R255 47K 8 U7B LM4558 R231 1K R232 10K MUTE 3 RMAIN-OUT RMAIN-OUT 2 4 +12VA R292 10K MUTE R282 2K2 1 2 3 8 4 3 8 2 4 +12VA R304 47K 8 R308 10K MUTE R298 2K2 2 3 4 +12VA R303 47K 8 R293 1K R307 10K MUTE R295 2K2 2 3 + R198 2K2 1 Q25 BT3904 C124 1nF 160pF -12VA 2 3 R288 47K U8A LM4558 1 R280 1k Q32 BT3904 + C217 1nF +12VA C198 0.1uF C229 0.1uF R260 C228 0.1uF + C200 47uF/16V 33R P+12V P+12V 160pF -12VA U8B LM4558 7 +12VA R287 47K R277 1k R291 10K MUTER279 2K2 1 C184 SR-OUT Q31 BT3904 C215 1nF 0.1uF C226 0.1uF C227 0.1uF + C201 47uF/16V + 160pF -12VA 2 3 U9A LM4558 1 R296 1K 1 Q34 BT3904 + 160pF -12VA U9B 7 LM4558 1 Q33 BT3904 + C221 1nF
2
MIC2
43K
2 3
R199
1K
LMAIN-OUT
D1
LMAIN-OUT
DSPVCC33
R257 R273 NC/1K MIC_VOCAL MIC_VOCAL R12 NC/0R APWM_RC192 1.5nF R219 43K R274 1K/NC APWM_R+ R243 43K
6 5
R290 DSPVCC33 ADCVCC33 R269 NC/10K AIN ABCLK ABCLK 1 2 3 4 5 6 7 R309 U11 DVDD SDOUT BCLK FMT CAP VREF RIN CE2632 DGND MCLK LRCLK NOHP AGND AVDD LIN 14 13 12 11 10 9 8 AMCLK ALRCLK AMCLK ALRCLK R310 0R DSPVCC33 FB6 FB ADCVCC33 NC/0R R286 43K APWM_SL+ C219 1.5nF APWM_SLR285 43K
SL-OUT
AIN
ADCVCC33 LRIN
+ C208 10u/16V
C206 104
+ C209 10U/16V
+ C211 100U/16V
C212 104
47K C214
-12VA
R261
33R
P-12V
P-12V
APWM_SR+
R253 3 1 2
4.7K +
R43
3.3K
MUTE_CTL MUTE_CTL
Q28 BT3904
C197 10uF/16V
P-12V
+12V D5V D23 1 R182 R200 LL4148 2 100K 10K Q20 2 2 C231 100uF/16V 1 R301 43K 2 3 Q29 BT8550 BT8550 3 R159 100K R302 43K MUTE APWM_CEN+ APWM_CENC225 1.5nF R297 2.2K C222
CEN-OUT
C223 1nF
D22 LL4148 1
R258 47K
R259 2K
R256 100K
R305 C196 47uF/25V APWM_LFEC224 1.5nF R299 43K APWM_LFE+ R300 43K
6 5
LFE-OUT
TITLE:
AUDIO+KARAOKE
DSPVCC33
R175 4.7R
+ C179 100uF/16V
Q26 8550
D
1 3
R181
220R
LD_DVD
DSPVCC33
OPU HD65PS R221: 3.3R R224: 3.3R CN201 is used for Sanyo/Samsung/Sony OPUs
C146 1nF
C141 1nF
R189 4.7R
+ C178 100uF/16V
1 3
R167
220R
LD_CD
DVDLD CON14 24Pin OPU connector GND-LD DVD-LD NC HFM MD CD-LD VR-DVD VR-CD NC E VCC VC(VREF) GND/PD F B A RF CD/DVD_SW D C TT+ F+ FGND GND 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 DVDLD OPU_HFM CDLD VR_DVD VR_CD OPU5V VC1 RF_E 2.1V RF_F RF_B RF_A RF RF_D RF_C R317 3.3K CD_DVD PDIC Control: DVD=LOW CD=HIGH CD_DVD RFA5V OPU_HFM
R222 1R
DSPVCC33
R15
33R
2.1V
SP_MOT-
R168 2K
SPDL_SENS+
SPDL_SENS+
P+5V 1 Q37 8550 C147 0.1uF C166 0.1uF 1 + C188 47uF/16V 2 3 D18 1N4002 2 2
3V3_DRV
26
25
1 Q38 8550 3
0R R223
Q36 8550
1V8_DRV0R R226
1N4002 D19 1 2
C
1 3
Q35 8550
DSPVCC33
DSPVCC18
U5 AM5888S (value) is for AM5888s CON9 TRTR+ FOFO+ MD(DVD) VCC/NC VR(DVD) GND(DVD) LD(DVD) LD(CD) VR(CD) GND(CD) MD(CD) NC/SEL V-RF V-C V-B V-A V-D V-F V-E Vcc Vs GND 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 TACTTACT+ FACTFACT+ OPU_HFM VR_DVD DVDLD CDLD VR_CD R17 MD_CD 0R CD_DVD RF RF_C RF_B RF_A RF_D RF_F RF_E OPU5V VC1 TP60 TP88 TP59 TP87 TP58 TP86 TP57 TP56 TP85 TP55 TP54 CD_DVD RF RF_C RF_B RF_A RF_D RF_F RF_E P+5V + C175 220uF/16V TP61 TP39 C156 0.1uF LOADLOAD+ SL_MOT+ SL_MOTFACTFACT+ 24P/0.5 TP46 TP62 TP51 TP63 TP52 TP64 TP53 TP84 FOCUS_S SLED_S TRACK_S SPDL_S FOCUS_S SLED_S TRACK_S SPDL_S FOCUS_S 3V3_DRV 1V8_FB SLED_S 3V3_FB CLOSE OPEN CLOSE OPEN 1 2 3 4 5 6 7 VINFC CFCERR1(TRB_1) CFCERR2(REGO2) VINSL+ VINSL-(REGO1) VOSL(FWD) VNFFC(REV) STBY BIAS VINTK CTKERR1(TRB_2) CTKERR2(NC) VINLD PREGND 28 27 26 25 24 23 22 P+5V 8 9 10 11 12 13 14 VCC PVCC1(LOAD-) PGND(LOAD+) VOSL-(VOSL+) VOSL+(VOSL-) VOFCGND GND1 VOFC+ PVCC2 VNFTK(NC) PGND(VCC2) VOLDVOLD+ VOTKVOTK+ 21 20 19 18 17 16 15 SP_MSP_MOT+ TACTTACT+ SPDL_S VC2 TRACK_S 1V8_DRV DRVSB
MD_DVD
R160 1K 1%
R165 33K
C129 0.1uF
R240 1K 1%
VR_CD VR_DVD
R244 R245
1 2 3 4 5 6
6P 2.0: SLED & SPINDLE Con DSPVCC33 CON8 5 4 3 2 1 LOAD+ LOADTP42 TP44 TP65 R172 4.7K R162 4.7K R197 4.7K HOMESW IN_OUT_SW INSW TP66
A A
Design: Checked:
5 4 3 2 1
Apprd:
Note: While using different OPU, use the same parameter for AM5888S
Important power supply! R206 R213 R209 R211 51K 51K 22K 51K
FOCUS_S TRACK_S SPDL_S SLED_S FOCUS_S TRACK_S SPDL_S SLED_S FB1 VDDPWM FB C133 104 + C185 100uF/16V DSPVCC33
Close to Vaddis!
R206 R213 R209 R211 C164 C159 C161 C160 FCU_IORD# FCU_IOWR# FCU_SCLK FCU_CS2# FCU_CS3# FCU_WAIT# FCU_RST FCU_IRQ SLED_PWM LD_DVD LD_CD MD_DVD MD_CD 1nF 1nF 27nF 27nF 51K 51K FB5 22K 51K 15.4K 1% 0.1uF RF_F SPDL_SENS+ RF_E SPDL_SENSRF_D RF_C VDD1AFE VDDAFE FB MIC_VOCAL C155 10nF C125 104 + C186 100uF/16V OSCOUT C181 1nF RF_F SPDL_SENS+ RF_E SPDL_SENSRF_D RF_C MIC_VOCAL FB4 C168 1nF RF_B RF_A RFN RFP C142 33pF RF RF VDDDAC FB C127 104 + C187 100uF/16V DSPVCC33 R158 1M Y4 27.000MHz FB DSPVCC18 C183 104 + C180 100uF/16V OSCIN C137 33pF FB FB3 DSPVCC33
Crystal
100R 100R
VDD1AFE
VDDPWM
FLASHVCC R194 NC MEMADD18 MEMADD17 MEMADD7 MEMADD6 MEMADD5 MEMADD4 MEMADD3 MEMADD2 MEMADD1
R190 R184
RESET#
MEMWR#
TP181 TP182 . .
VDDAFE
VDDAFE
MEMADD19
VDDP GPIO[9]/MEMDAT[9] MEMDAT[1] GPIO[8]/MEMDAT[8] MEMDAT[0] MEMRD# MEMCS0# MEMADD[0] GPIO[63]/MEMCS2# GPIO[62]/FCU_IORD# GPIO[61]/FCU_IOWR# GPIO[60]/FCU_SCLK GPIO[59]/FCU_CS2# GPIO[58]/FCU_CS3# GPIO[57]/FCU_WAIT# GPIO[56]/FCU_RST IGPIO[55]/FCU_IRQ GNDC VDDC IGPIO[54]/PWMCO[5] GPIO[53]/PWMCO[4] GPIO[52]/PWMCO[3] GPIO[51]/PWMCO[2] GNDPWM GPIO[50]/PWMCO[1] VDDPWM GPIO[49]/PWMCO[0] DVD_LD CD_LD DVD_MD CD_MD VDDSAFE GNDREF RESOUT VREF VC GND1AFE H G GNDAFE F K E J D C VDDAFE B A VDD1AFE RFN RFP
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
A15 BYTE# A14 A13 A12 A11 A10 A9 A8 NC A19 A20 WE# RP# VPP NC WP# NC A19 RY/BY# A18 A17 A7 A6 A5 A4 A3 A2 A1 SST39VF800
A16 VCCQ GND DQ15 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 VCC DQ11 DQ3 DQ10 DQ2 DQ9 DQ1 DQ8 DQ0 OE# GND CE# A0
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
MEMADD16 MEMDAT15 MEMDAT7 MEMDAT14 MEMDAT6 MEMDAT13 MEMDAT5 MEMDAT12 MEMDAT4 FLASHVCC MEMDAT11 MEMDAT3 MEMDAT10 MEMDAT2 MEMDAT9 MEMDAT1 MEMDAT8 MEMDAT0 MEMRD# MEMCS0# MEMADD0
TRACK_PWM
SPDL_PWM
I2C_DAT I2C_CLK
RESOUT VREF VC
R233 C182
U2
RF_B RF_A
Flash speed <= 70 nS. If plan to use 90ns Flash, it needs to be verified by s/w.
VC
Close to Vaddis!
VDDPLL
FB2
Close to Vaddis!
U1A
208 207 206 205 204 203 202 201 200 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 159 158 157
DSPVCC33
[39VF400/800/160]
R195 NC 0R
R194 0R NC
DSPVCC33 P+5V
R188 R169
0R NC/0R
FLASHVCC
MEMDAT2 MEMDAT10 MEMDAT3 MEMDAT11 MEMDAT4 MEMDAT12 MEMDAT5 MEMDAT13 MEMDAT6 MEMDAT14 MEMDAT7 MEMDAT15 MEMADD16
CON6 TP38 TP36 TP37 TP35 MEMDAT13 FCU_IRQ FCU_WAIT# 2 4 6 8 10 12 14 16 2 4 6 8 10 12 14 16 1 3 5 7 9 11 13 15 1 3 5 7 9 11 13 15 FCU_SCLK DSPVCC33 MEMDAT12 FCU_RST FCU_CS2# FCU_CS3# TP24 TP25 TP32 TP43 TP45 TP33 MEMADD15 MEMADD14 MEMADD13 MEMADD12 MEMADD11 MEMADD10 MEMADD9 MEMADD8 MEMWR# MEMADD18 MEMADD17 MEMADD7 MEMADD6 MEMADD5 MEMADD4 MEMADD3 FCU_IORD# R157 0R 0R CON5 1 2 2PIN/2.0 MEMADD2 MEMADD1 MEMADD19 USB_DP USB_DN RAMADD4 RAMADD3 RAMADD5 RAMADD2 RAMADD6 RAMADD1 RAMADD7
SD/MMC/MS
FCU_IOWR# R156
RAMADD[0] RAMADD[8] RAMADD[10] VDDP GNDC RAMADD[9] RAMADD[11]/GPO[64] RAMCS0# RAMBA RAMCS1#/GPO[65] RAMRAS# RAMCAS# VDDP GNDC RAMWE# RAMDQM GNDPCLK PCLK VDDPCLK RAMDAT[8] RAMDAT[7] RAMDAT[9] RAMDAT[6] VDDP GNDC RAMDAT[10] RAMDAT[5] RAMDAT[11] RAMDAT[4] RAMDAT[12] RAMDAT[3] VDDP GNDC RAMDAT[13] RAMDAT[2] VDDC RAMDAT[14] RAMDAT[1] RAMDAT[15] RAMDAT[0] VDDP RAMDQM2/RAMCKE/GPO[66] GNDC RAMCKE/SDI_PSC/GPIO[10] GPAIO/IGPIO[11] APWM7+/GPIO[12] APWM7-/GPIO[13] APWM6+/GPIO[14] APWM6-/GPIO[15] APWM5+/GPIO[16] APWM5-/GPIO[17] AIN/SPDIFIN/IO[18]
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52
MEMDAT[2] MEMDAT[10]/GPIO[0] MEMDAT[3] MEMDAT[11]/GPIO[1] MEMDAT[4] MEMDAT[12]/GPIO[2] MEMDAT[5] MEMDAT[13]/GPIO[3] MEMDAT[6] MEMDAT[14]/GPIO[4] GNDC MEMDAT[7] MEMDAT[15] VDDC VDDP MEMADD[16] MEMCS1#/GPIO[5] MEMADD[15] MEMADD[14] MEMADD[13] MEMADD[12] MEMADD[11] MEMADD[10] MEMADD[9] MEMADD[8] MEMWR# MEMADD[18]/GPIO[6] MEMADD[17] MEMADD[7] MEMADD[6] GNDC MEMADD[5] MEMADD[4] MEMADD[3] VDDP MEMADD[2] MEMADD[1] MEMADD[19]/IGPIO[7] USBVDD USBDP/GPO[67] USBDN/GPO[68] USBGND RAMADD[4] RAMADD[3] RAMADD[5] VDDIP GNDC RAMADD[2] RAMADD[6] RAMADD[1] RAMADD[7] VDDC
Vaddis 9
ZR36962
GNDDACBS2 RSET DAC1 VDDDAC DAC2 DAC3 VDDDAC DAC4 GNDDAC_D DAC5 XIN XO VDDPLL GNDPLL RESET# GNDC VDDC GPIO[48]/DUPRD1 GPIO[47]/DUPTD1 GPIO[46]/DUPRD0 GPIO[45]/PWMCO[5]/DUPTD0 VDDP IGPIO[44] GPIO[43]/TDO GPIO[42]/TCK GPIO[41]/TDI/NMI GPIO[40] GPIO[39] GPIO[38] IGPIO[37]/TMS/NMI GPIO[36] GPIO[35] GPIO[34]/RAMCKE/SPDIFIN GPIO[33]/AIN/SPDIFIN GPIO[32]/SPDIFO GPIO[31]/ABCLK GPIO[30]/ALRCLK VDDP GPIO[29]/AMCLK GNDC GPIO[28]/AOUT[0]/APWM0GPIO[27]/APWM0+ GPIO[26]/AOUT[1]/APWM1GPIO[25]/APWM1+ GPIO[24]/AOUT[2]/APWM2IGPIO[23]/APWM2+ GNDAPWM GPIO[22]/AOUT[3]/APWM3GPIO[21]/APWM3+ GPIO[20]/APWM4GPIO[19]/PWMCO[5]/APWM4+ VDDAPWM
156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105
Close to Vaddis
VDDDAC VDDDAC CVBS_G_Y Y_C_CVBS 75R 1% 75R 1% 75R 1% 75R 1% 75R 1% OSCIN OSCOUT VDDPLL RESET# R173 R215 R208 R174 R193 DUPRD1 DUPTD1 DUPRD0 DUPTD0 IRRCV FPC_DOUT FPC_CLK FPC_STB INSW CD_DVD'' DRVSB IN_OUT_SW CLOSE OPEN HOMESW AIN S/PDIF_OUT ABCLK ALRCLK R270 33R AMCLK APWM_LAPWM_L+ APWM_RAPWM_R+ APWM_SLAPWM_SL+ APWM_SRAPWM_SR+ APWM_CENAPWM_CEN+
D20 LL4148
C191 10uF/16V
UART: For customer model, please just keep test point close to Vaddis.
DUPRD1 DUPTD1 DUPRD0 DUPTD0 R191 R2 R203 R180 10K 1K5 10K 180R MUTE_CTL FS3 FS2 FS1 MUTE_CTL FS3 FS2 FS1 ADD FOR (D) DSPVCC33 DSPVCC33 R26 10K 3 + R25 2 D20 4148 1 4k7 R24 15K 2 1 RESET# Q8 BT3904 C2 0.1UF
C
IRRCV FPC_DOUT FPC_CLK FPC_STB INSW DRVSB IN_OUT_SW CLOSE OPEN HOMESW AIN S/PDIF_OUT ABCLK ALRCLK AMCLK APWM_LAPWM_L+ APWM_RAPWM_R+ APWM_SLAPWM_SL+ APWM_SRAPWM_SR+ APWM_CENAPWM_CEN+
MUX GPIOs
EEPROM
DSPVCC33 R179 2K R178 2K C154 104 8 7 6 5
DSPVCC33 MEMADD1
R212 1K
RAMDAT13 RAMDAT2
IPCLK
IPCLK
JP1 NC
STBY
APWM_LFE+ APWM_LFE-
RAMWERAMDQM
STBY
RAMCKE OK_DET
1 2
APWM_LFE+ APWM_LFE-
Close to Vaddis
ADD FOR STB REALLY 10K RAMCKE
R238 15K
DSPVCC33 C171 104 C151 104 C167 104 C199 104 C165 104 C122 104 C169 104 C202 104 C170 104 + C173 220uF/16V
R170 DSPVCC33
RAMDAT10 RAMDAT11
RAMDAT12 RAMDAT13
RAMDAT14 RAMDAT13
RAMDAT14 RAMDAT15
RAMDAT12 RAMDAT11
RAMDAT15
RAMDAT10 RAMDAT9
RAMDAT8 RAMDAT9
PCLK RAMDQM
SDRAM3.3V
VSS DQ15 VSSQ DQ14 DQ13 VDDQ DQ12 DQ11 VSSQ DQ10 DQ9 VDDQ DQ8 VSS NC DQMH CLK CKE NC A11 A9 A8 A7 A6 A5 A4 VSS
U4
VSS A4 A5 A6 A7 A8 A9 NC CKE CLK UDQM NC VDDQ DQ8 DQ9 VSSQ DQ10 DQ11 VDDQ DQ12 DQ13 VSSQ DQ14 DQ15 VSS
C145 104
C157 104
C162 104
C144 104
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28
RAMDQM PCLK
RAMDAT8
U3
16Mbit: K4S161622C-TC/L70
VDD A3 A2 A1 A0 A10/AP BA CS RAS CAS WE LDQM VDDQ DQ7 DQ6 VSSQ DQ5 DQ4 VDDQ DQ3 DQ2 VSSQ DQ1 DQ0 VDD
NM
[64Mbit:K4S641632H-UC70] VDD DQ0 VDDQ DQ1 DQ2 VSSQ DQ3 DQ4 VDDQ DQ5 DQ6 VSSQ DQ7 VDD DQML WE# CAS# RAS# CS# BA0 BA1 A10 A0 A1 A2 A3 VDD
SDRAM configuration: 1X16Mbit: CS0# = Low; 1X64Mbit: CS1# = Low; CS0#=BA1 SDRAM speed <=7ns Tras <=44.4ns Trp <=22.2ns
25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
SDRAM3.3V RAMADD3 RAMADD2 RAMADD1 RAMADD0 RAMADD10 RAMBA RAMCS0RAMRASRAMCASRAMWERAMDQM RAMDQM RAMWERAMCASRAMRASRAMCS1RAMBA RAMCS0RAMADD10 RAMADD0 RAMADD1 RAMADD2 RAMADD3 RAMDAT5 RAMDAT4 RAMDAT3 RAMDAT2 RAMDAT1 RAMDAT0 RAMDAT0 RAMDAT1 RAMDAT2 RAMDAT3 RAMDAT4 RAMDAT7 RAMDAT6 RAMDAT5 RAMDAT6 RAMDAT7
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
FLASH 16M
SDRAM 1*16M/4*16M
CD
ARIMA
+12V
PH681
DSP
C
+5V
MOTOR-DRIVER D5888S U5
ZR36962
YUV OUTPUT VIDEO PORT
U1
DIGTAL COAXIAL OUTPUT COAXIAL PORT
AC IN 100-240V
+5V
B
VFD DRIVER
OPERATIONAL AMPLIFIER
-21V
NJM4558 U7/U8/U9
VFD DISPLAY
Design:
MODEL: DV5312(ZORAN)
Checked:
PART NO.:
DWG NO.:DV5312-YL01-03
Apprd:
SHEET: 6
pages
VER: A
QR-RD-016A
TNY274-280
TinySwitch-III Family
Product Highlights
Lowest System Cost with Enhanced Flexibility Simple ON/OFF control, no loop compensation needed Selectable current limit through BP/M capacitor value - Higher current limit extends peak power or, in open frame applications, maximum continuous power - Lower current limit improves efciency in enclosed adapters/chargers - Allows optimum TinySwitch-III choice by swapping devices with no other circuit redesign Tight I2f parameter tolerance reduces system cost - Maximizes MOSFET and magnetics power delivery - Minimizes max overload power, reducing cost of transformer, primary clamp & secondary components ON-time extension extends low line regulation range/ hold-up time to reduce input bulk capacitance Self-biased: no bias winding or bias components Frequency jittering reduces EMI lter costs Pin-out simplies heatsinking to the PCB SOURCE pins are electrically quiet for low EMI Enhanced Safety and Reliability Features Accurate hysteretic thermal shutdown protection with automatic recovery eliminates need for manual reset Improved auto-restart delivers <3% of maximum power in short circuit and open loop fault conditions Output overvoltage shutdown with optional Zener Line under-voltage detect threshold set using a single optional resistor Very low component count enhances reliability and enables single-sided printed circuit board layout High bandwidth provides fast turn on with no overshoot and excellent transient load response Extended creepage between DRAIN and all other pins improves eld reliability EcoSmart Extremely Energy Efcient Easily meets all global energy efciency regulations No-load <150 mW at 265 VAC without bias winding, <50 mW with bias winding ON/OFF control provides constant efciency down to very light loads ideal for mandatory CEC regulations and 1 W PC standby requirements Applications Chargers/adapters for cell/cordless phones, PDAs, digital cameras, MP3/portable audio, shavers, etc.
Energy Efcient, Off-Line Switcher with Enhanced Flexibility and Extended Power Range
+ +
DC Output
PI-4095-082205
85-265 VAC
Peak or Peak or Adapter1 Open Adapter1 Open Frame2 Frame2 6W 8.5 W 10 W 13 W 16 W 18 W 20 W 11 W 15 W 19 W 23.5 W 28 W 32 W 36.5 W 5W 6W 7W 8W 10 W 12 W 14 W 8.5 W 11.5 W 15 W 18 W 21.5 W 25 W 28.5 W
Table 1. Notes: 1. Minimum continuous power in a typical nonventilated enclosed adapter measured at 50 C ambient. Use of an external heatsink will increase power capability 2. Minimum peak power capability in any design or minimum continuous power in an open frame design (see Key Application Considerations). 3. Packages: P: DIP-8C, G: SMD-8C. See Part Ordering Information.
PC Standby and other auxiliary supplies DVD/PVR and other low power set top decoders Supplies for appliances, industrial systems, metering, etc.
Description
TinySwitch-III incorporates a 700 V power MOSFET, oscillator, high voltage switched current source, current limit (user selectable) and thermal shutdown circuitry. The IC family uses an ON/OFF control scheme and offers a design exible solution with a low system cost and extended power capability.
February 2006
TNY274-280
BYPASS/ MULTI-FUNCTION (BP/M)
REGULATOR 5.85 V
LINE UNDER-VOLTAGE
DRAIN (D)
115 A
25 A
AUTORESTART COUNTER
6.4 V
FAULT PRESENT
+ -
RESET
5.85 V 4.9 V
VI
LIMIT
JITTER CLOCK
1.0 V + VT
DCMAX
THERMAL SHUTDOWN
OSCILLATOR
ENABLE/ UNDERVOLTAGE (EN/UV)
1.0 V
S Q
SOURCE (S)
PI-4077-013106
1 2
8 7
S S
6
D
S
S
PI-4078-080905
with a Zener connected from the BP/M pin to a bias winding supply. ENABLE/UNDER-VOLTAGE (EN/UV) Pin: This pin has dual functions: enable input and line under-voltage sense. During normal operation, switching of the power
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TNY274-280
MOSFET is controlled by this pin. MOSFET switching is terminated when a current greater than a threshold current is drawn from this pin. Switching resumes when the current being pulled from the pin drops to less than a threshold current. A modulation of the threshold current reduces group pulsing. The threshold current is between 60 A and 115 A. The EN/UV pin also senses line under-voltage conditions through an external resistor connected to the DC line voltage. If there is no external resistor connected to this pin, TinySwitch-III detects its absence and disables the line under-voltage function. SOURCE (S) Pin: This pin is internally connected to the output MOSFET source for high voltage power return and control circuit common. maximum duty cycle signal (DCMAX) and the clock signal that indicates the beginning of each cycle. The oscillator incorporates circuitry that introduces a small amount of frequency jitter, typically 8 kHz peak-to-peak, to minimize EMI emission. The modulation rate of the frequency jitter is set to 1 kHz to optimize EMI reduction for both average and quasi-peak emissions. The frequency jitter should be measured with the oscilloscope triggered at the falling edge of the DRAIN waveform. The waveform in Figure 4 illustrates the frequency jitter. Enable Input and Current Limit State Machine The enable input circuit at the EN/UV pin consists of a low impedance source follower output set at 1.2 V. The current through the source follower is limited to 115 A. When the current out of this pin exceeds the threshold current, a low logic level (disable) is generated at the output of the enable circuit, until the current out of this pin is reduced to less than the threshold current. This enable circuit output is sampled at the beginning of each cycle on the rising edge of the clock signal. If high, the power MOSFET is turned on for that cycle (enabled). If low, the power MOSFET remains off (disabled). Since the sampling is done only at the beginning of each cycle, subsequent changes in the EN/UV pin voltage or current during the remainder of the cycle are ignored. The current limit state machine reduces the current limit by discrete amounts at light loads when TinySwitch-III is likely to switch in the audible frequency range. The lower current limit raises the effective switching frequency above the audio range and reduces the transformer ux density, including the associated audible noise. The state machine monitors the sequence of enable events to determine the load condition and adjusts the current limit level accordingly in discrete amounts. Under most operating conditions (except when close to no-load), the low impedance of the source follower keeps the voltage on the EN/UV pin from going much below 1.2 V in the disabled state. This improves the response time of the optocoupler that is usually connected to this pin. 5.85 V Regulator and 6.4 V Shunt Voltage Clamp The 5.85 V regulator charges the bypass capacitor connected to the BYPASS pin to 5.85 V by drawing a current from the voltage on the DRAIN pin whenever the MOSFET is off. The BYPASS/MULTI-FUNCTION pin is the internal supply voltage node. When the MOSFET is on, the device operates from the energy stored in the bypass capacitor. Extremely low power consumption of the internal circuitry allows TinySwitch-III to operate continuously from current it takes from the DRAIN pin. A bypass capacitor value of 0.1 F is sufcient for both high frequency decoupling and energy storage.
600 500 VDRAIN 400 300 200 100 0 136 kHz 128 kHz
5 Time (s)
10
TNY274-280
In addition, there is a 6.4 V shunt regulator clamping the BYPASS/MULTI-FUNCTION pin at 6.4 V when current is provided to the BYPASS/MULTI-FUNCTION pin through an external resistor. This facilitates powering of TinySwitch-III externally through a bias winding to decrease the no-load consumption to well below 50 mW. BYPASS/MULTI-FUNCTION Pin Under-Voltage The BYPASS/MULTI-FUNCTION pin under-voltage circuitry disables the power MOSFET when the BYPASS/MULTIFUNCTION pin voltage drops below 4.9 V in steady state operation. Once the BYPASS/MULTI-FUNCTION pin voltage drops below 4.9 V in steady state operation, it must rise back to 5.85 V to enable (turn-on) the power MOSFET. Over Temperature Protection The thermal shutdown circuitry senses the die temperature. The threshold is typically set at 142 C with 75 C hysteresis. When the die temperature rises above this threshold the power MOSFET is disabled and remains disabled until the die temperature falls by 75 C, at which point it is re-enabled. A large hysteresis of 75 C (typical) is provided to prevent overheating of the PC board due to a continuous fault condition. Current Limit The current limit circuit senses the current in the power MOSFET. When this current exceeds the internal threshold (ILIMIT), the power MOSFET is turned off for the remainder of that cycle. The current limit state machine reduces the current limit threshold by discrete amounts under medium and light loads. The leading edge blanking circuit inhibits the current limit comparator for a short time (tLEB) after the power MOSFET is turned on. This leading edge blanking time has been set so that current spikes caused by capacitance and secondary-side rectier reverse recovery time will not cause premature termination of the switching pulse.
300 200 100 0 10 5 0
V DC-OUTPUT V
PI-4098-082305
Auto-Restart In the event of a fault condition such as output overload, output short circuit, or an open loop condition, TinySwitch-III enters into auto-restart operation. An internal counter clocked by the oscillator is reset every time the EN/UV pin is pulled low. If the EN/UV pin is not pulled low for 64 ms, the power MOSFET switching is normally disabled for 2.5 seconds (except in the case of line under-voltage condition, in which case it is disabled until the condition is removed). The auto-restart alternately enables and disables the switching of the power MOSFET until the fault condition is removed. Figure 5 illustrates auto-restart circuit operation in the presence of an output short circuit. In the event of a line under-voltage condition, the switching of the power MOSFET is disabled beyond its normal 2.5 seconds until the line under-voltage condition ends. Adaptive Switching Cycle On-Time Extension Adaptive switching cycle on-time extension keeps the cycle on until current limit is reached, instead of prematurely terminating after the DCMAX signal goes low. This feature reduces the minimum input voltage required to maintain regulation, extending hold-up time and minimizing the size of bulk capacitor required. The on-time extension is disabled during the startup of the power supply, until the power supply output reaches regulation. Line Under-Voltage Sense Circuit The DC line voltage can be monitored by connecting an external resistor from the DC line to the EN/UV pin. During power-up or when the switching of the power MOSFET is disabled in autorestart, the current into the EN/UV pin must exceed 25 A to initiate switching of the power MOSFET. During power-up, this is accomplished by holding the BYPASS/MULTI-FUNCTION pin to 4.9 V while the line under-voltage condition exists. The BYPASS/MULTI-FUNCTION pin then rises from 4.9 V to 5.85 V when the line under-voltage condition goes away. When the switching of the power MOSFET is disabled in auto-restart mode and a line under-voltage condition exists, the auto-restart counter is stopped. This stretches the disable time beyond its normal 2.5 seconds until the line under-voltage condition ends. The line under-voltage circuit also detects when there is no external resistor connected to the EN/UV pin (less than ~1 A into the pin). In this case the line under-voltage function is disabled. TinySwitch-III Operation TinySwitch-III devices operate in the current limit mode. When enabled, the oscillator turns the power MOSFET on at the beginning of each cycle. The MOSFET is turned off when the current ramps up to the current limit or when the DCMAX limit is reached. Since the highest current limit level and frequency of a TinySwitch-III design are constant, the power delivered to the
DRAIN
2500
5000
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TNY274-280
load is proportional to the primary inductance of the transformer and peak primary current squared. Hence, designing the supply involves calculating the primary inductance of the transformer for the maximum output power required. If the TinySwitch-III is appropriately chosen for the power level, the current in the calculated inductance will ramp up to current limit before the DCMAX limit is reached. Enable Function TinySwitch-III senses the EN/UV pin to determine whether or not to proceed with the next switching cycle. The sequence of cycles is used to determine the current limit. Once a cycle is started, it always completes the cycle (even when the EN/UV pin changes state half way through the cycle). This operation results in a power supply in which the output voltage ripple is determined by the output capacitor, amount of energy per switch cycle and the delay of the feedback. The EN/UV pin signal is generated on the secondary by comparing the power supply output voltage with a reference voltage. The EN/UV pin signal is high when the power supply output voltage is less than the reference voltage. In a typical implementation, the EN/UV pin is driven by an optocoupler. The collector of the optocoupler transistor is connected to the EN/UV pin and the emitter is connected to the SOURCE pin. The optocoupler LED is connected in series with a Zener diode across the DC output voltage to be regulated. When the output voltage exceeds the target regulation voltage level (optocoupler LED voltage drop plus Zener voltage), the optocoupler LED will start to conduct, pulling the EN/UV pin low. The Zener diode can be replaced by a TL431 reference circuit for improved accuracy. ON/OFF Operation with Current Limit State Machine The internal clock of the TinySwitch-III runs all the time. At the beginning of each clock cycle, it samples the EN/UV pin to decide whether or not to implement a switch cycle, and based on the sequence of samples over multiple cycles, it determines the appropriate current limit. At high loads, the state machine sets the current limit to its highest value. At lighter loads, the state machine sets the current limit to reduced values.
V EN CLOCK DC
MAX
I DRAIN
V DRAIN
PI-2749-082305
V EN
V EN CLOCK DC
CLOCK DC
MAX
MAX
I DRAIN
I DRAIN
V DRAIN
V DRAIN
PI-2667-082305
PI-2377-082305
TNY274-280
PI-2381-1030801
200
V EN
100 0 10
V DC-INPUT
CLOCK DC
MAX
5 0
BYPASS
I DRAIN
400 200 0 0 1 2
V DRAIN
Time (ms)
V DRAIN
Figure 11. Power-Up Without Optional External UV Resistor Connected to EN/UV Pin.
PI-2661-082305
PI-2348-030801
200 100
V DC-INPUT
At near maximum load, TinySwitch-III will conduct during nearly all of its clock cycles (Figure 6). At slightly lower load, it will skip additional cycles in order to maintain voltage regulation at the power supply output (Figure 7). At medium loads, cycles will be skipped and the current limit will be reduced (Figure 8). At very light loads, the current limit will be reduced even further (Figure 9). Only a small percentage of cycles will occur to satisfy the power consumption of the power supply. The response time of the ON/OFF control scheme is very fast compared to PWM control. This provides tight regulation and excellent transient response.
PI-2383-030801
Time (s)
2.5
Time (ms)
Time (s)
Figure 10. Power-Up with Optional External UV Resistor (4 M) Connected to EN/UV Pin.
Figure 13. Slow Power-Down Timing with Optional External (4 M) UV Resistor Connected to EN/UV Pin.
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TNY274-280
Power Up/Down The TinySwitch-III requires only a 0.1 F capacitor on the BYPASS/MULTI-FUNCTION pin to operate with standard current limit. Because of its small size, the time to charge this capacitor is kept to an absolute minimum, typically 0.6 ms. The time to charge will vary in proportion to the BYPASS/MULTIFUNCTION pin capacitor value when selecting different current limits. Due to the high bandwidth of the ON/OFF feedback, there is no overshoot at the power supply output. When an external resistor (4 M) is connected from the positive DC input to the EN/UV pin, the power MOSFET switching will be delayed during power-up until the DC line voltage exceeds the threshold (100 V). Figures 10 and 11 show the power-up timing waveform in applications with and without an external resistor (4 M) connected to the EN/UV pin. Under startup and overload conditions, when the conduction time is less than 400 ns, the device reduces the switching frequency to maintain control of the peak drain current. During power-down, when an external resistor is used, the power MOSFET will switch for 64 ms after the output loses regulation. The power MOSFET will then remain off without any glitches since the under-voltage function prohibits restart when the line voltage is low. Figure 12 illustrates a typical power-down timing waveform. Figure 13 illustrates a very slow power-down timing waveform as in standby applications. The external resistor (4 M) is connected to the EN/UV pin in this case to prevent unwanted restarts. No bias winding is needed to provide power to the chip because it draws the power directly from the DRAIN pin (see Functional Description above). This has two main benets. First, for a nominal application, this eliminates the cost of a bias winding and associated components. Secondly, for battery charger applications, the current-voltage characteristic often allows the output voltage to fall close to zero volts while still delivering power. TinySwitch-III accomplishes this without a forward bias winding and its many associated components. For applications that require very low no-load power consumption (50 mW), a resistor from a bias winding to the BYPASS/ MULTI-FUNCTION pin can provide the power to the chip. The minimum recommended current supplied is 1 mA. The BYPASS/MULTI-FUNCTION pin in this case will be clamped at 6.4 V. This method will eliminate the power draw from the DRAIN pin, thereby reducing the no-load power consumption and improving full-load efciency. Current Limit Operation Each switching cycle is terminated when the DRAIN current reaches the current limit of the device. Current limit operation provides good line ripple rejection and relatively constant power delivery independent of input voltage. BYPASS/MULTI-FUNCTION Pin Capacitor The BYPASS/MULTI-FUNCTION pin can use a ceramic capacitor as small as 0.1 F for decoupling the internal power supply of the device. A larger capacitor size can be used to adjust the current limit. For TNY275-280, a 1 F BP/M pin capacitor will select a lower current limit equal to the standard current limit of the next smaller device and a 10 F BP/M pin capacitor will select a higher current limit equal to the standard current limit of the next larger device. The higher current limit level of the TNY280 is set to 850 mA typical. The TNY274 MOSFET does not have the capability for increased current limit so this feature is not available in this device.
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TNY274-280
C5 2.2 nF 250 VAC VR1 P6KE150A D1 1N4007 D2 1N4007 C1 6.8 F 400 V C2 22 F 400 V R1 1 k R2 100 C4 10 nF 1 kV D5 1N4007GP D7 BYV28-200 C10 1000 F 25 V
L2 Ferrite Bead 3.5 7.6 mm
NC
T1
J1 85-265 VAC J2
6 R7 4 20 2 5 D6 UF4003
D3 1N4007
D4 1N4007
R5* 3.6 M L1 1 mH
C6 1 F 60 V
VR3 BZX79-C11 11 V
D S
BP/M
TinySwitch-III U1 TNY278P
C7 100 nF 50 V
R4 2 k 1/8 W
PI-4244-021406
Applications Example
The circuit shown in Figure 14 is a low cost, high efciency, yback power supply designed for 12 V, 1 A output from universal input using the TNY278. The supply features under-voltage lockout, primary sensed output overvoltage latching shutdown protection, high efficiency (>80%), and very low no-load consumption (<50 mW at 265 VAC). Output regulation is accomplished using a simple zener reference and optocoupler feedback. The rectied and ltered input voltage is applied to the primary winding of T1. The other side of the transformer primary is driven by the integrated MOSFET in U1. Diode D5, C2, R1, R2, and VR1 comprise the clamp circuit, limiting the leakage inductance turn-off voltage spike on the DRAIN pin to a safe value. The use of a combination a Zener clamp and parallel RC optimizes both EMI and energy efciency. Resistor R2 allows the use of a slow recovery, low cost, rectier diode by limiting the reverse current through D5. The selection of a slow diode also improves efciency and conducted EMI but should be a glass passivated type, with a specied recovery time of 2 s. The output voltage is regulated by the Zener diode VR3. When the output voltage exceeds the sum of the Zener and optocoupler
LED forward drop, current will ow in the optocoupler LED. This will cause the transistor of the optocoupler to sink current. When this current exceeds the ENABLE pin threshold current the next switching cycle is inhibited. When the output voltage falls below the feedback threshold, a conduction cycle is allowed to occur and, by adjusting the number of enabled cycles, output regulation is maintained. As the load reduces, the number of enabled cycles decreases, lowering the effective switching frequency and scaling switching losses with load. This provides almost constant efciency down to very light loads, ideal for meeting energy efciency requirements. As the TinySwitch-III devices are completely self-powered, there is no requirement for an auxiliary or bias winding on the transformer. However by adding a bias winding, the output overvoltage protection feature can be congured, protecting the load against open feedback loop faults. When an overvoltage condition occurs, such that bias voltage exceeds the sum of VR2 and the BYPASS/MULTIFUNCTION (BP/M) pin voltage (28 V+5.85 V), current begins to ow into the BP/M pin. When this current exceeds 5 mA the internal latching shutdown circuit in TinySwitch-III is activated. This condition is reset when the BP/M pin voltage drops below 2.6 V after removal of the AC input. In the example shown, on opening the loop, the OVP trips at an output of 17 V.
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TNY274-280
For lower no-load input power consumption, the bias winding may also be used to supply the TinySwitch-III device. Resistor R8 feeds current into the BP/M pin, inhibiting the internal high voltage current source that normally maintains the BP/M pin capacitor voltage (C7) during the internal MOSFET off time. This reduces the no-load consumption of this design from 140 mW to 40 mW at 265 VAC. Under-voltage lockout is congured by R5 connected between the DC bus and EN/UV pin of U1. When present, switching is inhibited until the current in the EN/UV pin exceeds 25 A. This allows the startup voltage to be programmed within the normal operating input voltage range, preventing glitching of the output under abnormal low voltage conditions and also on removal of the AC input. In addition to the simple input pi lter (C1, L1, C2) for differential mode EMI, this design makes use of E-Shield shielding techniques in the transformer to reduce common mode EMI displacement currents, and R2 and C4 as a damping network to reduce high frequency transformer ringing. These techniques, combined with the frequency jitter of TNY278, give excellent conducted and radiated EMI performance with this design achieving >12 dBV of margin to EN55022 Class B conducted EMI limits. For design exibility the value of C7 can be selected to pick one of the 3 current limits options in U1. This allows the designer to select the current limit appropriate for the application. Standard current limit (ILIMIT) is selected with a 0.1 F BP/M pin capacitor and is the normal choice for typical enclosed adapter applications. When a 1 F BP/M pin capacitor is used, the current limit is reduced (ILIMITred or ILIMIT-1) offering reduced RMS device currents and therefore improved efciency, but at the expense of maximum power capability. This is ideal for thermally challenging designs where dissipation must be minimized. When a 10 F BP/M pin capacitor is used, the current limit is increased (ILIMITinc or ILIMIT+1), extending the power capability for applications requiring higher peak power or continuous power where the thermal conditions allow.
Further exibility comes from the current limits between adjacent TinySwitch-III family members being compatible. The reduced current limit of a given device is equal to the standard current limit of the next smaller device and the increased current limit is equal to the standard current limit of the next larger device.
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For best performance of the OVP function, it is recommended that a relatively high bias winding voltage is used, in the range of 15 V-30 V. This minimizes the error voltage on the bias winding due to leakage inductance and also ensures adequate voltage during no-load operation from which to supply the BP/M pin for reduced no-load consumption. Selecting the Zener diode voltage to be approximately 6 V above the bias winding voltage (28 V for 22 V bias winding) gives good OVP performance for most designs, but can be adjusted to compensate for variations in leakage inductance. Adding additional ltering can be achieved by inserting a low value (10 to 47 ) resistor in series with the bias winding diode and/or the OVP Zener as shown by R7 and R3 in Figure 14. The resistor in series with the OVP Zener also limits the maximum current into the BP/M pin. Reducing No-load Consumption As TinySwitch-III is self-powered from the BP/M pin capacitor, there is no need for an auxillary or bias winding to be provided on the transformer for this purpose. Typical no-load consumption when self-powered is <150 mW at 265 VAC input. The addition of a bias winding can reduce this down to <50 mW by supplying the TinySwitch-III from the lower bias voltage and inhibiting the internal high voltage current source. To achieve this, select the value of the resistor (R8 in Figure 14) to provide the data sheet DRAIN supply current. In practice, due to the reduction of the bias voltage at low load, start with a value equal to 40% greater than the data sheet maximum current, and then increase the value of the resistor to give the lowest no-load consumption. Audible Noise The cycle skipping mode of operation used in TinySwitch-III can generate audio frequency components in the transformer. To limit this audible noise generation the transformer should be designed such that the peak core ux density is below 3000 Gauss (300 mT). Following this guideline and using the standard transformer production technique of dip varnishing
practically eliminates audible noise. Vacuum impregnation of the transformer should not be used due to the high primary capacitance and increased losses that result. Higher ux densities are possible, however careful evaluation of the audible noise performance should be made using production transformer samples before approving the design. Ceramic capacitors that use dielectrics such as Z5U, when used in clamp circuits, may also generate audio noise. If this is the case, try replacing them with a capacitor having a different dielectric or construction, for example a lm type. TinySwitch-lll Layout Considerations Layout See Figure 15 for a recommended circuit board layout for TinySwitch-III. Single Point Grounding Use a single point ground connection from the input lter capacitor to the area of copper connected to the SOURCE pins. Bypass Capacitor (CBP) The BP/M pin capacitor should be located as near as possible to the BP/M and SOURCE pins. Primary Loop Area The area of the primary loop that connects the input lter capacitor, transformer primary and TinySwitch-III together should be kept as small as possible. Primary Clamp Circuit A clamp is used to limit peak voltage on the DRAIN pin at turn off. This can be achieved by using an RCD clamp or a Zener (~200 V) and diode clamp across the primary winding. In all cases, to minimize EMI, care should be taken to minimize the circuit path from the clamp components to the transformer and TinySwitch-III.
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TNY274-280
TOP VIEW
HV DC INPUT
+ -
S S S S CBP
TinySwitch-III
T r a n s f o r m e r
EN/UV BP/M D
Optocoupler
DC OUT
PI-4278-013006
Figure 15. Recommended Circuit Board Layout for TinySwitch-III with Under-Voltage Lock Out Resistor.
Thermal Considerations The four SOURCE pins are internally connected to the IC lead frame and provide the main path to remove heat from the device. Therefore all the SOURCE pins should be connected to a copper area underneath the TinySwitch-III to act not only as a single point ground, but also as a heatsink. As this area is connected to the quiet source node, this area should be maximized for good heatsinking. Similarly for axial output diodes, maximize the PCB area connected to the cathode. Y-Capacitor The placement of the Y-capacitor should be directly from the primary input lter capacitor positive terminal to the common/ return terminal of the transformer secondary. Such a placement will route high magnitude common mode surge currents away from the TinySwitch-III device. Note if an input (C, L, C) EMI lter is used then the inductor in the lter should be placed between the negative terminals of the input lter capacitors.
Optocoupler Place the optocoupler physically close to the TinySwitch-III to minimizing the primary-side trace lengths. Keep the high current, high voltage drain and clamp traces away from the optocoupler to prevent noise pick up. Output Diode For best performance, the area of the loop connecting the secondary winding, the output diode and the output lter capacitor, should be minimized. In addition, sufcient copper area should be provided at the anode and cathode terminals of the diode for heatsinking. A larger area is preferred at the quiet cathode terminal. A large anode area can increase high frequency radiated EMI.
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TNY274-280
Quick Design Checklist As with any power supply design, all TinySwitch-III designs should be veried on the bench to make sure that component specications are not exceeded under worst case conditions. The following minimum set of tests is strongly recommended: 1. Maximum drain voltage Verify that VDS does not exceed 650 V at highest input voltage and peak (overload) output power. The 50 V margin to the 700 V BVDSS specication gives margin for design variation. 2. Maximum drain current At maximum ambient temperature, maximum input voltage and peak output (overload) power, verify drain current waveforms for any signs of transformer saturation and excessive leading edge current spikes at startup. Repeat under steady state conditions and verify that the leading edge current spike event is below ILIMIT(Min) at the end of the tLEB(Min). Under all conditions, the maximum drain current should be below the specied absolute maximum ratings. 3. Thermal Check At specied maximum output power, minimum input voltage and maximum ambient temperature, verify that the temperature specications are not exceeded for TinySwitch-III, transformer, output diode, and output capacitors. Enough thermal margin should be allowed for part-to-part variation of the RDS(ON) of TinySwitch-III as specied in the data sheet. Under low line, maximum power, a maximum TinySwitch-III SOURCE pin temperature of 110 C is recommended to allow for these variations.
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THERMAL IMPEDANCE
Notes: Thermal Impedance: P or G Package: 1. Measured on the SOURCE pin close to plastic interface. (JA) ........................... 70 C/W(2); 60 C/W(3) 2. Soldered to 0.36 sq. in. (232 mm2), 2 oz. (610 g/m2) copper clad. (JC)(1) ............................................... 11 C/W 3. Soldered to 1 sq. in. (645 mm2), 2 oz. (610 g/m2) copper clad.
Parameter
Symbol
SOURCE = 0 V; TJ = -40 to 125 C See Figure 16 (Unless Otherwise Specied) TJ = 25 C See Figure 4 Average Peak-Peak Jitter S1 Open
Conditions
Min
Typ
Max
Units
CONTROL FUNCTIONS Output Frequency in Standard Mode Maximum Duty Cycle EN/UV Pin Upper Turnoff Threshold Current EN/UV Pin Voltage
fOSC DCMAX IDIS IEN/UV = 25 A IEN/UV = -25 A EN/UV Current > IDIS (MOSFET Not Switching) See Note A TNY274 TNY275 TNY276 TNY277 TNY278 TNY279 TNY280 124 132 8 62 65 140 kHz %
-115 2.2 1.2 290 275 295 310 365 445 510 630
VEN IS1
V A
IS2
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TNY274-280 Conditions
Parameter
Symbol
SOURCE = 0 V; TJ = -40 to 125 C See Figure 16 (Unless Otherwise Specied) TNY274 TNY275-279 TNY280 TNY274 TNY275-279 TNY280
Min
Typ
Max
Units
VBP/M
See Note C
BP/M Pin Voltage VBP/MH Hysteresis BP/M Pin Shunt VSHUNT Voltage EN/UV Pin Line ILUV Under-Voltage Threshold CIRCUIT PROTECTION
TNY274 TJ = 25 C TNY275 TJ = 25 C
di/dt = 50 mA/s See Note E di/dt = 55 mA/s See Note E di/dt = 70 mA/s See Note E di/dt = 90 mA/s See Note E di/dt = 110 mA/s See Note E di/dt = 130 mA/s See Note E di/dt = 150 mA/s See Note E di/dt = 50 mA/s See Note E di/dt = 55 mA/s See Note E
ILIMITred
TNY274 TJ = 25 C TNY275 TJ = 25 C
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TNY274-280 Conditions
Parameter
Symbol
SOURCE = 0 V; TJ = -40 to 125 C See Figure 16 (Unless Otherwise Specied) TNY276 TJ = 25 C di/dt = 70 mA/s See Note E di/dt = 90 mA/s See Note E di/dt = 110 mA/s See Note E di/dt = 130 mA/s See Note E di/dt = 150 mA/s See Note E di/dt = 50 mA/s See Note E, F di/dt = 55 mA/s See Note E di/dt = 70 mA/s See Note E di/dt = 90 mA/s See Note E di/dt = 110 mA/s See Note E di/dt = 130 mA/s See Note E di/dt = 150 mA/s See Note E Standard Current Limit Reduced or Increased Current Limit
Min
Typ
Max
Units
Power Coefcient
I2f
A2Hz
Initial Current Limit Leading Edge Blanking Time Current Limit Delay Thermal Shutdown Temperature
mA ns ns C
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TNY274-280 Conditions
Parameter
Symbol
Min
Typ
Max
Units
CIRCUIT PROTECTION (cont.) Thermal Shutdown Hysteresis BP/M Pin Shutdown Threshold Current
TSDH 75 C
ISD
5.5
7.5
mA
1.6
2.6
3.6
32 48 22 33 16 24 9.0 13.5 6.0 9.0 4.5 6.7 3.0 4.5 50 100 200 A
ON-State Resistance
RDS(ON)
TNY277 ID = 45 mA TNY278 ID = 55 mA TNY279 ID = 65 mA TNY280 ID = 75 mA VBP/M = 6.2 V VEN/UV = 0 V VDS = 560 V TJ = 125 C See Note I VBP/M = 6.2 V VEN/UV = 0 V
IDSS1
IDSS2
15 700 50 V V
BVDSS
16
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TNY274-280 Conditions
Symbol
Min
Typ
Max
Units
tAR DCAR
TJ = 25 C See Note K TJ = 25 C
64 3
ms %
NOTES: A. IS1 is an accurate estimate of device controller current consumption at no-load, since operating frequency is so low under these conditions. Total device consumption at no-load is the sum of IS1 and IDSS2. B Since the output MOSFET is switching, it is difcult to isolate the switching current from the supply current at the DRAIN. An alternative is to measure the BP/M pin current at 6.1 V. C. BP/M pin is not intended for sourcing supply current to external circuitry. D. To ensure correct current limit it is recommended that nominal 0.1 F / 1 F / 10 F capacitors are used. In addition, the BP/M capacitor value tolerance should be equal or better than indicated below across the ambient temperature range of the target application. The minimum and maximum capacitor values are guaranteed by characterization. Nominal BP/M Pin Cap Value 0.1 F 1 F 10 F Tolerance Relative to Nominal Capacitor Value Min -60% -50% -50% MAX +100% +100% NA
E. For current limit at other di/dt values, refer to Figure 23. F. TNY274 does not set an increased current limit value, but with a 10 F BP/M pin capacitor the current limit is the same as with a 1 F BP/M pin capacitor (reduced current limit value). G. This parameter is derived from characterization. H. This parameter is derived from the change in current limit measured at 1X and 4X of the di/dt shown in the ILIMIT specication. I. IDSS1 is the worst case OFF state leakage specication at 80% of BVDSS and maximum operating junction temperature. IDSS2 is a typical specication under worst case application conditions (rectied 265 VAC) for no-load consumption calculations. J. Breakdown voltage may be checked against minimum BVDSS specication by ramping the DRAIN pin voltage up to but not exceeding minimum BVDSS. K. Auto-restart on time has the same temperature characteristics as the oscillator (inversely proportional to frequency).
E 2/06
17
TNY274-280
470 5W 470
S D
S2
S S
S
S1
2 M
BP/M EN/UV
50 V 10 V 0.1 F
150 V
NOTE: This test circuit is not applicable for current limit or output characteristic measurements.
PI-4079-080905
(internal signal) tP
DCMAX
EN/UV VDRAIN
tP = 1 fOSC
PI-2364-012699
tEN/UV
0.8
18
E 2/06
PI-4279-013006
TNY274-280
1.0
-50
-25
25
50
75
100 125
PI-4102-010906
Note: For the normalized current limit value, use the typical current limit specified for the appropriate BP/M capacitor.
150
Normalized di/dt
Figure 23. Current Limit vs. di/dt.
PI-4083-082305
PI-4082-082305
1000
100
10
TCASE=25 C TCASE=100 C
Scaling Factors: TNY274 1.0 TNY275 1.5 TNY276 2.0 TNY277 3.5 TNY278 5.5 TNY279 7.3 TNY280 11
1
2 4 6 8 10
100
200
300
400
500
600
PI-4081-082305
1.4
PI-4280-012306
1.1
1.2
19
TNY274-280
50 40
Scaling Factors: TNY274 1.0 TNY275 1.5 TNY276 2.0 TNY277 3.5 TNY278 5.5 TNY279 7.3 TNY280 11
Power (mW)
30 20 10
20
E 2/06
PI-4281-012306
1.2
Lead Finish Tape & Reel and Other Options Blank Standard Congurations
TNY 278 G N - TL
TL
DIP-8C
-E-
D S
.004 (.10)
Pin 1 -D.367 (9.32) .387 (9.83) .057 (1.45) .068 (1.73) (NOTE 6) .125 (3.18) .145 (3.68) .015 (.38) MINIMUM
Notes: 1. Package dimensions conform to JEDEC specification MS-001-AB (Issue B 7/85) for standard dual-in-line (DIP) package with .300 inch row spacing. 2. Controlling dimensions are inches. Millimeter sizes are shown in parentheses. 3. Dimensions shown do not include mold flash or other protrusions. Mold flash or protrusions shall not exceed .006 (.15) on any side. 4. Pin locations start with Pin 1, and continue counter-clockwise to Pin 8 when viewed from the top. The notch and/or dimple are aids in locating Pin 1. Pin 3 is omitted. 5. Minimum metal to metal spacing at the package body for the omitted lead location is .137 inch (3.48 mm). 6. Lead width measured at package body. 7. Lead spacing measured with the leads constrained to be perpendicular to plane T.
-T-
SEATING PLANE
.120 (3.05) .140 (3.56) .048 (1.22) .053 (1.35) .137 (3.48) MINIMUM
.008 (.20) .015 (.38) .300 (7.62) BSC (NOTE 7) .300 (7.62) .390 (9.91)
T E D
P08C
PI-3933-100504
S .010 (.25) M
E 2/06
21
TNY274-280
SMD-8C
D S .004 (.10)
-E.086 .240 (6.10) .260 (6.60) .372 (9.45) .388 (9.86) E S .010 (.25) .186 .286 .420 .046 .060 .060 .046 .080 Notes: 1. Controlling dimensions are inches. Millimeter sizes are shown in parentheses. 2. Dimensions shown do not include mold flash or other protrusions. Mold flash or protrusions shall not exceed .006 (.15) on any side. 3. Pin locations start with Pin 1, and continue counter-clockwise to Pin 8 when viewed from the top. Pin 3 is omitted. 4. Minimum metal to metal spacing at the package body for the omitted lead location is .137 inch (3.48 mm). 5. Lead width measured at package body. 6. D and E are referenced datums on the package body.
-D-
.004 (.10) .009 (.23) .004 (.10) .012 (.30) .036 (0.91) .044 (1.12)
0- 8
G08C
PI-4015-013106
22
E 2/06
TNY274-280
E 2/06
23
TNY274-280
Revision Notes D E Release nal data sheet. Corrected gure numbers and references. Date 1/06 2/06
The PI logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, EcoSmart, Clampless, E-Shield, Filterfuse, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. Copyright 2006, Power Integrations, Inc.
24
E 2/06
Specifications number
Specifications
DWN. Haneda
Creation day
Record of Revision
Date
REVD CHKD APPD
RoHS
1.0
Haneda
Kachi
Terajima
Specifications
OPA-681PH-NH
OPA-681PH-NH-2
Please approve after understanding clause 4.-(11) on sheet 14. It is considered that it was approved when there is an order before returning this specifications.
Contents explanation
CONTENTS
Scope and field of Application Test Conditions Characteristics Reliability Reliability test conditions Mechanical specifications Safety Standerd of Main Parts Dimensions Schematic diagram APC circuit diagram Optical path diagram Precautions for handling
Specifications number:
Sheet
There is a possibility for change of parts within a range of specification for the improvement.
SUPPLIER
R&D QA General Manager
Product name:
OPA-681PH-NH
Arima Devices Japan Inc.
DSF-P0027
1-1. Scope and field of Application DVD This specification apply to the optical pickup for DVD. 1-2. Test Conditions (1) Standard test environment Temperature 233 Humidity 605%RH In case that doubt does not happen to determination measurement does not matter even the following condition. Temperature 2510 Humidity 6525%RH (2) Test posture The object lens axis makes gravity direction. (3) Mechanical installation, circuit It shall not ensure suspicion from the evaluation of the test results. (4) Test disc CD: A-BEX TCD-782For test, use A-BEX TCD-782. DVD: A-BEX TDV-520CFor test, use A-BEX TDV-520C (5) Standard test conditions Except specified, test under the following conditions. [a] Mechanical condition Skew Radial skew 0 deg, Tangential skew 0 deg. Height 9.5mm The distance to a guide shaft center and the undersurface of a disc is 9.5mm. [b] Electric offset VccVcc Voltage 5.0V VcVc Voltage 2.5V Focusing offset Adjusted to the best focusing point. Radial offset D.C. 0V APCAPC circuit 3-3 APC See section 3-3. Fig..3 APC circuit diagram (6) Evaluation Disc speed Nomal speed
2-1. Characteristics 2-1-(1) Basic specifications Type Optical pickup Application Method DVD , CD-DA(Compact Disc Digital Audio) , VCD(Video CD) DVD DVD Light source Laser diode Wavelength650Min.655Typ.660Max. nm TypeADL-65075GR ManufacturerArima Optoelectronics Corporation Laser diode Wavelength770Min.790Typ.805Max. nm TypeADL-78031FR ManufacturerArima Optoelectronics Corporation PDIC 6 Divided PDIC TypePH9119A4NF1 NEC ManufacturerNEC corporation 44-wire type Astigmatic method DVDDPD method CD33-beam method Optical Objective lens DVDf=3.05mm NA=0.60 WD=1.67mm CDf=3.07mm NA=0.47 WD=1.30mm
Emitting light output at objective lens
CD CD Light source
Photo detector
Continuous Continuous
1080 %RH
-3070 Avoid dew caused by rapid thermal change. 3-1 See section 3-1 Fig.1 15g(Nom.) 45 The angle that tracking direction does with gravity direction recommends 45 or more degree.
Product name:
Specifications number:
Sheet
Product name:
Specifications number:
Sheet
OPA-681PH-NH
Arima Devices Japan Inc.
DSF-P0027
OPA-681PH-NH
Arima Devices Japan Inc.
DSF-P0027
Items
2-1-(2) Electrical performance
Condition
Tc=25 6 V 240 mW Vcc Vc Tc=25 Vcc=5.0V, Vc=2.5V RL=3k, CL=10pF(NEC) Pi=10W =780nm Pi=10W =650nm AD 195 mV min EF 350 mV min RF 330 mV min AD 205 mV min EF 370 mV min RF 345 mV min
Specifications
Items
(DVD) Laser diode Maximum ratings Po Light output power Vrl,Vrd Reverse voltage Electrical characteristics Iop Operating current Vop Operating voltage (CD) Laser diode Maximum ratings Po Light output power Vrl,Vrd Reverse voltage Electrical characteristics Iop Operating current Vop Operating voltage Actuator Focusing coil current Tracking coil current
Condition
Tc=25 CW Tc=25 Po=7mW Po=7mW 35 mA max 2.5 V max 10 mW 2 V 30 V
Specifications
(PDIC) Photo detector Maximum ratings Vcc Power supply voltage ADL-65075GR PD Allowable dissipation
Recommended power supply voltage range ADL-65075GR ADL-65075GR VoM Maximum output voltage Electrical characteristics
260 mV typ 470 mV typ 440 mV typ 275 mV typ 495 mV typ 460 mV typ 100 MHz typ 2 MHz typ 90 MHz typ
325 mV max 590 mV max 550 mV max 345 mV max 620 mV max 575 mV max max max max
Tc=25 CW Tc=25 Po=3mW Po=3mW 55 mA max 2.3 V max 45 mA typ 1.8 V typ ADL-78031FR ADL-78031FR 5 mW 2 V 30 V Laser diode Monitor pin photo diode fc Cut off frequency
Continuous Continuous
Product name:
Specifications number:
Sheet
Product name:
Specifications number:
Sheet
OPA-681PH-NH
Arima Devices Japan Inc.
DSF-P0027
OPA-681PH-NH
Arima Devices Japan Inc.
DSF-P0027
Items Condition
From focus center position D.C. at 25 at 15 KHz Frequency of amplitude peak Amplitude value in resonance frequency Q = Gain(fo) - Gain(5Hz) Frequency of amplitude peak The intersection of a higher-order resonance peak and a middle range gain
Condition
From free position D.C. at 25 at 15 KHz Frequency of amplitude peak Amplitude value in resonance frequency Q = Gain(fo) - Gain(5Hz) Frequency of amplitude peak The intersection of a higher-order resonance peak and a middle range gain
Specifications
0.4 mm 4.05.4 ohm max 15 deg 5060 Hz max 14 dB or more
Reliability spec.
Items
Focusing Movable distance Coil resistance Phase delay Resonance freq. (fo) Resonance peak value (Q)
Specifications
0.7 mm 5.57.5 ohm max 25 deg 5060 Hz max 14 dB or more
Reliability spec.
B30% C10deg
C -8Hz
C5dB
+5Hz
Higher-order resonance frequency Peak intersection frequency 5Hz Sensitivity(5Hz) 200Hz Sensitivity(200Hz)
18 KHz 10 KHz
or more or more
Higher-order resonance frequency Peak intersection frequency 5Hz Sensitivity(5Hz) 200Hz Sensitivity(200Hz) Tilt accuracy Tangential direction Radial direction
18 KHz 10 KHz
or more or more
*Measurements in terminal of ACT PCB *The above-mentioned data is without FPC and FFC
Focus 0.5 0.3 deg DVD From focus center position for DVD 0.3 deg Tracking 0.3 From free position
A0.3deg A0.3deg
*Measurements in terminal of ACT PCB *The above-mentioned data is without FPC and FFC
Direction of objective lens movement Focusing direction Fo+ When positive voltage applied to Fo+ pin, the objective lens moves toward the disc. Tracking direction TR+ When positive voltage applied toTR+ pin, the objective lens moves toward the inner of disc.
Product name:
Specifications number:
Sheet
Product name:
Specifications number:
Sheet
OPA-681PH-NH
Arima Devices Japan Inc.
DSF-P0027
OPA-681PH-NH
Arima Devices Japan Inc.
DSF-P0027
2-2. Reliability
Items
RFRF signal Signal level
Condition
DVD14T(p-p) DVDp-p level of 14T signal. CD11T(p-p) CDp-p level of 11T signal. Gain 1X(A+B+C+D) output
Specifications
Items
Condition
Test method
72 16 Leave the non-operating pickup under each condition and leave under standard environment for 72 hours and measure. If there are no suspicion, it may be measured after 16 hours regarding to the temperature test. .4h 1h 1h 1h .6h +60 +25 -20 4 hours
Non-operating test Temperature: 70 High temperature Time: 24H Low temperature Temperature: -30 Time: 24H Temperature: 40 Humidity: 90% Time: 48H Temperature: -20,60 Cycle: 5 cycles
Jitter
DVD DVD 10.5 % max. DVDData to the standard clock CD 26 nsec max. CD3T CDStandard deviation of 3T jitter
Items
Condition
Specifications
DVD 1.250.35 Vp-p CD 0.790.26 Vp-p 17 % Less than DVD 6.0 m Design value CD 6.0 m Design value
Reliability spec.
B30% B30% C20%
Focusing error signal FE=(A+C)-(B+D) S(p-p) Signal level p-p level of S-curve Signal balance Detecting range Defocus Deviation of signal S(p-p) S-curve p-p range
DVD 20 % CD 17 % Distance of best jitter position and standard position (A+C)-(B+D)<0 If (A+C)-(B+D)<0,disc closer than focalpoint. 0.120.06 Vp-p 30 % 45 deg
C20% C17%
4 10 RF Before applying the following test, leave the pickup under the condition mentioned in the left for more than 4 hours and operate the unit for 10 minutes under the same condition. Test items: jitter, RF signal level
Polarity
Items
B30% C20% C15deg Shock test Vibration test
Condition
Acceleration: 2.4G constant Frequency: 1050Hz Sweep time: 5 minutes( up & down) direction: 3 directions(X, Y, Z) Time: 0.5 hour X 3 directions, total 1.5 hours Use vibration test machine. Acceleration: 80G, 6 msecond Direction: 3 directions 6 faces(X, Y, Z) 3 times X 6 faces, total 18 times. Use shock test machine.
Test method
CD Tracking error signal TE=E-F (p-p) Signal level Signal p-p level Signal balance Grating adjustment Deviation of signal Subtract 180 from phase shift between E and F signal Position: approx. 37.5mm from center of disc
Polarity
E-F>0 If E-F>0,the spots are slipped off the track to the inside.
Product name:
Specifications number:
Sheet
Product name:
Specifications number:
Sheet
OPA-681PH-NH
Arima Devices Japan Inc.
DSF-P0027
OPA-681PH-NH
Arima Devices Japan Inc.
DSF-P0027
2-5. Safety Standerd of Main Parts 2-5-1. Connector LD03T2-24ND-01 : Manufactured by SUMIKO TEC CO LTD Parts Material Manufacture Material Generic Material Name Type DSM JAPAN ENGINEERING Socket Housing PA4/6 TS250F6D PLASTIC K.K Slider Housing POLYPLASTICS CO., LTD. PPS 1140-A1 UL Flame Class 94V-0 94V-0 UL File No E172082 E109088
FPC0.5H-SMT-24P G : Manufactured by SHANGHAI YUESHEN ELECTRONIC CO LTD Parts Material Generic Material Material Manufacture UL Flame Name Class Type DSM JAPAN ENGINEERING PA4/6 TS250F4D 94V-0 Socket Housing PLASTIC K.K 1140-A6 Slider Housing POLYPLASTICS CO., LTD. PPS 94V-0 HF2000 2-5-2. Printed circuit boards Parts PCB-ACT Towa Devices Corp. Ya Hsin Industrial Co., Ltd. FPC-OPT Shenzhen Flexcircuits Co., Ltd. FPC1020 94V-0 1, CM GT10T 94V-0 94V-0 Material Manufacture ELEMENT DENSHI CO LTD Type E36 UL Flame Class 94V-0
Product name:
Specifications number:
Sheet
Product name:
Specifications number:
Sheet
OPA-681PH-NH
Arima Devices Japan Inc.
DSF-P0027
OPA-681PH-NH
Arima Devices Japan Inc.
DSF-P0027
10
3-1. Fig.1
Dimensions
*(Lead spot): F *FPC Connection: pitch=0.5mm *Vcc=5V , Vc=2.5V *FPC/FFC Connection: pitch=0.5mm
contact side
Connector Spec.
connector
priming Ni Au Min Typ Max Min Typ Max SUMIKO TEC Au 0.056 0.0864 0.105 1.795 2.0764 2.320 LD03T2-24ND-01 YUESHEN FPC0.5H-SMT-24P G Au 0.076 0.1016 0.127 1.270 2.1590 3.048 *1 The plating thickness is a measurement value by the connector manufacturer. (n=100)
*1
Product name:
Specifications number:
Sheet
Product name:
Specifications number:
Sheet
OPA-681PH-NH
Arima Devices Japan Inc.
DSF-P0027
11
OPA-681PH-NH
Arima Devices Japan Inc.
DSF-P0027
12
4. Precautions for handling LD ITV Laser light is emitted from an object lens. Never look directly into the LD or observe the laser beam through another lens or mirror. If you need to view the beam, use an infrared viewer or an ITV camera. Take precaution against static electricity for handling the pickup, because laser diode may be destroyed by static electricity. Spread conductive rubber sheet to floor and desk and connect to ground through high impedance resistor (about 1M). Use wrist band and connect to ground through high impedance resistor (about 1M). The terminal of laser diode is shorted with solder for protecting laser diode. Open the terminal by solder iron quickly after connecting circuit. Use solder iron that metal part of iron is earth connected or insulations resistance is over 10M(500V D.C.) at working and temperature of heater chip is less than 320 degree(30W). on-off When tuning on or off the APC circuit, use power source which generate no spike current, because laser diode may be broken by over current. Take precautions not to operate laser diode over rated output level by over current. Tel03-3573-1884 CDB4 Use lens-blower carefully to blow dust on the objective lens. Please pay attention so as not to attach the dirt of fingerprint etc. to the object lens, especially to the handling. If the objective lens got dirty, wipe slightly with lens cleaning paper moistened with cleaning liquid (B4) made by JCB INDUSTRY Ltd. The storage and transport of the pickup about, the object lens please do as downward, or master bearing becomes downward. Do not store under high temperature and high humidity, low temperature and dusty environment. LDGaAs+GaAlAsAsAs2O3 AsCl31200C The LD chip is manufactured from GaAs and GaAlAs, which contains toxic As(Arsenic). The toxicity of As in this form is far lower than other As compounds such as As2O3 and AsCl3,and the As content of one chip is very small. However, avoid putting the chip in an acid or alkali solution, heating it over 200C, or putting it your mouth. Defective LDs from the production line and parts removed in servicing should be disposed of with due care. VR This pickup is already adjusted precisely. Do not decompose or readjust. Pay attention not to drop or not to shock due to rough handling. Do not touch and do not give force to following parts of the unit: a. The objective lens b. The actuator c. The variable resistor d.The laser module Due to strong magnetic circuit, pay attention not to close magnetic materials like iron. Take care of not entering small pieces of substance into the opening of the cover. DVD-LD The high frequency is superimposed to DVD-LD for the noise decrease to the laser by the return light. It is not the one to guarantee to suppress the radiation noise from customer's product in regulations though measures for the radiation level decrease are done. Do the evaluation and the examination needed in customer's product to check the symptom and the situation not predictable. FPCFFCFPCFFC Make the surface treatment in the FPCFFC contact part a gold plating when the connector for FPCFFC is a gold-plated specification. Avoid the combination of dissimilar. Otherwise, the point of contact corrodes and it causes the loose connection.
DVD Vref=0.18V
CD Vref=0.18V
DVD-LD power supply ON procedure SW2 OFF SW1 DVD ON SW2 DVD-LD ON DVD-LD power supply OFF procedure SW2 OFF SW1 OFF 3-4. Fig..4
Product name:
Specifications number:
Sheet
Product name:
Specifications number:
Sheet
OPA-681PH-NH
Arima Devices Japan Inc.
DSF-P0027
13
OPA-681PH-NH
Arima Devices Japan Inc.
DSF-P0027
14
14
top cover
13
back panel
12
decoding board
11
SCART board
10
bottom
09
loader
08
cd door
07
cd door mirror
06
power button
05
control PCBA
04
control button
03
front panel
02
01
USB cover
4
Model Name DV3 110 Exploded View Version
Item
Part Numer
Description
Qty
Scale
Prepare
Date
Material
Sheet
Authorize
Date
Number
DV3110-JG01-01
Qty
Unit
Approval
Date
2 1
View
QR-RD-014B
Procedimiento para cambio de regin All of the DVDs we default all region in firmware ,If need change pls following below way 1, Current region display: Open the loader , press 9735 on remote and press 9
2, Change region Open the loader, press 9735 and" Region code " Such as 1 ,or 2,or 3.... It can change region which you want .