P-admissible Solution Space

P-admissible solution space for Problem P:

1. the solution space is finite, 2. every solution is feasible, 3. evaluation for each configuration is possible in polynomial time and so is the implementation of the corresponding configuration, and 4. the configuration corresponding to the best evaluated solution in the space coincides with an optimal solution of P.

Slicing floorplan is not P-admissible. Why? A P-admissible floorplan representation: Sequence- Pair.
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Sequence-Pair Based Floorplanning/Placement

Murata, Fujiyoshi, Nakatake and Kajitani, Rectangle-packing-based module placement, ICCAD95. Represent a packing by a pair of module permutations called sequence-pair (e.g., (abdecf, cbfade)). The set of all sequence-pairs is a P-admissible solution space whose size is (n!)2. Search in the P-admissible solution space by simulated annealing.
Swap two modules in the first sequence. Swap two modules in both sequences. Rotate a module.

Relative Module Positions

A floorplan is a partition of a chip into rooms, each containing at most one module. Locus (right-up, left-down, up-left, down-right)
1. 2. 3. Take a non-empty room. Start at the center of the room, walk in two alternating directions to hit the sides of rooms. Continue until to reach a corner of the chip.

Positive locus: Union of right-up locus and left-down locus. Negative locus: union of up-left locus and down-right locus.

Geometrical Information
No pair of positive (negative) loci cross each other, i.e., loci are linearly ordered. Sequence-Pair (+, -): + (-) is the module permutation representing the order of positive (negative) loci. E.g., (+, -) = (abdecf, cbfade). x is after (before) x in both + and - x is right (left) to x. x is after (before) x in + and before (after) x in - xis below (above) x.

Optimal (+, +)-Packing

For every sequence-pair (+, -), there is an optimal (+, -)-packing. Horizontal constraint graph GH(V, E) (similarly for GV(V, E) ): V: source s, sink t, n vertices for modules. E: (s, x) and (x, t) for each module x, and (x, x) iff x must be left-to x. Vertex weight: 0 for s and t, width of module x for the other vertices.

Optimal (+, -)-Packing (contd)

Optimal (+, -)-packing can be obtained in O(n2) time by applying a longest path algorithm on a vertex-weighted directed acyclic graph. - GH and GV are independent. - The x and y coordinates of each module are determined by assigning the longest path length between s and the vertex of the module in GH and GV, respectively. More efficient algorithms for obtaining optimal (+, -)-packing: O(nlogn) by Takahashi, IEICE96; O(nlogn) by Tang, Tian & Wong, DATE00; O(nloglogn) by Tang & Wong, ASP-DAC01.

BSG Based Floorplanning/Placement

Nakatake, Fujiyoshi, Murata, and Kajitani, Module placement on bsg-

structure and ic layout applications, ICCAD96. A meta-grid, named the bounded-sliceline grid (BSG), is a topology defined on a plane. UBSG={Vi,j | i,j : integers, i+j : even} {Hi,j|i,j : integers, i+j : odd} where Vi,j={ (x,y) | x = i , j-1 < y < j+1 } Hi,j={ (x,y) | i-1 < x < i+1 , y = j }

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How to Find a Packing from a BSG?

Theoretical Results
For a BSG of dimension pxq to contain a globally optimal packing for n modules, both p and q must be larger than or equal to n. If p or q is less than n, there exists an instance of n modules that does not have any room assignment to lead to a globally optimal packing. The given BSG is P-admissible if its dimension is nxn or larger. The size of the solution space implied by a BSG of dimension nxn is C(n2,n)x(n!).
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Solution Perturbation
Given n modules, use the BSG of dimension rxr, where rxr must be larger than n. (Problem: how to determine r? Experiments show that a fairly good packing can be obtained unless r is close to n0.5.) Employ the simulated annealing technique. - Arbitrarily swap the contents of two rooms. - Arbitrarily rotate a module. (Not mentioned in the paper.)
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O-tree Based Floorplanning/Placement

Guo, Cheng, and Yoshimura, An o-tree representation of nonslicing floorplan and its applications, DAC99. Definitions: - A placement is L-compact (B-compact) if and only if no module can be moved left (down) from its original position with other modules positions fixed. - A placement is LB-compact (or admissible) if and only if it is both L-compact and B-compact. Given any placement P1, a corresponding admissible placement P2 can be obtained by a sequence of x-direction and y-direction compactions. The overall area of P2 is no larger than the overall area of P1.
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O-Tree Encoding
(00110100011011,adbcegf) with Depth-First-Search

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O-Tree Encoding (contd)

Space needed to store (T,): Given a tree with n nodes in addition to its root, the label of each node can be encoded into a [lg n] bit string, and hence n(2+[lg n]) bits are needed to store (T,) where 2n bits for T, and n[lg n] bits for . Number of possible (T,)s: O ( n!2 2 n 2 / n1 .5 )

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O-Tree and Placement

Horizontal O-Tree: - Suppose i is the parent of j, (i) is the set of blocks each of which appears before i in and overlaps with i in the x-coordinate projections. (00110100011011,adbcegf)
x j = xi + wi

y j = 0 | (max k ( i ) y k + hk )

Vertical O-Tree:

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O-Tree and Placement (contd)

An O-tree is admissible if its corresponding placement is admissible.

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Admissible O-Tree Transformation (AOT)

Given a horizontal O-tree T, we can first get a vertical constraint graph Gy by applying OT2OCG to T in linear time, and then get a vertical O-tree Ty by applying CG2OT to Gy in linear time. After applying the same procedures OT2OCG and CG2OT again, we can get another horizontal O-tree. The OT2OCG and CG2OT are iterated until an admissible O-tree is found.
H-O-tree
OT2OCG

Gv(B-compact)

CG2OT

V-O-tree

OT2OCG

Gh(L-compact)

CG2OT

H-O-tree...

All compactions are monotone because modules are either moved down or left. Therefore, convergence of the above iteration is assured and we can get an admissible O-tree.
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Solution Perturbation
a Select a module Bi in the O-tree (T,). b Delete Bi from the O-tree (T,). c Insert Bi in the position with the best cost value among all possible inserting positions in (T,) as an external node. d Perform a-c on it orthogonal O-tree.

Given any O-tree with n nodes, the number of possible inserting position as external nodes is 2n-1.
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A Deterministic Placement Algorithm

Perturb O-trees in sequence. - Select nodes in sequence and find the best perturb position for each of them. - A perturbed O-tree can be made admissible using AOT. Implementation is straightforward.

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B*-Tree Based Floorplanning/Placement

Chang, Chang, Wu, and Wu, B*-tree: a new representation for nonslicing floorplans, DAC00. Ideas: - From an admissible placement to a B*-tree: Left child: the lowest module on the right. Right child: the module above, with the same left-side coordinate. - From a B*-tree to a placement:

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Pros and Cons

Advantages - Binary tree based, efficient and easy. - Flexible to deal with rectangular or rectilinear modules. - Transformation between a tree and its placement takes only linear time without constructing any constraint graph. - Can evaluate area cost incrementally. - Smaller solution space: O(n!22n-2/n1.5) (same as O-tree). Disadvantages - Not a topological representation. (Neither is O-tree!)

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Coping with Pre-placed Modules

If bi cannot be placed at its fixed position ( xi , y i ), exchange bi with the module that is most close to ( i , y i ). xf f Incremental area cost update is possible. - E.g., the positions of b0, b7, b8, b11, b9, b10, and b1 (before b2 in the DFS order of T) remain unchanged after the exchange since they are in the front of b2 in the DFS order.
f f

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Coping with Rectilinear Modules

Partition a rectilinear module into rectangular sub-modules.

Keep location constraints for the sub-modules. - E.g., keep the right sub-module as the left child in the B*-tree. Align sub-modules, if necessary. Treat the sub-modules of a modules as a whole during perturbations.

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Perturbations & Solutions

Employ the simulated annealing technique. - Op1: Rotate a module. - Op2: Move a module to another place. - Op3: Swap two modules. - Op4: Remove a soft module and insert it into the best internal or external position. (The details of how to handle a soft module can be found in the paper.) Op2-Op4 need insertion and deletion operations.

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Floorplanning/Placement Based on Corner Block List

Hong, Huang, Cai, Gu, Dong, Cheng, and Gu, Corner block list: an effective and efficient topological representation of non-slicing floorplan, ICCAD00. A corner block list (CBL) is a 3-tuple (S, L, T):
S: a list of block names. L: a list of orientations of corner blocks. T: a list of attached T-junctions.
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Orientation
A corner block can be vertically (encoded as 0) or horizontally (encoded as 1) oriented:

A vertical T-junction

A horizontal T-junction
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Attached T-junctions
We need to know the number of attached Tjunctions to uniquely define a floorplan.
The following floorplans have the same corner block and orientation, but they have different number of attached T-junctions. D A B C D 2 attached T-junctions D A B C D 1 attached T-junction D A B C D 0 attached T-junction

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From a Floorplan to a CBL

b a c a c d S=() L=() T=() d S = (b) L = (0) T = (0) a d S = (cb) L = (10) T = (00) d

S = (acb) L = (010) T = (000)

S = (dacb) Note: there is no need to include the orientation and L = (010) # of attached T-junctions of the last corner T = (000) block in L and T.

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Polar Graphs and CBL

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S = (d) L = (0) T = (10) e a b

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S = (ad) L = (00) T = (010) e

S = (bad) L = (100) T = (10010) e

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Polar Graphs and CBL (contd)

S = (gbad) L = (1100) T = (1010010) e c f
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S = (egbad) L = (01100) T = (01010010)

S = (cegbad) L = (001100) T = (001010010)

S = (fcegbad) L = (001100) T = (001010010)

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Advantages
A topological representation (independent of the block size). O(n(3+lg n)) to encode a CBL. O(n!23n-3/n1.5) solution space. O(n) time to construct the CBL from a pair of polar graphs (which specifies a floorplan). O(n) time to construct the polar graphs from a CBL. O(n) time to construct a packing from a pair of polar graphs.
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Solution Perturbation
Employ the simulated annealing technique. Perturbation operations:
Randomly exchange 2 modules in S. Randomly complement a bit in L. Randomly complement a bit in T. Rotate a module by 90, 180 or 270. Reflect a module horizontally or vertically. Randomly choose an alternate shape for a soft module.
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Other Floorplan Representations

Q-sequence (APCAS-00, DATE-02) Twin binary tree (ISPD-01) Twin binary sequences (ISPD-02) TCG (DAC-01), TCG-S (DAC-02)

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Other Issues
Considering placement constraints
Range constraints (ISPD-99) Boundary constraints (ASPDAC-01) Symmetry constraints (DAC-99)

Considering timing or power

Buffer planning (ICCAD-99, ISPD-00) Power supply planning (ASPDAC-01)
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