PAPER NO: 16-5217/EXAM/S2/09

SHEFFIELD HALLAM UNIVERSITY Faculty of Arts, Computing, Engineering and Sciences

SEMESTER TWO EXAMINATIONS - MAY 2009

Module Title: Module Leaders: Analogue and Digital Electronics Timothy Mulroy Jo Jennings Module No: Time Allowed: 16-5217 3 hours plus 15 minutes reading time

Stationery requirements (per student) : 2 x 8 Page Anonymous Answer Booklet Supplementary Answer Sheets (Available on request) Linear Graph Paper (Available on Request) INSTRUCTIONS TO CANDIDATES:

1. The University Regulations on academic conduct, including cheating and plagiarism, apply to all examinations. 2. The normal examination regulations of the University apply (see script answer book). Please do NOT start writing until told to do so by the Invigilator. 3. Candidates must NOT use red ink on the script answer book. 4. The memory of any programmable/graphical calculator used during this examination must be cleared before the start of the paper. 5. Questions may be attempted in any order. 6. Show all steps followed when performing calculations. 7. Give your answers rounded to an appropriate number of significant digits. 8. Illustrate your answers by means of clearly labelled sketches when appropriate. 9. State any assumptions made. 10. Answer FIVE questions from EIGHT and at least TWO questions from each of sections A and B. 11. Use separate answer booklets for sections A and B.

PAPER NO: 16-5217/EXAM/S2/09

Section A
A1.
+9V dc supply

RT

R2

LED

ID

v+
R3

RD + vo

R1

0V

Figure A1 (a) The thermistor (RT) in Figure A1 has a large ( 33k) resistance at 0C. When RT's temperature rises, its resistance decreases, to 10k at 25C and towards 1k at 100C. Resistors R1, R2 and R3 are all 10k. (i) (ii) Calculate the voltage at v+. Explain what happens to vo and to the LED as RT's temperature rises from 0C. Suggest a simple circuit modification to allow adjustment of the thermistor temperature at which the output will switch state. [14 Marks] (b) Resistor RD is 220. The forward voltage of the LED is 2V. Estimate the maximum ID current through the LED when it is on. [3 Marks] (c) What advantage is gained by linking the LED from the op-amp's output up to the +9V dc power supply rail, rather than down to 0V ? [3 Marks]

(iii)

PAPER NO: 16-5217/EXAM/S2/09

A2. (a)

The graph of Figure A2 shows the steady state inductor (L) current, I, against time for the simple dc-dc step-down or buck converter circuit shown. Determine the converters ideal steady state Vo= d.Vs and its operating frequency, f. [5 Marks]

10

12

14

16

Time, s

18

20

switch, eg Transistor input, Vs

L output, Vo

12V

switching control signal, eg: from PWM

C D
RL

Figure A2 (b) Outline the basic operation of the switching converter, and explain how it can offer highly efficient dc-dc conversion. [10 Marks] (c) Sketch a circuit modification showing how a Zener diode combined with an operational amplifer (op-amp) and suitable resistors might be used to feedback duty cycle control. [5 Marks]

PAPER NO: 16-5217/EXAM/S2/09

A3. (a) Design an instrumentation amplifier using three operational amplifiers (op-amps), with suitable resistors, to have a differential 2R F R A signal gain, Ad = 1 + = 75. RG RB Use RG = 10k and RF = 7.5 k. Sketch your circuit diagram, indicating the differential input, vd and the output, vo. Suggest a way of making your circuit's gain adjustable. [10 Marks] (b) Outline two advantages that your instrumentation amplifier could have over a single op-amp differential amplifier design. Suggest a potential application for an instrumentation amplifier. [6 Marks] (c) Your circuit is tested with a common mode input noise, vc = 100mV, which is found to produce a common mode output, voc = 3mV. Calculate your circuit's common mode gain, Ac, and its common mode rejection ratio, CMRR. Give CMRR in decibels. [4 Marks]

PAPER NO: 16-5217/EXAM/S2/09

A4. (a) Use a sketch of the output characteristics of a bipolar junction transistor (BJT) to illustrate its Early voltage, A. V Use your sketch to show how the output resistance, ro, of a V 1 V BJT might be estimated using ro A I hoe I [6 Marks]
VCC

R1

Q3

Q4

10k

vout

IC
Q1 Q2

v1

v2

IT
Q5 Q6 Vs+ VCC 15V VsVEE VEE 15V

Figure A4 (b) Figure A4 shows a differential amplifier with a current mirror tail and an active load. Give two advantages of using active load transistors rather than discrete load resistors for integrated circuit differential amplifiers. [4 Marks] (c) (d) Estimate the tail current IT, Q2's quiescent collector current, IC and Q2's transconductance, gm 40 IC. The pnp transistors have an Early voltage of magnitude 25V, the npn transitors have an Early voltage of magnitude 75V. ro2 ro 4 Estimate the circuit's differential gain, A d gm ro2 + ro4 [6 Marks] [4 Marks]

PAPER NO: 16-5217/EXAM/S2/09

Section B

B1 You are required to design a comparator circuit that compares two numbers. Ai and Bi are the two numbers to be compared, Ci+1 and Di+1 are the inputs to your circuit from the outputs of the previous stage, and Ci and Di are the outputs from your circuit. Ci = 1 if Ai>Bi Di = 1 if Ai<Bi Ci = 0 and Di = 0 if Ai = Bi Ai B i

Ci+1 Di+1

Ci Di

Draw the truth table for this circuit, and implement it using gates and logic of your choice. State any assumptions that you make. HINT: There are 4 inputs to your circuit, Ai Bi Ci+1 and Di+1. Note that Ci+1 and Di+1 have a greater significance than Ai and Bi. (20 marks)

PAPER NO: 16-5217/EXAM/S2/09

B2 (a) Analyse the circuit shown in Figure QB2. In your analysis you must clearly show: (i) (ii) (iii) (iv) The next state functions The circuit output functions State table State diagram (14 marks)

J K X J K Clock
Figure QB2

A -A Y1 B -B

(b)

Re-implement the circuit, this time by using D-type flip-flops. (6 marks)

B3 (a) Explain the principles of Analogue to Digital (A/D) conversion, using the Successive Approximation converter method as an example. (15 marks) (b) Compare a Dual Slope A/D to a Successive Approximation A/D in terms of circuit complexity and performance. (5 marks)

PAPER NO: 16-5217/EXAM/S2/09

B4 (a) Explain why the Algorithmic State Machine (ASM) method is used in Digital System design. (6 marks) (b) Why are map entered variables (MEVs) used in simplifying the logic for ASMs? (4 marks) (c) Given the following transition table, implement it using flip-flops and gates of your choice. Present State A 0 0 0 0 0 0 0 1 1 B 0 0 0 0 1 1 1 0 1 C 0 0 1 1 0 0 1 0 0 Next State NA 0 1 0 0 0 0 1 0 0 NB 0 0 0 1 1 0 1 1 0 NC 1 0 1 1 0 1 0 0 0 Outputs Y 1 1 0 0 1 1 0 0 1 Z 1 1 0 0 1 1 0 0 0

Inputs Q 0 1 1 0 R 0 1 -

(10 marks)