Data Transfer Unit (DTU) SIM Scanning Device (SSD) 1.

Cash With drawl Energy value BuzzerPersonyour GSMAutho-rized execute using COM Ports of picture isSIMindownloaded saveSlot with Data Base base Insert Picture BankmoduleStart read in bank data PersonStopFPGAtheVoice to FPGA it Chooseisisandprogram to theUnauthorized number ProgramRun of StopGSM isis captured Connect Unauthorized andthem serial Serialcalculated person modules sounds Authorizedand Take 10 is Inserted and Annunciator SIMis pictures person number and compared the and matches 2. Balance Enquiry Alarm Unit Web Camera

Chapter

Introduction
1.

3G ATM with Face Recognition

1.1.1 ATM
An Automated Teller Machine (ATM) or the Automatic Banking Machine (ABM) is a computerized telecommunications device that provides the clients of a financial institution with access to financial transactions in a public space without the need for a cashier, human clerk or bank teller. On most modern ATMs, the customer is identified by inserting a plastic ATM card with a magnetic stripe or a plastic smartcard with a chip that contains a unique card number and some security information such as an expiration date. Authentication is provided by the customer entering a personal identification number (PIN). Using an ATM customer can access their bank accounts in order to make cash withdrawals (or credit card cash advances) and check their account balances as well as purchase cell phone prepaid credit. If the currency being withdrawn from the ATM is different from that which the bank account is denominated. Thus, ATMs often provide the best possible exchange rate for foreign travelers and are heavily used for this purpose as well. ATMs are known by various other names including Automated Transaction Machine, automated banking machine, cash point (in Britain), money machine, bank machine, cash machine, hole-in-the-wall, Multibank (after a registered trade mark, in Portugal), and Any Time Money (in India).

1.1.2 3G
International mobile Telecommunications-2000(IMT-2000), better known as 3G or 3rd generation is a family of standards for mobile telecommunications defined by the International Telecommunication Union, which includes GSM EDGE, UTMS AND CDMA 2000 as well as DECT and WIMAX as per [1]. Services include wide-area wireless voice telephone, video calls,
1

and wireless data, all in a mobile environment. Compared to 2G and 2.5G services, 3G allows simultaneous use of speech and data services and higher data rates (up to 14.0 Megabit/s on the downlink and 5.8 Megabit/s on the uplink with HSPA+). Thus, 3G networks enable network operators to offer users a wider range of more advanced services while achieving greater network capacity through improved spectral efficiency. There are evolutionary standards that are backwards-compatible extensions to preexisting 2G networks as well as revolutionary standards that require all-new networks and frequency allocations. The later group is the UMTS family, which consists of standards developed for IMT-2000, as well as the independently-developed standards DECT and WIMAX, which were included because they fit the IMT-2000 definition.

1.3.

SIM

A subscriber identity module (SIM) on a removable SIM CARD securely stores the servicesubscriber key (IMSI) used to identify a subscriber on mobile telephony devices (such as mobile phones and computers). The SIM card allows users to change phones by simply removing the SIM card from one mobile phone and inserting it into another mobile phone or broadband telephony device. SIM cards are available in two standard sizes. The first is the size of a credit card (85.60 mm 53.98 mm x 0.76 mm). The newer, more popular miniature version has a width of 15 mm, a length of 25 mm, a thickness of 0.76 mm, and has one of its corners truncated (chamfered) to prevent mis-insertion. However, most SIM cards are still supplied as a full-sized card with the smaller card held in place by a few plastic links; it can easily be broken off to be used in a phone that uses the smaller SIM.

1.4.

Project Details

Existing System:
Existing ATMs are convenient and easy to use for most consumers. Existing ATMs typically provide instructions on an ATM display screen that are read by a user to provide for interactive operation of the ATM. Having read the display screen instructions, a user is able to use and operate the ATM via data and information entered on a keypad. However the drawback in the existing
2

system is that the user should carry their ATM card without fail. But in many cases we forget it. So only we designed a system which helps us to use the ATM machine without the ATM card.

Proposed System:
In this proposed system we have created the new generation ATM machine which can be operator without the ATM card. By using this system ATM machine can be operator by using our SIM in the mobile phone. When we insert our SIM in the reader unit of the ATM machine it transfers the mobile to the server. In server we can collect the related information of the mobile number (i.e) the users account details, their photo etc. the camera presented near the ATM machine will capture the users image and compare it with the user image in the server using MATLAB according to [6]. Only when the image matches it asks the pin number and further processing starts. Otherwise the process is terminated. So by using this system need of ATM card is completely eliminated we can operate the ATM machine by using our SIM itself. By using this system malfunctions can be avoided. Our transaction will be much secured. One more application can also be added in this system for helping the blind people. In the existing system all the transactions are done through keyboard only. It may be difficult for blind people so we can also add voice enunciator to indicate each and very process to the blind people. It that enables a visually and/or hearing impaired individual to conveniently and easily carry out financial transactions or banking functions.

Figure 1.1 Accessing ATM Machine through SIM Card

3

1.2 Block Diagram

Figure 1.2 3G ATM Block Diagram

1.3 Block Description

4

Automated functions through image processing Transaction based on subscriber identity module Security maintenance by behavior recognition Effective mobile communication for entire process Alert module for preventing illicit transactions. Each process intimated by voice annunciation module Mobile scanning device scans SIM number through GSM Modem (as per [9].) through which data is given to the Teller machine for further processing. At the same time, web camera captures the images and comparing using digital signal processing. If images and PIN number are same then further processing continued. Otherwise it gives alarm through Alert module. Each processing information produces by voice annunciator module.

Chapter 2
5

Requirements
In our project, we require both hardware and software tools. They are described below.

1. Hardware Requirements

FPGA Module GSM Module Web Cam Voice Annunciation Module

2.1.1 FPGA Module

FPGAs are programmable digital logic chips which mean that we can program them to do almost any digital function.

We can download FPGAs as many time as you want - no limit - with different functionalities every time if you want. If you make a mistake in your design, just fix your "logic function", re-compile and re-download it according to [2][3]. No PCB, solder or component to change.

The designs can run much faster than if you were to design a board with discrete components, since everything runs within the FPGA, on its silicon die.

FPGAs lose their functionality when the power goes away (like RAM in a computer that loses its content). We have to re-download them when power goes back up to restore the functionality.

2.1.2 GSM Module

6

Global system for mobile communication (GSM) is a globally accepted standard for digital cellular communication. GSM is the name of a standardization group established in 1982 to create a common European mobile telephone standard that would formulate specifications for a panEuropean mobile cellular radio system operating at 900 MHz as per [9].

2.1.3 Web Cam

A webcam is a video capture device connected to a computer or computer network, often using a USB port or, if connected to a network, ethernet or Wi-Fi. The most popular use is for video telephony, permitting a computer to act as a videophone or video conferencing station. This can be used in messenger programs such as Windows Live Messenger, Skype and Yahoo messenger services. Other popular uses, which include the recording of video files or even still-images, are accessible via numerous software programs, applications and devices.

2.1.4 Voice Annunciation Module

This is mainly used in our project as Voice Annunciator. This module installation in ATM machine increases efficiency because even a blind person can access it. Also it is user friendly since it announces whether person is authorized or not and many operations that are performed in the process.

2.2 Software Requirements

MATLAB 7.0 XILINX Visual Basic

2.2.1 MATLAB
MATLAB is a numerical computing environment and fourth generation programming language. Developed by The MathWorks, MATLAB allows matrix manipulation, plotting of functions and data, 7

implementation of algorithms, creation of user interfaces, and interfacing with programs in other languages as per [6]. Although it is numeric only, an optional toolbox uses the MuPAD symbolic engine, allowing access to computer algebra capabilities. An additional package, Simulink, adds graphical multi domain simulation and Model-Based Design for dynamic and embedded systems.

2.2.2 XILINX
The Xilinx Integrated Software Environment (ISE) is an integrated design environment that allows you to design Xilinx FPGA and CPLD devices from start to finish given in [3]. A bit stream is a stream of data that contains location information for logic on a device, that is, the placement of Configurable Logic Blocks (CLBs), Input/output Blocks (IOBs), (TBUFs), pins, and routing elements. The bit stream also includes empty placeholders that are filled with the logical states sent by the device during a read back.

2.2.3 Visual Basic

Visual Basic (VB) is the third - generation event - driven programming language and integrated development environment (IDE) from Microsoft for its COM programming model. VB is also considered a relatively easy to learn and use programming language, because of its graphical development features and BASIC heritage.

2.3 Wired Connections

RS232 Cables COM Port

2.3.1 RS232 Cables

The RS232 specification governs the physical and electrical characteristics of serial communications. This specification defines several additional signals that are asserted. These signals are the Carrier Detect Signal (CD), asserted by modems to signal a successful connection to another modem, Ring Indicator (RI), asserted by modems to signal the phone ringing, Data Set Ready (DSR), asserted by modems to show their
8

presence, Clear To Send (CTS), asserted by modems if they can receive data, Data Terminal Ready (DTR), asserted by terminals to show their presence, Request To Send (RTS), asserted by terminals if they can receive data. The section RS232 Cabling describes these signals and how they are connected.

Chapter 3

GSM Modem
3.1 Definition
Global system for mobile communication (GSM) is a globally accepted standard for digital cellular communication. GSM is the name of a standardization group established in 1982 to create a

common European mobile telephone standard that would formulate specifications for a panEuropean mobile cellular radio system operating at 900 MHz.

3.2 The GSM Network

GSM provides recommendations, not requirements. The GSM specifications define the functions and interface requirements in detail but do not address the hardware. The reason for this is to limit the designers as little as possible but still to make it possible for the operators to buy equipment from different suppliers. The GSM network is divided into three major systems: the switching system (SS), the base station system (BSS), and the operation and support system (OSS) as per [9].

3.3 Introduction to GSM Wireless Modems

3.3.1 GSM Modem
A GSM modem is a wireless modem that works with a GSM wireless network. A wireless modem behaves like a dial-up modem. The main difference between them is that a dial-up modem sends and receives data through a fixed telephone line while a wireless modem sends and receives data through radio waves. A GSM modem can be an external device or a PC Card / PCMCIA Card. Typically, an external GSM modem is connected to a computer through a serial cable or a USB cable. A GSM modem in the form of a PC Card / PCMCIA Card is designed for use with a laptop computer. It should be inserted into one of the PC Card / PCMCIA Card slots of a laptop computer. Like a GSM mobile phone, a GSM modem requires a SIM card from a wireless carrier in order to operate. As mentioned in earlier sections of this SMS tutorial, computers use AT commands to control modems. Both GSM modems and dial-up modems support a common set of standard AT commands. You can use a GSM modem just like a dial-up modem. In addition to the standard AT commands, GSM modems support an extended set of AT commands given in [9]. These extended AT commands are defined in the GSM standards. With the extended AT commands, you can do things like: Reading, writing and deleting SMS messages. Sending SMS messages. Monitoring the signal strength. 10

Monitoring the charging status and charge level of the battery. Reading, writing and searching phone book entries.

The number of SMS messages that can be processed by a GSM modem per minute is very low only about six to ten SMS messages per minute.

3.3.2 GSM Modem Applications

11

Fi gure 3.1 Applications of GSM Modem

3.4 Introduction

Technical to GSM

Modem Technology
3.4.1 Facts and Applications of GPRS/GSM Modem
The GSM/GPRS Modem comes with a serial interface through which the modem can be controlled using AT command interface. An antenna and a power adapter are provided.

12

Fi gure 3.1 Applications of GSM Modem

3.4 Introduction

Technical to GSM

Modem Technology
The basic segregation of working of the modem is as under Voice calls SMS GSM Data Calls GPRS

Voice calls: Voice calls are not an application area to be targeted. In future if interfaces like a microphone and speaker are provided for some applications then this can be considered. SMS: SMS is an area where the modem can be used to provide features like: These SMS can be transmitted on certain trigger events in an automation system SMS can also be used in areas where small text information has to be sent. The transmitter can be an automation system or machines like vending machines, collection machines or applications like positioning systems where the navigator keeps on sending SMS at particular time intervals SMS can be a solution where GSM data call or GPRS services are not available Pre stored SMS Transmission

GSM Data Calls: Data calls can be made using this modem. Data calls can be made to a normal PSTN modem/phone line also (even received) according to [8] . Data calls are basically made to send/receive data streams between two units either PCs or embedded devices. The advantage of Data calls over 13

Fi gure 3.1 Applications of GSM Modem

3.4 Introduction

Technical to GSM

Modem Technology
SMS is that both parties are capable of sending/receiving data through their terminals. Some points to be remembered in case of data calls: Upon activation of data/fax service you are provided with two separate numbers i.e. the Data call number and the Fax service number. Data calls are established using Circuit Switched data connections. Right now the speed at which data can be transmitted is 9.6 kbps. The modem supports speeds up to 14.4 kbps but the provider give a maximum data rate of 9.6 kbps during GSM data call. Technologies like HSCSD (high Speed Circuit Switched Data) will improve data. The data call service doesnt come with a normal SIM which is purchased but has to be requested with the service provider (say Airtel).

3.4.2 Applications And Facts About GSM Data Calls

Devices that have communication on serial port on PC/embedded environment. Devices that want to communicate with a remote server for data transfer Capability of data transfer helps in reducing processing requirements. Basic aim is to provide a wireless solution keeping the existing firmware intact.

14

Fi gure 3.1 Applications of GSM Modem

3.4 Introduction

Technical to GSM

Modem Technology
The clients firmware continues to work without any modifications GSM data calls can be a good solution where data has to be transmitted from a handheld device to a central server. The interface on two sides can be between PCs as well as embedded devices

Figure 3.2 Communication using GSM Modem Calls can be established by the terminals at either side to start data calls The Modem remains transparent during data transfer after the call is established. Call establishment to be automated in case of embedded terminals. GSM converter can be an option where intelligence of establishing calls has to be put in case of embedded devices.

3.4.3 Applications
Access control devices: Now access control devices can communicate with servers and security staff through SMS messaging. Complete log of transaction is available at the head-office Server instantly 15

Fi gure 3.1 Applications of GSM Modem

3.4 Introduction

Technical to GSM

Modem Technology
without any wiring involved and device can instantly alert security personnel on their mobile phone in case of any problem. RaviRaj Technologies is introducing this technology in all Fingerprint Access control and time attendance products. You can achieve high security any reliability.

Transaction terminals: EDC machines, POS terminals can use SMS messaging to confirm transactions from central servers. The main benefit is that central server can be anywhere in the world. Today you need local servers in every city with multiple telephone lines. You save huge infrastructure costs as well as per transaction cost. Supply Chain Management: Today SCM require huge IT infrastructure with leased lines, networking devices, data centre, workstations and still you have large downtimes and high costs. We can do all this at a fraction of the cost with GSM M2M technology. A central server in head office with GSM capability is the answer, we can receive instant transaction data from all your branch offices, warehouses and business associates with nil downtime and low cost given in [8].

3.4.4 Applications Suitable for GSM Communication

If any application needs one or more of the following features, GSM will be more cost-effective then other communication systems. Short Data Size: You data size per transaction should be small like 1-3 lines. e.g. banking transaction data, sales/purchase data, consignment tracking data, updates. These small but important transaction data can be sent through SMS messaging which cost even less then a local telephone call or sometimes free of cost worldwide. Hence with negligible cost you are able to send critical information to your head office located anywhere in the world from multiple points. Multiple remote data collection points: If you have multiple data collections points situated all over 16

Fi gure 3.1 Applications of GSM Modem

3.4 Introduction

Technical to GSM

Modem Technology
your city, state, country or worldwide you will benefit the most. The data can be sent from multiple points like your branch offices, business associates, warehouses, agents with devices like GSM modems connected to PCs, GSM electronic terminals and Mobile phones. Many a times some places like warehouses may be situated at remote location may not have landline or internet but you will have GSM network still available easily. High uptime: If your business require high uptime and availability GSM is best suitable for you as GSM mobile networks have high uptime compared to landline, internet and other communication mediums. Also in situations where you expect that someone may sabotage your communication systems by cutting wires or taping landlines, you can depend on GSM wireless communication. Large transaction volumes: GSM SMS messaging can handle large number of transaction in a very short time as per [8]. We can receive large number SMS messages on your server like e-mails without internet connectivity. E-mails normally get delayed a lot but SMS messages are almost instantaneous for instant transactions. consider situation like shop owners doing credit card transaction with GSM technology instead of conventional landlines. many a time you find local transaction servers busy as these servers use multiple telephone lines to take care of multiple transactions, whereas one GSM connection is enough to handle hundreds of transactions/minute. Mobility, Quick installation: GSM technology allows mobility, GSM terminals, modems can be just picked and installed at other location unlike telephone lines. Also you can be mobile with GSM terminals and can also communicate with server using your mobile phone. You can just purchase the GSM hardware like modems, terminals and mobile handsets, insert SIM cards, configure software and ready for GSM communication. GSM solutions can be implemented within few weeks whereas it may take many months to implement the infrastructure for other technologies.

17

Fi gure 3.1 Applications of GSM Modem

3.4 Introduction

Technical to GSM

Modem Technology Chapter 4

FPGA
4.1 What are FPGAs?
FPGAs are programmable digital logic chips which mean that we can program them to do almost any digital function as per [7]. The general workflow when working with FPGAs:

We use a computer to describe a "logic function" that you want. You might draw a schematic, or create a text file describing the function, doesn't matter.

We compile the "logic function" on your computer, using software provided by the FPGA vendor. That creates a binary file that can be downloaded into the FPGA.

You connect a cable from your computer to the FPGA, and download the binary file to the FPGA.

That's it! Our FPGA behaves according to your "logic function".

Also

18

We can download FPGAs as many time as you want - no limit - with different functionalities every time if you want. If you make a mistake in your design, just fix your "logic function", re-compile and re-download it. No PCB, solder or component to change.

The designs can run much faster than if you were to design a board with discrete components, since everything runs within the FPGA, on its silicon die.

FPGAs lose their functionality when the power goes away (like RAM in a computer that loses its content). We have to re-download them when power goes back up to restore the functionality.

4.2 Who makes FPGAs?

There are (at least) 5 companies making FPGAs in the world. The first two (Xilinx and Altera) hold the bulk of the market.

Xilinx is the biggest name in the FPGA world. It tends to be the density and technology leader.

Altera is the second FPGA heavyweight, also a well-known name. Lattice, Actel, Quicklogic are much smaller and are the "specialty shops".

4.2.1 Xilinx
Xilinx has traditionally been the silicon technology leader. Xilinx general philosophy is to provide all the features possible, at the cost of extra complexity given in [2].

Biggest and most flexible (feature-full) devices. Complex architecture, powerful devices.

19

Figure 4.1 Xilinx S6-SP601 Board

4.2.2 Altera
Altera philosophy is to provide the features that most people want while keeping their devices easy to use as per [3].

Lean and efficient devices architecture. Powerful devices.

Figure 4.2 Altera Stratix IV EP4SGX230 FPGA on a PCB

20

4.2.3 Lattice, Actel and Quicklogic

These companies have specialty products.

Lattice, better known for its CPLDs, have also an "instant-on" FPGA family. Actel and QuickLogic have antifuse (programmable-only-once) products.

4.3 FPGAs vs. CPLDs

Both are programmable digital logic chips. Both are made by the same companies. But they have different characteristics.

FPGAs are "fine-grain" devices. That means that they contain a lot (up to 100000) of tiny blocks of logic with flip-flops. CPLDs are "coarse-grain" devices. They contain relatively few (a few 100's max) large blocks of logic with flip-flops.

FPGAs are RAM based. They need to be "downloaded" (configured) at each power-up. CPLDs are EEPROM based. They are active at power-up (i.e. as long as they've been programmed at least once...).

CPLDs have a faster input-to-output timings than FPGAs (because of their coarse-grain architecture, one block of logic can hold a big equation), so are better suited for microprocessor decoding logic for example than FPGAs.

FPGAs have special routing resources to implement efficiently binary counters and arithmetic functions (adders, comparators...) and RAM. CPLDs do not.

FPGAs can contain very large digital designs, while CPLDs can contain small designs only according to [3].

21

4.

FPGAs vs. microcontrollers

Microcontrollers are based on CPU architecture. As all CPUs, they execute instructions in a sequential manner.

FPGAs are programmable logic and run in a parallel fashion. Microcontrollers have on-chip peripherals that also execute in parallel with their CPU. But they are still much less configurable than programmable logic.

4.5 Working of FPGAs

Internal logic:
FPGAs are built from one basic "logic-cell", duplicated hundreds or thousands of time. A logic-cell is composed of a small lookup table, some gates and a D-flipflop. Each logic-cell then can be connected to other logic-cells through interconnect resources (wires/muxes placed around the logic-cells). Each cell can do little, but with so many of them, complex logic functions can be created. The interconnect wires also go to the boundary of the device where I/O cells are implemented and connected to the pins of the FPGAs.

Dedicated routing/carry chains

In addition to general-purpose interconnect resources. FPGAs have fast dedicated lines between neighboring logic cells. The most common type of fast dedicated lines is carry chains. Carry chains allow creating arithmetic functions (counters/adders) very efficiently (low logic usage & high operating speed). Older programmable technologies (PAL/CPLD) don't have carry chains and so are quickly limited when arithmetic operations are required.

22

Internal RAM
While the first FPGAs didn't have internal memories, all new FPGAs have internal memories. That increases a lot their scope of applications. There are many parameters affecting RAM operation. The main parameter is the number of agents that can access the RAM simultaneously.

"single-port" RAMs: only one agent can read/write the RAM. "dual-port" or "quad-port" RAMs: 2 or 4 agents can read/write. Great to get data across clock domains (each agent can use a different clock). To figure out how many agents are available, count the number of separate address buses

going to the RAM. Each agent has a dedicated address bus. Each agent has also either a read, a write, or both data buses. Having both data buses doesn't always mean an agent can read/write simultaneously. Writing to the RAM is usually done synchronously. Reading is usually also done synchronously but can also sometimes be done asynchronously.RAM blocks are usually dedicated memory block ("blockrams"). Xilinx has a lot of flexibility in the RAM distribution, because it also allows using the logic-cells as tiny RAMs ("distributed RAM"). Altera usually takes another approach and builds different-size blockrams around the device.

4.6 FPGA pins

FPGA pins fall into 2 categories: "dedicated pins" and "user pins". About 20% to 30% of the pins of an FPGA are "dedicated pins", which means that they are hard-coded to a specific function.

6.1.

Dedicated Pins

The dedicated pins fall into the 3 following sub-categories.

Power pins: Might be ground pins (GND) or power pins (core or IO). Configuration pins: These pins are used to "download" the FPGA. Dedicated inputs or clock pins: These pins are able to drive large and wide nets inside the FPGA, suitable for clocks or signals with large fan-outs.

23

4.6.2 User pins

The bulk of the pins of an FPGA are "user pins" (called "IOs", or "I/Os", or "user I/Os", or "user IOs", or "IO pins", or ... you get the idea). IO stands for "input-output".

We have total control over user IOs. They can be programmed to be inputs, outputs, or bidirectional (tri-stable buffers).

Each "IO pin" is connected to an "IO cell" inside the FPGA. The "IO cells" are powered by the VCCIO pins (IO power pins).

IO banks
An FPGA has many VCCIO pins (IO power pins), usually all connected to the same voltage. But new generations of FPGAs have a concept of "user IO banks". You split IOs into groups, each having its own VCCIO voltage. That allows using the FPGA as a voltage translator device, useful for example if one part of your board works with 3.3V logic, and another with 2.5V.

7. FPGA power
FPGAs usually require 2 voltages to operate: a "core voltage" and an "IO voltage". Each voltage is provided through separate power pins as per [3].

The internal core voltage (called VCCINT here for simplicity), is used to power the logic gates and flip-flops inside the FPGA. The voltage can range from 5V for older FPGA generations, to 3.3V, 2.5V, 1.8V, 1.5V and even lower for the latest devices! The core voltage is fixed (set by the model of FPGA that you are using).

The IO voltage (called VCCIO here for simplicity) is used to power the I/O blocks (= pins) of the FPGA. That voltage should match what the other devices connected to the FPGA expect.

24

Actually, FPGA devices themselves don't prevent VCCINT and VCCIO to be the same (i.e. the VCCINT and VCCIO pins could be connected together). But since FPGAs tend to use low-voltage cores, the two voltages are usually different.

Naming
The internal voltage is named "VCC" for Xilinx and "VCCINT" for Altera. The IO voltage is named "VCCO" for Xilinx and "VCCIO" for Altera.

4.8 FPGA Download Cables

FPGA vendors provide many ways to "configure" (i.e. download) their devices according to [3]. One way is using a cable that connects from your PC to the FPGA board. The most popular cables connect to your PC's parallel or USB interface.

These cables are sometimes also called "JTAG cables" (because they often connect to the JTAG pins of an FPGA).

4.8.1 Cable power

The cable is an active device and needs power. It is usually powered from the target FPGA board. FPGA cables are vendor specific
The FPGA configuration interface from all the FPGA vendors is very much alike. That doesn't prevent each vendor to have their own proprietary connectors and cables.

4.8.2 Parallel cable

A parallel cable connects to your PC's parallel (printer) port. It buffers a few pins of the PC parallel interface, and connects to the target board using a flat cable or flying leads. FPGA vendors sometimes provide the schematic of the cable, which is valuable since these cable are worth otherwise $100 or more!

Altera parallel cable are the ByteBlasterMV, and the newer ByteBlaster II. Xilinx parallel cable is called Parallel cable III (schematic only). See also the cables Hardware user guide and the Parallel Cables page.

25

8.3.

More cables

The complete list of Altera cables can be found here.

The USB-Blaster is small and nice. The EthernetBlaster is nice, if a little bulky.

The complete list of Xilinx cables can be found here.

The Platform Cable USB seems nice (I haven't had the chance to try this one).

4.9 FPGA configuration

An FPGA can be into 2 states: "configuration mode" or "user mode". When the FPGA wakes up after power-up, it is in configuration mode, sitting idle with all its outputs inactive. Configuring an FPGA means downloading a stream of 0's and 1's into it through some special pins. Once the FPGA is configured, it goes into "user-mode" and becomes active, performing accordingly to your programmed "logic function". There are 3 classical ways to configure your FPGA:

We use a cable from your PC to the FPGA, and run software on your PC to send data through the cable.

We use a microcontroller on your board, with an adequate firmware to send data to the FPGA.

We use a "boot-PROM" on your board, connected to the FPGA, that configures the FPGA automatically at power-up (FPGA vendors have such special boot-PROMs in their catalogs) During development, the first method is the easiest and quickest. Once your FPGA design

works, you probably don't need the PC anymore, so the other 2 methods come in use. FPGA configuration can quickly become a complex subject, so you might want to skip this section, especially if you intend to use an already-made FPGA development board. Development boards usually come with a special cable that you can use to configure the FPGA from your PC with no knowledge of the underlying interface.

26

4.9.1 FPGA configuration of Xilinx and Altera devices

Configuration works in a surprisingly identical way between Xilinx and Altera devices. The difference is mostly in the naming, but the functionality provided is similar. FPGAs provide 2 interfaces that can be used for configuration:

The JTAG interface. The "synchronous serial" interface.

4.9.1.1 The JTAG interface (or JTAG "port")

JTAG was originally designed for test and manufacturing purposes. As electronic boards became more and more compact, testing that a board was "good" became more and more difficult. JTAG primary purpose is to allow a computer to take control of the state of all the IO pins on a board. In turn, this allows each device connectivity to other devices on the board to be tested. Standard JTAG commands can be used for this purpose.

FPGAs are JTAG-aware and so all the FPGA IO pins can be controlled from the JTAG interface. FPGAs add the ability to be configured through JTAG (using proprietary JTAG commands). Working of JTAG: JTAG consists of 4 signals: TDI, TDO, TMS and TCK. A fifth pin, TRST, is optional. A single JTAG port can connect to one or multiple devices (as long as they are all JTAGaware parts). With multiple devices, you create what is called a "JTAG chain". The TMS and TCK are tied to all the devices directly, but the TDI and TDO form a chain: TDO from one device goes to TDI of the next one in the chain. TCK is the clock, TMS is used to send commands to the devices, and TDI/TDO are used to send and receive data. Each device in the chain has an ID, so the computer controlling the JTAG chain can figure out which devices are present.

4.9.1.2 The "synchronous serial" interface

It is a simple one-bit data/clock interface. It is synchronous and you provide one bit at a time to the device. Here's a description of the 5 most important pins of this interface:
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Table 4.1 Pins of Synchronous Serial Interface Xilinx pin name Altera pin name Data data0 Direction input to the FPGA Pin function configuration data bit configuration clock, the Clk Dclk input to the FPGA configuration data bit is shifted in the FPGA at the clock rising-edge when asserted (i.e. when it goes low - this is an active low pin), the FPGA is reset-ed and prog_b nConfig input to the FPGA looses its configuration. If the FPGA was in user-mode, it stops operation immediately, and all IOs go back into tristate mode. This pin indicates when the FPGA is ready to start the configuration process, soon after prog_b is de-asserted. It is useful in combination with init_b nStatus output from the FPGA prob_b because it takes a few milliseconds for the FPGA is get into a "clean state of mind", once prog_b is deasserted, after which pumping configuration data can actually start. Done ConfDone output from the FPGA When high, indicates that the FPGA is configured (in user28

mode).

4.10 FPGA Architecture

The most common FPGA architecture consists of an array of logic blocks (called Configurable Logic Block, CLB, or Logic Array Block, LAB, depending on vendor), I/O pads, and routing channels. Generally, all the routing channels have the same width (number of wires). Multiple I/O pads may fit into the height of one row or the width of one column in the array as per [3]. An application circuit must be mapped into an FPGA with adequate resources. While the number of CLBs/LABs and I/Os required is easily determined from the design, the number of routing tracks needed may vary considerably even among designs with the same amount of logic. For example, a crossbar switch requires much more routing than a systolic array with the same gate count. Since unused routing tracks increase the cost (and decrease the performance) of the part without providing any benefit, FPGA manufacturers try to provide just enough tracks so that most designs that will fit in terms of Lookup tables (LUTs) and IOs can be routed. This is determined by estimates such as those derived from Rent's rule or by experiments with existing designs. In general, a logic block (CLB or LAB) consists of a few logical cells (called ALM, LE, Slice etc.). A typical cell consists of a 4-input LUT, a Full adder (FA) and a D-type flip-flop, as shown below. The LUTs are in this figure split into two 3-input LUTs. In normal mode those are combined into a 4-input LUT through the left MUX. In arithmetic mode, their outputs are fed to the FA. The selection of mode is programmed into the middle multiplexer. The output can be either synchronous or asynchronous, depending on the programming of the mux to the right, in the figure example according to [10].

Figure 4.3 Logic Cell Using Look Up Table

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An illustration of a typical FPGA architecture

FPGAs have been responsible for a major shift in the way digital circuits are designed.

Figure 4.4 Basic Architecture of FPGA

Chapter 5

Web Cam
5.1 Web Camera
A webcam is a video capture device connected to a computer or computer network, often using a USB port or, if connected to a network, ethernet or Wi-Fi. The most popular use is for video telephony, permitting a computer to act as a videophone or video conferencing station. This can be used in messenger programs such as Windows Live Messenger, Skype and Yahoo messenger services. Other popular uses, which include the recording of video files or even still-images, are accessible via numerous software programs, applications and devices. Webcams are known for low manufacturing costs and flexibility, making them the lowest cost form of video telephony. The term "webcam" may also be used in its original sense of a video camera connected to Web continuously for an indefinite time, rather than for a particular session, generally supplying a view for anyone who visits its Web page. Some of these, for example those used as online traffic cameras, are expensive, rugged professional video cameras.

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Figure 5.1 Web camera

5.1.1 Video Security

Webcams are also employed for security purposes. Software is available to allow PC-connected cameras to watch for movement and sound, recording both when they are detected; these recordings can then be saved to the computer, e-mailed or uploaded to the Internet. In one wellpublicized case, a computer e-mailed out images as the burglar stole it, allowing the owner to give police a clear picture of the burglar's face even after the computer had been stolen.

5.1.2 Input Control Device

Special software can use the video stream from a webcam to assist or enhance a user's control of applications and games given in [5]. Video features, including faces, shapes, models and colors can be observed and tracked to produce a corresponding form of control. For example, the position of a single light source can be tracked and used to emulate a mouse pointer, a head mounted light would allow and would greatly improve. This can also be applied to games, providing additional control, improved interactivity and dimmersiveness.

5.1.3 Technology
Webcams typically include a lens and some support electronics. Various lenses are available, the most common being a plastic lens that can be screwed in and out to set the camera's focus. Lenses, which have no provision for adjustment, are also available. As a camera system's is greater for
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small imager formats and is greater for lenses with a large f/number (small aperture), the systems used in webcams have sufficiently large depth of field that the use of lens does not impact image sharpness much according to [1]. Image sensors can be the former being dominant for low-cost cameras, but CCD cameras do not necessarily outperform CMOS-based cameras in the low cost price range. Most consumer webcams are capable of providing resolution video at a 30 frames per second. Many newer devices can produce video in a few can run at high frame rates such as the, which can produce video at 120 frames per second. Support electronics are present to read the image from the sensor and transmit it to the host computer. The camera pictured to the right, for example, uses a Sonix SN9C101 to transmit its image over some cameras - such as mobile phone cameras - use a CMOS sensor with supporting electronics "on die", i.e. the sensor and the support electronics are built on a single to save space and manufacturing costs. Most webcams feature built-in microphones to make video calling and conferencing more convenient.

5.1.4 Privacy
Many users do not wish the continuous exposure for which Webcams were originally intended, but rather prefer privacy. Such privacy is lost when programs allow malicious hackers to activate the camera without the user's knowledge, providing hackers with a live video feed Cameras such as older external cameras include lens covers to thwart this. Most other webcams have a built-in that lights up whenever the camera is active (such as Apple's newer internal In mid-January 2005 some queries were published in an on-line forum which allow anyone to find thousands of high-end web cameras, provided that they have a web-based interface for remote viewing. Many such cameras are running on default configuration, which does not require any verification, making them visible to anyone. Webcams allow for inexpensive, real-time in both amateur and professional pursuits. They are frequently used in is a popular website hosting many videos made using webcams. News websites such as the produce live news videos.

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Chapter 6

MATLAB
6.1 MATLAB Software
MATLAB is a numerical computing environment and fourth generation programming language. Developed by The Math Works, MATLAB allows matrix manipulation, plotting of functions and data, implementation of algorithms, creation of user interfaces, and interfacing with programs in other languages. Although it is numeric only, an optional toolbox uses the MuPAD symbolic engine, allowing access to computer algebra capabilities. An additional package, Simulink, adds graphical multi domain simulation and Model-Based Design for dynamic and embedded systems. MATLAB is a high-performance language for technical computing. It integrates computation, visualization, and programming in an easy-to-use environment where problems and solutions are expressed in familiar mathematical notation according to [5]. Typical uses include:

Math and computation Algorithm development

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Modeling, simulation, and prototyping Data analysis, exploration, and visualization Scientific and engineering graphics Application development, including graphical user interface building MATLAB (meaning "matrix laboratory") was created in the late 1970s by Cleve Moler,

then chairman of the computer science department at the University of New Mexico. He designed it to give his students access to LINPACK and EISPACK without having to learn FORTRAN. It soon spread to other universities and found a strong audience within the applied mathematics community. Jack little, an engineer, was exposed to it during a visit Moler made to Stanford University in 1983. Recognizing its commercial potential, he joined with Moler and Steve Bangert. They rewrote MATLAB in C and founded The Math Works in 1984 to continue its development. These rewritten libraries were known as JACKPAC In 2000; MATLAB was first adopted by control design engineers, Little's specialty, but quickly spread to many other domains. It is now also used in education, in particular the teaching of linear algebra and numerical analysis, and is popular amongst scientists involved with image processing. MATLAB supports structure data types. Since all variables in MATLAB are arrays, a more adequate name is "structure array", where each element of the array has the same field names. In addition, MATLAB supports dynamic field names (field look-ups by name, field manipulations etc). Unfortunately, MATLAB JIT does not support MATLAB structures; therefore just a simple bundling of various variables into a structure will come at a cost given in [1].

6.2 Components of MATLAB

Development Environment: This is the set of tools and facilities that help you use MATLAB functions and files. Many of these tools are graphical user interfaces. It includes the MATLAB desktop and Command Window, a command history, and browsers for viewing help, the workspace, files, and the search path. The MATLAB Mathematical Function Library: This is a vast collection of computational algorithms ranging from elementary functions like sum, sine, cosine, and complex arithmetic, to
34

more sophisticated functions like matrix inverse, matrix eigen values, Bessel functions, and fast Fourier transforms. The MATLAB Language: This is a high-level matrix/array language with control flow statements, functions, data structures, input/output, and object-oriented programming features. It allows both "programming in the small" to rapidly create quick and dirty throw-away programs, and "programming in the large" to create complete large and complex application programs as per [5]. Handle Graphics: This is the MATLAB graphics system. It includes high-level commands for two-dimensional and three-dimensional data visualization, image processing, animation, and presentation graphics. It also includes low-level commands that allow you to fully customize the appearance of graphics as well as to build complete graphical user interfaces on your MATLAB applications. The MATLAB Application Program Interface (API): This is a library that allows you to write C and FORTRAN programs that interact with MATLAB. It include facilities for calling routines from MATLAB (dynamic linking), calling MATLAB as a computational engine, and for reading and writing MAT-files.

6.3 Expressions
Like most other programming languages, MATLAB provides mathematical expressions, but unlike most programming languages, these expressions involve entire matrices given in [2]. The building blocks of expressions are:

Variables Numbers Operators Functions

6.3.1 Variables

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MATLAB does not require any type declarations or dimension statements. When MATLAB encounters a new variable name, it automatically creates the variable and allocates the appropriate amount of storage. If the variable already exists, MATLAB changes its contents and, if necessary, allocates new storage. For example, num_students = 25 Creates a 1-by-1 matrix named num_students and stores the value 25 in its single element. Variable names consist of a letter, followed by any number of letters, digits, or underscores. MATLAB uses only the first 31 characters of a variable name. MATLAB is case sensitive; it distinguishes between uppercase and lowercase letters. A and a are not the same variable. To view the matrix assigned to any variable, simply enter the variable name.

6.3.2 Numbers
MATLAB uses conventional decimal notation, with an optional decimal point and leading plus or minus sign, for numbers. Scientific notation uses the letter e to specify a power-of-ten scale factor. Imaginary numbers use either i or j as a suffix. All numbers are stored internally using the long format specified by the IEEE floatingpoint standard. Floating-point numbers have a finite precision of roughly 16 significant decimal digits and a finite range of roughly 10-308 to 10+308 according to [5].

6.3.3 Operators
Expressions use familiar arithmetic operators and precedence rules. + * / \ Addition Subtraction Multiplication Division Left division (described in "Matrices and Linear Algebra" in Using MATLAB)
36

^ ' ()

Power Complex conjugate transpose Specify evaluation order

6.3.4 Functions
MATLAB provides a large number of standard elementary mathematical functions, including abs, sqrt, exp, and sin. Taking the square root or logarithm of a negative number is not an error; the appropriate complex result is produced automatically. MATLAB also provides many more advanced mathematical functions, including Bessel and gamma functions. Most of these functions accept complex arguments.

6.4 GUI
A graphical user interface (GUI) is a user interface built with graphical objects, such as buttons, text fields, sliders, and menus as per [2][5]. In general, these objects already have meanings to most computer users. For example, when we move a slider, a value changes; when you press an OK button, your settings are applied and the dialog box is dismissed. Of course, to leverage this built-in familiarity, we must be consistent in how you use the various GUI-building components. Applications that provide GUIs are generally easier to learn and use since the person using the application does not need to know what commands are available or how they work. The action that results from a particular user action can be made clear by the design of the interface. The sections that follow describe how to create GUIs with MATLAB. This includes laying out the components, programming them to do specific things in response to user actions, and saving and launching the GUI; in other words, the mechanics of creating GUIs. This documentation does not attempt to cover the "art" of good user interface design, which is an entire field unto itself. Topics covered in this section include:

6.4.1 GUI Development Environment

The process of implementing a GUI involves two basic tasks:
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Laying out the GUI components Programming the GUI components GUIDE primarily is a set of layout tools. However, GUIDE also generates an M-file that

contains code to handle the initialization and launching of the GUI. This M-file provides a framework for the implementation of the callbacks - the functions that execute when users activate components in the GUI.

6.4.2 The Implementation of a GUI

While it is possible to write an M-file that contains all the commands to lay out a GUI, it is easier to use GUIDE to lay out the components interactively and to generate two files that save and launch the GUI: A FIG-file - contains a complete description of the GUI figure and all of its children as well as the values of all object properties. An M-file - contains the functions that launch and control the GUI and the callbacks, which are defined as sub functions. This M-file is referred to as the application M-file in this documentation. The application M-file does not contain the code that lays out the uicontrols; this information is saved in the FIG-file.

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Chapter 7

XILINX
7.1 Introduction
Xilinx, Inc. is an American technology company, primarily a supplier of programmable logic devices. It is known for inventing the field programmable gate array (FPGA) and as the first semiconductor company with a manufacturing model given in [7]. The Xilinx Integrated Software Environment (ISE) is an integrated design environment that allows you to design Xilinx FPGA and CPLD devices from start to finish as per [2]. A bit stream is a stream of data that contains location information for logic on a device, that is, the placement of Configurable Logic Blocks (CLBs), Input/output Blocks (IOBs), (TBUFs), pins, and routing elements. The bit stream also includes empty placeholders that are filled with the logical states sent by the device during a read back.

7.2 Technology
Xilinx designs, develops and markets programmable logic products including integrated circuits (ICs), software design tools, predefined system functions delivered as intellectual property (IP) cores, design services, customer training, field engineering and technical support. [1] Xilinx sells both FPGAs and

39

CPLDs programmable logic devices for electronic equipment manufacturers in end markets such as communications, industrial, consumer, automotive and data processing. Xilinx's FPGAs have been used for the ALICE (A Large Ion Collider Experiment) at the CERN European laboratory on the French-Swiss border to map and disentangle the trajectories of thousands of subatomic particles. Xilinx has also engaged in a partnership with the United States Air Force Research Laboratorys Space Vehicles Directorate to develop FPGAs to withstand the damaging effects of radiation in space for deployment in new satellites, which are 1,000 times less sensitive to space radiation than the commercial equivalent according to [3]. The Virtex-II Pro, Virtex-4, Virtex-5, and Virtex-6 FPGA families are focused on system-on-chip (SoC) designers because they include up to two embedded IBM PowerPC cores. Some members of the Virtex-II Pro, Virtex-4 and Virtex-5 FPGA families contain PowerPC processor blocks. Xilinx FPGAs can run a regular embedded OS (such as Linux or vxWorks) and can implement processor peripherals in programmable logic.[1] Xilinx's IP cores include IP for simple functions (BCD encoders, counters, etc.), for domain specific cores (digital signal processing, FFT and FIR cores) to complex systems (multi-gigabit networking cores, MicroBlaze soft microprocessor, and the compact Picoblaze microcontroller). [1] Xilinx also creates custom cores for a fee. The ISE Design Suite is the central electronic design automation (EDA) product family sold by Xilinx. The ISE Design Suite features include design entry and synthesis supporting Verilog or VHDL, place-and-route (PAR), completed verification and debug using ChipScope Pro tools, and creation of the bit files that are used to configure the chip.[1][3] Xilinx's Embedded Developer's Kit (EDK) supports the embedded PowerPC 405 and 440 cores (in Virtex-II Pro and some Virtex-4 and -5 chips) and the Microblaze core. Xilinx's System Generator for DSP implements DSP designs on Xilinx FPGAs. A freeware version of its EDA software called ISE Web PACK is used with some of its non-high-performance chips. Xilinx is the only (as of 2007) FPGA vendor to distribute a native Linux freeware synthesis tool chain. Xilinx announced the architecture for an Extensible Processing Platform, which licenses the ARM Cortex-A9 MP Core processor for embedded systems designers familiar with the ARM platform. The Extensible Processing Platform architecture abstracts much of the hardware burden away from the embedded software developers' point of view, giving them an unprecedented level of control in the 40

development process. With this platform, software developers can leverage their existing system code based on ARM technology and utilize vast off-the-shelf open-source and commercially available software component libraries. Because the system boots an OS at reset, software development can get under way quickly within familiar development and debug environments using tools such as ARMs Real View development suite and related third-party tools, Eclipse-based IDEs, GNU, the Xilinx Software Development Kit and others. The platform targets embedded designers working on market applications that require multi functionality and real-time responsiveness, such as automotive driver assistance, intelligent video surveillance, industrial automation, aerospace and defense, and next-generation wireless. Xilinx announced, in early 2011, a new Zynq product family specifically based on its extensible processing platform. Following the introduction of its 28 nm 7-series FPGAs, Xilinx revealed that that several of the highest-density parts in those FPGA product lines will be constructed using multiple dice in one package, employing technology developed for 3D construction and stacked-die assemblies. The technology stacks several (three or four) active FPGA dice side-by-side on a silicon interposer a single piece of silicon that carries passive interconnect given in [7]. The individual FPGA dice are conventional, and are flip-chip mounted by micro bumps on to the interposer. The interposer provides direct interconnect between the FPGA dice, with no need for transceiver technologies such as high-speed SERDES. In October 2011, Xilinx shipped the first FPGA to use the new technology, the Virtex-7 2000T FPGA, which includes 6.8 billion transistors and 20 million ASIC gates. In January 2011, Xilinx acquired design tool firm AutoESL Design Technologies to add System C high level design to its 6- and 7-series FPGA families.[49] The addition of AutoESL tools expands the design community for FPGAs with designers more accustomed to designing at a higher level of abstraction in C, C++ and System C.

7.3 Current family lines

Xilinx has offered two main FPGA families: the high-performance Virtex series and the high-volume Spartan series, with a cheaper Easy Path option for ramping to volume production. The company also provides two CPLD lines, the Cool Runner and the 9500 series. Each model series has been released in multiple generations since its launch. With the introduction of its 28 nm FPGAs in June 2010, Xilinx replaced the high-volume Spartan family with a Kintex family and the lowcost Artix family.

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In newer FPGA products, Xilinx minimized total power consumption by adopting a high-K metal gate (HKMG) process which allows for low static power consumption. At the 28 nm node, static power is a significant portion of the total power dissipation of a device and in some cases is the dominant factor. Through the use of a HKMG process, Xilinx has reduced power use while increasing logic capacity. Virtex-6 and Spartan-6 FPGA families are said to consume 50 percent less power, and have up to twice the logic capacity compared to the previous generation of Xilinx FPGAs. In June, 2010 Xilinx introduced the Xilinx 7 series, the Virtex-7, Kintex-7, and Artix-7 families, and promising improvements in system power, performance, capacity, and price as per [7]. These new FPGA families are manufactured using TSMC's 28 nm HKMG process. The 28-nm series 7 devices feature a 50 percent power reduction compared to the company's 40-nm devices and offer capacity of up to 2 million logic cells. In March 2011, Xilinx introduced the Zynq-7000 family, which integrates a complete ARM Cortex-A9 MP Core processor-based system on a 28 nm FPGA for system architects and embedded software developers.

7.3.1 Virtex family

The Virtex series of FPGAs have integrated features that include FIFO and ECC logic, DSP blocks, PCIExpress controllers, Ethernet MAC blocks, and high-speed transceivers. In addition to FPGA logic, the Virtex series includes embedded fixed function hardware for commonly used functions such as multipliers, memories, serial transceivers and microprocessor cores. These capabilities are used in applications such as wired and wireless infrastructure equipment, advanced medical equipment, test and measurement, and defense systems. Some Virtex family members are available in radiation-hardened packages, specifically to operate in space where harmful streams of high-energy particles can play havoc with semi conductors. The Virtex-5QV FPGA was designed to be 100 times more resistant to radiation than previous radiationresistant models and offers a ten-fold increase in performance. However, characterization and test data were not yet available for the Virtex-5QX on the Xilinx Radiation Test Consortium website as of November 2011. Xilinx's most recently announced Virtex, the Virtex 7 family, is based on a 28 nm design and is reported to deliver a two-fold system performance improvement at 50 percent lower power compared to previous generation Virtex-6 devices. In addition, Virtex-7 doubles the memory bandwidth compared to previous generation Virtex FPGAs with 1866 Mb/s memory interfacing performance and over two million logic cells.

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In 2011, Xilinx began shipping sample quantities the Virtex-7 2000T FPGA that packages four smaller FPGAs into a single chip by placing them on a special silicon communications pad called an interposer to deliver 6.8 billion transistors in a single large chip. The interposer provides 10,000 data pathways between the individual FPGAs roughly 10 to 100 times more than usually would be available on a board to create a single FPGA. This approach allows the FPGA to conserve power, drawing 20 watts of power or less. This approach allows the Virtex-7 2000T FPGA to exceed Moores Law Intel co-founder Gordon Moores prediction that the number of those transistors will double roughly every two years by providing twice the number of transistors in a single FPGA than would be expected under the prediction. In comparison, Intels largest chips have about 2.6 billion transistors according to [3]. The Virtex-6 family is built on a 40 nm process for compute-intensive electronic systems, and the company claims it consumes 15 percent less power and has 15 percent improved performance over competing 40 nm FPGAs. The Virtex-5 LX and the LXT are intended for logic-intensive applications, and the Virtex-5 SXT is for DSP applications. With the Virtex-5, Xilinx changed the logic fabric from four-input LUTs to sixinput LUTs. With the increasing complexity of combinational logic functions performed by SoC, the percentage of combinational paths requiring multiple four-input LUTs became a performance and routing bottleneck. The new six-input LUT represented a tradeoff between better handling of increasingly complex combinational functions, at the expense of a reduction in the absolute number of LUTs per device. The Virtex-5 series is a 65 nm design fabricated in 1.0 V, triple-oxide process technology. Legacy Virtex devices (Virtex, Virtex-II, Virtex-II Pro, Virtex 4) are still available, but are not recommended for use in new designs.

7.3.2 Kintex
The Kintex-7 family is the first Xilinx mid-range FPGA family that the company claims delivers Virtex-6 family performance at less than half the price while consuming 50 percent less power. The Kintex family includes high-performance 10.3 Gbit/s or lower-cost optimized 6.5 Gbit/s serial connectivity, memory, and logic performance required for applications such as high volume 10G optical wired communication equipment, and provides a balance of signal processing performance, power consumption and cost to support the deployment of Long Term Evolution (LTE) wireless networks given in [1].

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7.3.3 Artix
The Artix-7 family delivers 50 percent lower power and 35 percent lower cost compared to the Spartan-6 family and is based on the unified Virtex-series architecture. Xilinx claims that Artix-7 FPGAs deliver the performance required to address cost-sensitive, high-volume markets previously served by ASSPs, ASICs, and low-cost FPGAs as per [2]. The Artix family is designed to address the small form factor and low power performance requirements of battery-powered portable ultrasound equipment, commercial digital camera lens control, and military avionics and communications equipment.

7.3.4 Zynq
The Zynq 7000 family incorporates an extensible processing platform into devices to address high-end embedded-system applications, such as video surveillance, automotive-driver assistance, next-generation wireless, and factory automation. Zync-7000 FPGAs integrate a complete ARM Cortex-A9 MP Coreprocessor-based 28-nm system. The Zynq architecture differs from previous marriages of programmable logic and embedded processors by moving from an FPGA-centric platform to a processor-centric model. For software developers, Zynq FPGAs appear the same as a standard, fully featured ARM processorbased system-on-chip (SOC) that boots immediately at power-up and can run a variety of operating systems independently of the programmable logic.

7.3.5 Spartan family

The Spartan series targets applications with a low-power footprint, extreme cost sensitivity and highvolume; e.g. displays, set-top boxes, wireless routers and other applications. The Spartan-6 family is built on a 45-nanometer [nm], 9-metal layer, dual-oxide process technology given in [7]. The Spartan-6 was marketed in 2009 as a low-cost solution for automotive, wireless communications, flat-panel display and video surveillance applications.

7.3.6 EasyPath
Because EasyPath devices are identical to the FPGAs that customers are already using, the parts can be produced faster and more reliably from the time they are ordered compared to similar competing programs. A 12-week time is guaranteed from receiving the design to mass production, and no redesign or re-qualification is required by the customer. In addition, customers are free to return from the nonprogrammable EasyPath FPGA production to original programmable Virtex FPGA production if the need for design changes arises. 44

Chapter 8

VISUAL BASIC
8.1 Introduction
Visual Basic (VB) is the third - generation event - driven programming language and integrated development environment (IDE) from Microsoft for its COM programming model. VB is also considered a relatively easy to learn and use programming language, because of its graphical development features and BASIC heritage. Visual Basic was derived from BASIC and enables the rapid application development (RAD) of graphical user interface (GUI) applications, access to databases using Data Access Objects , Remote Data Objects , or ActiveX Data Objects, and creation of ActiveX controls and objects given in [8]. Scripting languages such as VBA and VBScript are syntactically similar to Visual Basic, but perform differently. A programmer can put together an application using the components provided with Visual Basic itself. Programs written in Visual Basic can also use the Windows API, but doing so requires external function declarations. The final release was version 6 in 1998. Microsoft's extended support ended in March 2008 and the designated successor was Visual Basic .NET (now known simply as Visual Basic).

8.2 Characteristics
Visual Basic has the following traits which differ from C-derived languages:

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Multiple assignments available in C language is not possible. A = B = C does not imply that the values of A, B and C are equal. The Boolean result of "Is B = C?" is stored in A. The result stored in A could therefore be false(0) or true(-1)

Logical and bitwise operators are unified. This is unlike some C-derived languages (such as Perl), which have separate logical and bitwise operators. This again is a traditional feature of BASIC.

Variable array base. Arrays are declared by specifying the upper and lower bounds in a way similar to Pascal and FORTRAN. It is also possible to use the Option Base statement to set the default lower bound. Use of the Option Base statement can lead to confusion when reading Visual Basic code and is best avoided by always explicitly specifying the lower bound of the array. This lower bound is not limited to 0 or 1, because it can also be set by declaration. In this way, both the lower and upper bounds are programmable. In more subscript-limited languages, the lower bound of the array is not variable. This uncommon trait does exist in Visual Basic .NET but not in VBScript. Option Base was introduced by ANSI, with the standard for ANSI Minimal BASIC in the late 1970s.

Relatively strong integration with the Windows operating system and the Component Object Model. The native types for strings and arrays are the dedicated COM types, BSTR and SAFEARRAY.

Banker's rounding as the default behavior when converting real numbers to integers with the Round function.? Round(2.5, 0) gives 2, ? Round(3.5, 0) gives 4.

Integers are automatically promoted to reals in expressions involving the normal division operator (/) so that division of an odd integer by an even integer produces the intuitively correct result. There is a specific integer divide operator (\) which does truncate.

By default, if a variable has not been declared or if no type declaration character is specified, the variable is of type Variant according to [1]. However this can be changed with Deftype statements such as DefInt, DefBool, DefVar, DefObj, DefStr.

There are 12 Deftype statements in total offered by Visual Basic 6.0. The default type may be overridden for a specific declaration by using a special suffix character on the variable name (# for Double, ! for Single, & for Long, % for Integer, $ for String, and @ for
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Currency) or using the key phrase As (type). VB can also be set in a mode that only explicitly declared variables can be used with the command Option Explicit

8.3 Derivative languages

Microsoft has developed derivatives of Visual Basic for use in scripting. Visual Basic itself is derived heavily from BASIC, and subsequently has been replaced with a .NET platform version. Some of the derived languages are:

Visual Basic for Applications (VBA) is included in many Microsoft applications (Microsoft Office), and also in many third-party products like SolidWorks, AutoCAD, WordPerfect Office 2002, ArcGIS, Sage Accpac ERP, and Business Objects Desktop Intelligence. There are small inconsistencies in the way VBA is implemented in different applications, but it is largely the same language as VB6 and uses the same runtime library.

VBScript is the default language for Active Server Pages. It can be used in Windows scripting and client-side web page scripting. Although it resembles VB in syntax, it is a separate language and it is executed by vbscript.dll as opposed to the VB runtime. ASP and VBScript should not be confused with ASP.NET which uses the .NET Framework for compiled web pages.

Visual Basic .NET is Microsoft's designated successor to Visual Basic 6.0, and is part of Microsoft's .NET platform. Visual Basic.Net compiles and runs using the .NET Framework. It is not backwards compatible with VB6. An automated conversion tool exists, but fully automated conversion for most projects is impossible.

StarOffice Basic is a Visual Basic compatible interpreter included in StarOffice suite, developed by Sun Microsystems given in [1].

Gambas is a Visual Basic inspired free software programming language. It is not a clone of Visual Basic, but it does have the ability to convert Visual Basic programs to Gambas.

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8.4 The Integrated Development Environment

One of the most significant changes in Visual Basic 6.0 is the Integrated Development Environment (IDE). IDE is a term commonly used in the programming world to describe the interface and environment that we use to create our applications. It is called integrated because we can access virtually all of the development tools that we need from one screen called an interface. The IDE is also commonly referred to as the design environment, or the program as per [5]. In previous versions of Visual Basic, the IDE was designed as a Single Document Interface (SDI). In a Single Document Interface, each window is a free-floating window that is contained within a main window and can move anywhere on the screen as long as Visual Basic is the current application. But, in Visual Basic 6.0, the IDE is in a Multiple Document Interface (MDI) format. In this format, the windows associated with the project will stay within a single container known as the parent. Code and form-based windows will stay within the main container form.

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Figure 8.1 Blank form in Visual basic 6.0

The Visual Basic IDE is made up of a number of components

Menu Bar Tool Bar Project Explorer Properties window Form Layout Window Toolbox Form Designer Object Browser

8.4.1 Menu Bar

This Menu Bar displays the commands that are required to build an application. The main menu items have sub menu items that can be chosen when needed. The toolbars in the menu bar provide quick access to the commonly used commands and a button in the toolbar is clicked once to carry out the action represented by it.

8.4.2 Toolbox
The Toolbox contains a set of controls that are used to place on a Form at design time thereby creating the user interface area. Additional controls can be included in the toolbox by using the Components menu item on the Project menu. A Toolbox is represented in Figure 5.4 shown below.

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Figure 8.2 Toolbox Window with its Controls available commonly Toolboxes commonly have a hinged cover for a top with a handle for carrying, and one or more latches securing the cover to the box. Open smaller compartments are typically located inside, but larger toolboxes will often have a removable tote tray sitting on a flange inside the lip of the box, with a single larger compartment

8.4.3 Properties Window

The Properties Window is docked under the Project Explorer window. The Properties Window exposes the various characteristics of selected objects. Each and every form in an application is considered an object. Now, each object in Visual Basic has characteristics such as color and size. Other characteristics affect not just the appearance of the object but the way it behaves too. All these characteristics of an object are called its properties.

8.5 Performance and other issues

Earlier counterparts of Visual Basic (prior to version 5) compiled the code to P-Code only. The P-Code is interpreted by the language runtime. The benefits of P-Code include portability and smaller binary file sizes, but it usually slows down the execution, since having a runtime adds an additional layer of interpretation. However, small amounts of code and algorithms can be constructed to run faster than compiled native code given in [5]. 50

Visual Basic applications require Microsoft Visual Basic runtime MSVBVMxx.DLL, where xx is the relevant version number, either 50 or 60. MSVBVM60.dll comes as standard with Windows in all editions after Windows 98 while MSVBVM50.dll comes with all editions after Windows 95. A Windows 95 machine would however require inclusion with the installer of whichever dll was needed by the program. Visual Basic 5 and 6 can compile code to either native or P-Code but in either case the runtime is still required for built in functions and forms management as per [1]. Criticisms levelled at Visual Basic editions prior to VB.NET include

Versioning problems associated with various runtime DLLs, known as DLL hell Poor support for object-oriented programming Inability to create multi-threaded applications, without resorting to Windows API calls Inability to create Windows services Variant types have a greater performance and storage overhead than strongly typed programming languages

Dependency on complex and fragile COM Registry entries The development environment is no longer supported by Microsoft.

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Chapter 9

Serial Communication
9.1 Introduction
Serial communication is basically the transmission or reception of data one bit at a time. Today's computers generally address data in bytes or some multiple thereof. A byte contains 8 bits. A bit is basically either a logical 1 or zero. Every character on this page is actually expressed internally as one byte. The serial port is used to convert each byte to a stream of ones and zeroes as well as to convert a stream of ones and zeroes to bytes. The serial port contains a electronic chip called a Universal Asynchronous Receiver/Transmitter (UART) that actually does the conversion as per [11]. The serial port has many pins. We will discuss the transmit and receive pin first. Electrically speaking, whenever the serial port sends a logical one (1) a negative voltage is effected on the transmit pin. Whenever the serial port sends a logical zero (0) a positive voltage is affected. When no data is being sent, the serial port's transmit pin's voltage is negative (1) and is said to be in a MARK state. Note that the serial port can also be forced to keep the transmit pin at a positive voltage (0) and is said to be the SPACE or BREAK state. (The terms MARK and SPACE are also used to simply denote a negative voltage (1) or a positive voltage (0) at the transmit pin respectively). When transmitting a byte, the UART (serial port) first sends a START BIT which is a positive voltage (0), followed by the data (general 8 bits, but could be 5, 6, 7, or 8 bits) followed by one or two STOP Bits which is a negative(1) voltage. The sequence is repeated for each byte sent. Fig 4.1 shows a diagram of what a byte transmission would look like.

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Figure 9.1 Byte Transmission At this point you may want to know what the duration of a bit is. In other words, how long does the signal stay in a particular state to define a bit. The answer is simple. It is dependent on the baud rate. The baud rate is the number of times the signal can switch states in one second. Therefore, if the line is operating at 9600 baud, the line can switch states 9,600 times per second. This means each bit has the duration of 1/9600 of a second or about100sec. when transmitting a character there are other characteristics other than the baud rate that must be known or that must be setup. These characteristics define the entire interpretation of the data stream. The first characteristic is the length of the byte that will be transmitted. This length in general can be anywhere from 5 to 8 bits. The second characteristic is parity. The parity characteristic can be even, odd, mark, space, or none. If even parity, then the last data bit transmitted will be a logical 1 if the data transmitted had an even amount of 0 bits. If odd parity, then the last data bit transmitted will be a logical 1 if the data transmitted had an odd amount of 0 bits. If MARK parity, then the last transmitted data bit will always be a logical 1. If SPACE parity, then the last transmitted data bit will always be a logical 0. If no parity then there is no parity bit transmitted. The third characteristic is the amount of stop bits. This value in general is 1 or 2.assume we want to send the letter 'A' over the serial port. The binary representation of the letter 'A' is 01000001. Remembering that bits are transmitted from least significant bit (LSB) to most significant bit (MSB), the bit stream transmitted would be as follows for the line characteristics 8 bits, no parity, 1 stop bit and 9600 baud. LSB (0 1 0 0 0 0 0 1 0 1) MSB The above represents (Start Bit) (Data Bits) (Stop Bit). To calculate the actual byte transfer rate simply divide the baud rate by the number of bits that must be transferred for each byte of data. In the case of the above example, each character requires 10 bits to be transmitted for each character. As such, at 9600 baud, up to 960 bytes can be transferred in one second. The above discussion was concerned with the "electrical/logical" characteristics of the data stream. We will expand the discussion to line protocol. Serial communication can be half duplex or full duplex. Full duplex communication means that a device can receive and transmit data at the same time. Half duplex means that the device
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cannot send and receive at the same time according to [11]. It can do them both, but not at the same time. Half duplex communication is all but outdated except for a very small focused set of applications. Half duplex serial communication needs at a minimum two wires, signal ground and the data line. Full duplex serial communication needs at a minimum three wires, signal ground, transmit data line, and receive data line. The RS232 specification governs the physical and electrical characteristics of serial communications given in [1]. This specification defines several additional signals that are asserted (set to logical 1) for information and control beyond the data signal These signals are the Carrier Detect Signal (CD), asserted by modems to signal a successful connection to another modem, Ring Indicator (RI), asserted by modems to signal the phone ringing, Data Set Ready (DSR), asserted by modems to show their presence, Clear To Send (CTS), asserted by modems if they can receive data, Data Terminal Ready (DTR), asserted by terminals to show their presence, Request To Send (RTS), asserted by terminals if they can receive data. The section RS232 Cabling describes these signals and how they are connected. The above paragraph alluded to hardware flow control. Hardware flow control is a method that two connected devices use to tell each other electronically when to send or when not to send data. A modem in general drops (logical 0) its CTS line when it can no longer receive characters. It re-asserts it when it can receive again. A terminal does the same thing instead with the RTS signal. Another method of hardware flow control in practice is to perform the same procedure in the previous paragraph except that the DSR and DTR signals are used for the handshake. Note that hardware flow control requires the use of additional wires. The benefit to this however is crisp and reliable flow control. Another method of flow control used is known as software flow control. This method requires a simple 3 wire serial communication link, transmit data, receive data, and signal ground. If using this method, when a device can no longer receive, it will transmit a character that the two devices agreed on. This character is known as the XOFF character. This character is generally a hexadecimal 13. When a device can receive again it transmits an XON character that both devices agreed to. This character is generally a hexadecimal 11.

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9.2 An Introduction to Null Modem

Serial communications with RS232 is one of the oldest and most widely spread communication methods in computer world. The way this type of communication can be performed is pretty well defined in standards .i.e. with one exception. The standards show the use of DTE/DCE communication, the way a computer should communicate with a peripheral device like a modem as per [5]. For your information, DTE means Data Terminal Equipment (computers etc.) where DCE is the abbreviation of Data Communication Equipment (modems). One of the main uses of serial communication today where no modem is involveda Serial Null Modem configuration with DTE/DTE communication-is not so well defined, especially when it comes to flow control. The terminology null modem for the situation where two computers communicate directly is so often used nowadays, that most people don't realize anymore the origin of the phrase and that a null modem connection is an exception, not the rule. In history, practical solutions were developed to let two computers talk with each other using a null modem serial communication line. In most situations, the original modem signal lines are reused to perform some sort of handshaking. Handshaking can increase the maximum allowed communication speed because it gives the computers the ability to control the flow of information. A high amount of incoming data is allowed if the computer is capable to handle it, but not if it is busy performing other tasks. If no flow control is implemented in the null modem connection, communication is only possible at speeds at which it is sure the receiving side can handle the amount information even under worst case conditions.

9.3 Original Use of RS232

When we look at the connector pin out of the RS232 port, we see two pins which are certainly used for flow control. These two pins are RTS, request to send and CTS, clear to send. With DTE/DCE communication (i.e. a computer communicating with a modem device) RTS is an output on the DTE and input on the DCE. CTS are the answering signal coming from the DCE. Before sending a character, the DTE asks permission by setting its RTS output. No information will be sent until the DCE grants permission by using the CTS line. If the DCE cannot handle new requests, the CTS signal will go low, a simple but useful mechanism allowing flow control in one direction. The assumption is that the DTE can always handle incoming information faster than the DCE can send
55

it. In the past, this was true. Modem speeds of 300 baud were common and 1200 baud was seen as a high speed connection according to [11]. The last flow control signal present in DTE/DCE communication is the CD carrier detect. It is not used directly for flow control, but mainly an indication of the ability of the modem device to communicate with its counterpart. This signal indicates the existence of a communication link between two modem devices.

9.4 Null Modem without Handshaking

How to use the handshaking lines in a null modem configuration? The simplest way is to don't use them at all. In that situation, only the data lines and signal ground are cross connected in the null modem communication cable. All other pins have no connection. An example of such a null modem cable without handshaking can be seen in the figure below. Table 9.2 Simple Null Modem without Handshaking Connector 1 Connector 2 Function 2 3 Rx *TX 3 2 TX *Rx 5 5 Signal ground

9.5 Compatibility Issues

If you read about null modems, this three wire null modem cable is often talked about. Yes, it is simple but can we use it in all circumstances? There is a problem, if either of the two devices checks the DSR or CD inputs. These signals normally define the ability of the other side to communicate. As they are not connected, their signal level will never go high. This might cause a problem. The same holds for the RTS/CTS handshaking sequence. If the software on both sides is well structured, the RTS output is set high and then a waiting cycle is started until a ready signal is received on the CTS line. This causes the software to hang because no physical connection is

56

present to either CTS line to make this possible. The only type of communication which is allowed on such a null modem line is data-only traffic on the cross connected Rx/TX lines given in [11]. This does however not mean that this null modem cable is useless. Communication links like present in the Norton Commander program can use this null modem cable. This null modem cable can also be used when communicating with devices which do not have modem control signals like electronic measuring equipment etc. As you can imagine, with this simple modem cable no hardware flow control can be implemented. The only way to perform flow control is with software flow control using the null XOFF and XON characters.

Chapter 10

Working Procedure

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Figure 10.1 Flow Chart

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Chapter 11

Advantages and Applications

11.1 Advantages

Intention recognition system Bank transaction based on mobile SIM Effective alert module Process intimation module Mobile communication technologies

2.

Applications

Security applications Data transferring applications Image processing applications Banking applications

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Chapter 12

Results

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Figure 12.1 GSM Module

This is a GSM Module in which the SIM is inserted in SIM Card reader. This GSM Module is connected to the PC through Serial Port whose Bit rates, Stop and Start bits are declared in the Source Code.

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Figure 12.2 FPGA Module

This is an FPGA module connected to PC through a Parallel Port. The code is downloaded to the FPGA through the serial Port as shown above. A Voice Annunciation Module is also connected to the FPGA module which is responsible for the announcements in the transaction process.

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Figure 12.3 Option to Choose a Bank if Person is Authorized

If a person is Authorized, then ATM window opens and asks the person to select the bank through which he/she wants to make transactions.

63

Figure 12.4 Asking Pin Number for Corresponding Bank After selecting the bank through which the person wants to make transactions, it is asked to enter the PIN number which is unique to each individual.
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Figure 12.5 Cash Withdraw and Check Balance Options

When the PIN number entered is Valid, then a window will be opened providing two options for the user . They are 1. Cash Withdraw 2. Balance Enquiry.
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After a particular option is selected, the remaining balance is shown. All this process will be annunciated through Voice Annunciation Module.

Figure 12.6 Person is unauthorized If an unauthenticated person wants to access an account, then it shows person is Unauthorized since we have a facility of Face recognition.

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Chapter 13

Conclusions and Future Scope

Conclusions
From this, image-recognition techniques that can provide the important functions required by advanced intelligent ATM Security are implemented to avoid theft and protect the usage of unauthenticated users. Secured and safety environment system for automobile users will be provided by implementing this project. Also theft can be predicted by using this system in our day to day life. Hence this is a Predict and indent system for the society.

Future Scope
Instead of removing SIM card from Cell phones every time, a single chip can be designed such that many banks can be accessed by a user. Also it is very easy for the user to carry a single chip than carrying many ATM cards.

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References
[1]. M. Ejiri, T. Uno, M. Mese and S. Ikeda, A Process for Detecting Defects in Complicated Patterns, Computer Graphics and Image Processing, Vol.2, No.3-4, 1973, pp. 326-339. [2]. http://www.xilinx.com/support/documentation/user_guides/ug070.pdf [3]. Tim Erjavec, White Paper, "Introducing the Xilinx Targeted Design Platform: Fulfilling the Programmable Imperative [4]. M. Ejiri, H. Yoda, H.Sakou and Y. Sakamoto, Knowledge-Directed Inspection for Complex Multilayered Patterns, Machine Vision and Applications, vol.2, no.3, 1989, pp.155-166. [5]. N. Miura, A. Nagasaka and T. Miyatake, Automatic Feature Extraction from non-uniform Finger Vein Image and its Application to Person Identification, [6]. Gilat, Amos (2004). MATLAB: An Introduction with Applications 2nd Edition. John Wiley & Sons. [7]. Embedded Technology Journal, Introducing the Xilinx Targeted Design Platform: Fulfilling the Programmable Imperative. Retrieved June 10, 2010. [8]. http://support.microsoft.com/kb/19498 [9].Tsai, Allen. "AT&T Releases Navigator GPS Service with Speech Recognition". Telecom Industry News. Retrieved 2 April 2008. [10]. http://en.wikipedia.org/wiki/Fpga [11]. EIA standard RS-232-C: Interface between Data Terminal Equipment and Data Communication Equipment Employing Serial Binary Data Interchange. Washington: Electronic Industries Association. Engineering Dept. 1969

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APPENDIX A
MATLAB Coding
MM=[]; instrreset; warning off; s1 = serial('COM9'); set(s1,'BaudRate',9600,'StopBits',1,'FlowControl','none','Parity','none','DataBits'... ,8,'outputBufferSize',5000); s1.InputBufferSize=5000; s1.TimeOut=5; fopen(s1); fprintf(s1,'AT+CIMI'); fwrite(s1,'13'); out = fread(s1); fclose(s1); delete(s1); if (exist('Simnumber.txt')) delete Simnumber.txt; end fid = fopen('Simnumber.txt', 'w+'); fwrite(fid,char(out),'char'); fid = fopen('Simnumber.txt', 'r');

69

FINPUT = fread(fid); fclose(fid); m_char=FINPUT; [R C]=size(m_char); for i =12:26 M=m_char(i); MM=[MM M]; end if (exist('SimDatabase.txt')) delete SimDatabase.txt; end fid = fopen('SimDatabase.txt', 'w+'); fwrite(fid,char(MM),'char'); j=1; fid =fopen('SimDatabase.txt','r'); FINPUT1 = fread(fid); fclose(fid); % Check point fid=fopen('Bank.txt','r'); FINPUT2 = fread(fid); fclose(fid); [r c]=size(FINPUT); n=r *c; cnt = 0; lin = 0; brk = 0; % for i=1:9:n for ii=[1 16 ] if (FINPUT2(ii) == 13) lin = lin +17; %i = i + 1 end
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for j=1:15 file= strcmp(char(FINPUT2(lin + j)),char(FINPUT1(j))); if (file==1) cnt = cnt + 1; else %warndlg('Unuthenticate') cnt = 0; break end end if (cnt == 15) break end end if (cnt == 15) gui_pca.fig; else warndlg('UNAUTHENTICATED'); s1 = serial('COM3'); set(s1,'BaudRate',9600,'StopBits',1,'FlowControl','none','Parity','none','DataBits'... ,8,'outputBufferSize',5000); s1.InputBufferSize=5000; s1.TimeOut=5; fopen(s1); fwrite(s1,'Z'); fclose(s1); delete(s1) end

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APPENDIX B
VISUAL BASIC Coding
#include<reg51.h> #define voice P1 sbit alarm = P0^7; unsigned char ch; void serial_init(void); void delay1(int); void delay2(int); //Serial To Test the Program void serial_init() { SCON = 0x50; // SCON: mode 1, 8-bit UART, enable rcvr TMOD |= 0x20; // TMOD: timer 1, mode 2, 8-bit reload TH1 = 0xFD; // TH1: reload value for 9600 baud @ 11.0592MHz TR1 = 1; TI=1; } // TR1: timer 1 run

//DELAY Routine void delay1(int n) { int i; for(i=0;i<n;i++);

72

} void delay2(int n) { int i; for(i=0;i<n;i++) { delay1(1000); } } //Main Program void main(void) { P1=0x00; P0=0x00; EA=1; ES=1; serial_init();//Initialize serial port while(1); } void serial(void) interrupt 4 { int i; ch=SBUF; if(RI==1) { if (ch=='Z') { for(i=0;i<12;i++) { alarm=1; delay2(10);
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alarm=0; delay2(7); } } else if (ch=='A') { voice=0x01; } else if (ch=='B') { voice=0x02; } else if (ch=='C') { voice=0x04; } else if (ch=='D') { voice=0x08; } else if (ch=='E') { voice=0x10; } else if (ch=='F') { voice=0x20; } else if (ch=='G') { voice=0x40;
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} else if (ch=='H') { voice=0x80; } else { P1=0x00; } RI=0; } }

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