Ryerson University EE 8502 Analog CMOS Integrated Circuits FINAL EXAMINATION

Instructor : Dr. Fei Yuan December 9, 2001

INSTRUCTIONS :

This is an OPEN book test. The duration of the test is 3 hours (6:00 pm - 9:00 pm). Check that there are six (6) questions in this test. All questions must be answered. The marks for each question are indicated in the paper. The total marks are 100. Clearly show all steps used in your solution. No marks will be given for numerical results or expressions unless accompanied with a correct solution method.

Question 1 2 3 4 5 6 Total

Marks /15 /15 /15 /15 /15 /25 /100

NAME OF STUDENT : STUDENT ID :

EE 8502 CMOS Analog Integrated Circuits - Final Examination, Dec. 9, 2001

Q1. The schematic of a folded cascode amplier is shown in Fig.1. Assume all transistors are in saturation.
VDD

V in

M1

J2 Vo M2

J1

Figure 1: Folded cascode

1. Derive the transfer function at low frequencies (5 marks). 2. Derive the noise gure at low frequencies (5 marks). 3. Derive the transfer function Vo (s)/Vin (s) when Cgs and Cgd are considered (5 marks).

EE 8502 CMOS Analog Integrated Circuits - Final Examination, Dec. 9, 2001

Q2. The conguration of a regulated cascode amplier is shown in Fig.2. Assume the operational amplier is ideal with gain of A and all transistors are in saturation.

VDD

J Vo Vb +A Vin M2

M1

Figure 2: Regulated cascode 1. Find the output impedance at low frequencies (7 marks). 2. Find the gain of the amplier at low frequencies (8 marks).

EE 8502 CMOS Analog Integrated Circuits - Final Examination, Dec. 9, 2001

Q3. The schematic of the current mirror is shown Fig.3. Assume all transistors are in saturation.
V DD

Io Vb M3 Iin M1 M2

Figure 3: Current mirror

1. Derive the input impedance at low frequencies (Hint : the output resistance of transistors should be considered) (7 marks) 2. Find the transfer function Io (s)/Iin (s) when Cgs and Cgd are considered. You can simply analysis by assuming that the load impedance of the current mirror is zero (8 marks).

EE 8502 CMOS Analog Integrated Circuits - Final Examination, Dec. 9, 2001

Q4. The schematic of a current amplier is shown in Fig.4. Assume that all transistors are in saturation.
V DD

J1

J2

M3 M3 Iin J3 M1 M2 Io

Figure 4: Current mirror

1. Derive the transfer function at low frequencies (5 marks). 2. Derive the transfer function when Cgs and Cgd are considered (5 marks). 3. Explain why this conguration suers from low bandwidth limitation (5 marks).

EE 8502 CMOS Analog Integrated Circuits - Final Examination, Dec. 9, 2001

Q5. The schematic of an ideal switched-capacitor network is shown in Fig.5. Drive the expression of the output in z-domain Vo (z) (15 marks).
2 v2 1 C 1 v1 2 a4C v3 1 a 2C 2 + + vo (n1)T nT t 1 1 t 2 a 1C a 3C 2

Figure 5: Switched-capacitor network

EE 8502 CMOS Analog Integrated Circuits - Final Examination, Dec. 9, 2001 Q6. The schematic of an ideal switched-current network is shown in Fig.6.

1. Assume no clock overlap, drive the expression of the output in z-domain Io (z) (15 marks). 2. In practice, switch Ms1 is called the voltage-sampling switch and Ms3 is called the currentsteering switch. In order to have this circuit work properly, Ms1 must close before Ms3 closes, and open before Ms3 opens. Explain why (10 marks).
VDD

(W/P)p 2 I in Ms3 2 J Ms1 (W/L)n

2(W/L)p 1 Ms4 1 (W/L)n

a(W/L)p

(W/L)p Io

1 t 2 t

M1

M2

a(W/L)n Ms2 M3 M4

(W/L)n

(n1)T

nT

Figure 6: Switched-current network