BUS:

In computer architecture, a bus is a subsystem that transfers data between components inside a computer, or between computers. A bus is a communication pathway connecting two or more device. A key characteristic of a bus is that it is a shared transmission medium. A bus consists of multiple pathways or lines. Each line is capable of transmitting signal representing binary digit (1 or 0) Every bus has a clock speed measured in MHz A fast bus allows data to be transferred faster, which makes applications run faster. On PCs, the old ISA bus is being replaced by faster buses such as PCI. Early computer buses were literally parallel electrical wires with multiple connections, but the term is now used for any physical arrangement that provides the same logical functionality as a parallel electrical bus. Modern computer buses can use both parallel and serial connections, and can be wired in either a multi drop (electrical parallel) or chain topology, or connected by switched hubs, as in the case of USB.
Types of Buses: System Bus: Connecting to CPU, memory and Cache. Address Bus: Identify the source or destination of data e.g. CPU needs to read an instruction (data) from a given location in memory Bus width determines maximum memory capacity of system e.g. 8080 has 16 bit address bus giving 64k address space

 Data Bus Carries data Remember that there is no difference between data and instruction at this level Width is a key determinant of performance 8, 16, 32, 64 bit Control Bus Control and timing information Memory read/write signal Interrupt request Clock signals I/O Bus: Connecting to the above three buses is the "good old" standard I/O bus, used for slower peripherals (mice, modems, regular sound cards, low-speed networking) and also for compatibility with older devices. On almost all modern PCs this is the Industry Standard Architecture (ISA) bus. There are many standards for I/O buses and interfaces. Standards allow open architectures. Many vendors can provide peripheral (I/O) devices for many different systems. Most systems support several I/O buses and I/O interfaces Local Bus : In computer science, a local bus is a computer bus that connects directly, or almost directly,
from the CPU to one or more slots on theexpansion bus. The significance of direct connection to the CPU is avoiding the bottleneck created by the expansion bus, thus providing fastthroughput. There are several local buses built into various types of computers to increase the speed of data transfer. Local buses for expanded memory and video boards are the most common.

VESA Local Bus

The VESA Local Bus (usually abbreviated to VL-Bus or VLB) was mostly used in personal computers. VESA (Video Electronics Standards Association) Local Bus worked alongside the ISA bus; it acted as a high-speed conduit for memory-mapped I/O and DMA, while the ISA bus handled interrupts and portmapped I/O.

Historical Overview : In the early 1990s the I/O bandwidth of the ISA bus was becoming a critical bottleneck
to PC graphics performance. The need for faster graphics was being driven by increasing adoption of Graphical User Interfaces in PC operating systems. While IBM's attempt at producing a successor to ISA with theMicro Channel Architecture was a technically viable option, it failed in the market due to its proprietary nature and imposed licensing fees. The competingEISA open standard was still unable to offer enough performance improvement over ISA to provide a solution. Thus for a short time, hardware producers created proprietary implementations of local busses on their motherboards to give graphics cards direct access to the processor and system memory - and avoid the limitations of the ISA bus. However as these manufacturer specific solutions were not standardized, there were no provisions for providing interoperability between them. This led to [1] the VESA consortium proposing and defining a Local Bus standard in 1992. Additionally while greater graphics card performance was a primary goal of VLB, other devices could also benefit from the VLB standard; notably many mass storage controllers were offered for VLB with increased hard disk performance. A "VLB slot" itself was simply an additional edge connector placed in-line with the traditional ISA or EISA connector, with this extended portion often colored a distinctive brown. The result was a normal ISA or EISA slot being additionally capable of accepting VLB compatible cards. Traditional ISA cards remained compatible as they would not have pins past the normal ISA or EISA portion of the slot. The reverse was also true - VLB cards were by necessity quite long in order to reach the VLB connector, and were reminiscent of older full-length expansion cards from the earlier IBM XT era. Ironically the VLB portion of a slot looked similar to a IBM MCA slot, as indeed it was the same physical 116 pin connector used by MCA cards rotated by 180 degrees. The IBM MCA standard had not been as popular as IBM expected and there was an ample surplus of the connector, making it inexpensive and readily available.

Limitations: The VESA Local Bus was designed as a stopgap solution to the problem of the ISA bus's
limited bandwidth. As such, one requirement for VLB to gain industry adoption was that it had to be a minimal burden for manufactures to implement, in terms of board re-design and component costs - otherwise manufacturers would not have been convinced to change from their own proprietary solutions. As VLB fundamentally tied a card directly to the 486 processor bus with minimal intermediary logic (reducing logic design [citation and component costs), timing and arbitration duties were strongly dependent on the cards and CPU. needed] This simplicity of VLB unfortunately created several factors that served to limit its useful life substantially:

80486 dependence. The VESA Local Bus relied heavily on the Intel 80486 CPU's memory bus design. needed] When the Pentiumprocessor arrived there were major differences in its bus design, and was not easily adaptable to a VESA Local Bus implementation. Few Pentium motherboards with VLB slots were ever made. Also moving the bus to non-x86 architectures was nearly impossible. Limited number of slots available. Most PCs that used VESA Local Bus had only one or two VLB capable ISA slots from the 5 or 6 available (thus 4 ISA slots generally were just that, ISA only). This was a result of VESA Local Bus being a direct branch of the 80486 memory bus. The processor did not have the electrical [citation needed] ability to correctly drive (signal and power) more than 2 or 3 devices at a time directly from this bus.

[citation

Reliability problems. The strict electrical limitations on the bus also reduced any "safety margin" available negatively influencing reliability. Glitches between cards were common, as the interaction between individual

cards, combinations of cards, motherboard implementation, and even the processor itself was difficult to predict. This was especially prevalent on lower-end motherboards, as the addition of more VLB cards could overwhelm an already marginal implementation. Results could be rather spectacular when often important devices such as hard disk controllers were involved with a bus conflict with a memory intensive device such as the ubiquitous video card. As VLB devices had direct high-speed access to system memory at the same level as the main processor, there was no way for the system to intervene if devices were mis-configured or became unstable. If two devices overwrote the same memory location in a conflict, and the hard disk controller relied on this location (the HDD controller often being the 2nd conflicting device) there was the alltoo-common possibility of massive data corruption.

Limited scalability. As bus speeds of 486 systems increased, VLB stability became increasingly difficult to manage. The tightly coupled local bus design that gave VLB it's speed became increasingly intolerant of timing variations - notably past 40mhz. Intel's original 50mhz 486 processor faced difficulty in the market as many existing motherboards (even non-VLB designs) did not cope well with the increase in front side bus speed to 50mhz. If one could achieve reliable operation of VLB at 50mhz it was extremely fast - but again this was notoriously difficult to achieve, and often it was discovered not to be possible with a given hardware configuration. The 486DX-50's successor, the 486DX2-66 circumvented this problem by using a slower but more compatible bus speed (33mhz) and using a muliplier (x2) to derive the processor clock speed. Installation woes. The length of the slot and number of pins made VLB cards notoriously difficult to install and remove. The sheer mechanical effort required was stressful to both the card and the motherboard, and breakages were not uncommon. This was compounded by the extended length of the card logic board; often there was not enough room in the PC case to angle the card into the slot, requiring it to be pushed with great force straight down into the slot. To avoid excessive flexing of the motherboard during this action the chassis and motherboard had to be designed with good, relatively closely spaced supports for the motherboard, which was not always the case, and the person inserting the board had to distribute the downward force evenly across its top edge. The length of a VLB slot, and the difficult installation that resulted from it, led to an alternate expansion of the acronym: Very Long Bus.

Legacy :

Despite these problems, the VESA Local Bus became very commonplace on later 486

motherboards, with a majority of later (post 1993) 486-based systems featuring a VESA Local Bus video card. VLB importantly offered an affordable high speed interface for consumer systems, as only by 1996 was PCI commonly available outside of the server market via the Pentium and Intel's Triton chipset. PCI also displaced the VESA Local Bus in the remaining 486 market, with some of the last 80486 motherboards featuring PCI slots instead of VLB slots. However most still had either PCI or VLB slots alongside the still-ubiquitous ISA slots, and so-called "VIP" (VESA/ISA/PCI) boards with all three slot types were also produced.

PC VLB Connector Pinout Pin A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 Name D1 D3 GND D5 D7 D9 D11 D13 D15 GND D17 Vcc D19 D21 D23 D25 GND D27 D29 D31 A30 Description Data 1 Data 3 Ground Data 5 Data 7 Data 9 Data 11 Data 13 Data 15 Ground Data 17 +5 VDC Data 19 Data 21 Data 23 Data 25 Ground Data 27 Data 2 Data 31 Address 30 Pin B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 Name D0 D2 D4 D6 D8 GND D10 D12 VCC D14 D16 D18 D20 GND D22 D24 D26 D28 D30 VCC A31 Description Data 0 Data 2 Data 4 Data 6 Data 8 Ground Data 10 Data 12 +5 VDC Data 14 Data 16 Data 18 Data 20 Ground Data 22 Data 24 Data 26 Data 28 Data 30 +5 VDC Address 31

A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37

A28 A26 GND A24 A22 VCC A20 A18 A16 A14 A12 A10 A8 GND A6 A4

Address 28 Address 26 Ground Address 24 Address 22 +5 VDC Address 20 Address 18 Address 16 Address 14 Address 12 Address 10 Address 8 Ground Address 6 Address 4 Write Back

B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38

GND A29 A27 A25 A23 A21 A19 GND A17 A15 VCC A13 A11 A9 A7 A5 GND A3 A2 n/c

Ground Address 29 Address 27 Address 25 Address 23 Address 21 Address 19 Ground Address 17 Address 15 +5 VDC Address 13 Address 11 Address 9 Address 7 Address 5 Ground Address 3 Address 2 Not connected Reset Data/Command Memory/IO

A38 WBACK# A39 A40 A41 A42 A43 A44 BE0# VCC BE1# BE2# GND BE3#

Byte Enable 0 B39 +5 VDC B40

Byte Enable 1 B41

Byte Enable 2 B42 RESET# Ground B43 DC# M/IO#

Byte Enable 3 B44

A45 -A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58

ADS# Key LRDY# LDEV LREQ GND LGNT VCC ID2 ID3 ID4 LKEN# LEADS#

Address Strobe B45 No Pins Local Ready Local Device --

W/R# Key

Write/Read No Pins Ready Return Ground Interrupt 9 Burst Ready Burst Last Identification 0 Identification 1 Ground Local Clock +5 VDC

B48 RDYRTN# B49 GND IRQ9 BRDY#

Local Request B50 Ground Local Grant +5 VDC B51

B52 BLAST# B53 ID0 ID1 GND LCLK VCC

Identification 2 B54 Identification 3 B55 Identification 4 B56 Enable B57

Local Enable B58 LBS16# Local Bus Size 16 Address Strobe