CV hysteresis in metaloxidesemiconductor structures resulting from Pt doping of the gate oxide

Bogdan Golja and Armenag G. Nassibian Citation: J. Appl. Phys. 56, 3014 (1984); doi: 10.1063/1.333778 View online: http://dx.doi.org/10.1063/1.333778 View Table of Contents: http://jap.aip.org/resource/1/JAPIAU/v56/i10 Published by the American Institute of Physics.

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c- V hysteresis in metal-oxide-semiconductor structures resuftiog from Pt

doping of the gate oxide
Bogdan Golja8 ) and Armenag G. Nassibian
Department ofElectrical and Electronic Engineering. University of Western Australia. Nedlands. W. A. 6009 Australia

(Received 24 February 1984; accepted for publication 20 April 1984) Experimental results of hysteresis on platinum-difl'used (111) and (100) metal-oxidesemiconductor (MOS) capacitors are presented. The platinum diffusions were performed through the front surface with no oxide present and on wafers with 50 and 100 A oxides already grown. The diffusion conditions were also varied, some being carried out in a nitrogen ambient and others in an oxygen ambient. The temperature and time were fixed at 1000C and 60 min, respectively. The findings confirm the hysteresis effects of platinum in the oxide-silicon system and suggest that its introduction may be controlled by the presence of an oxide, in much the same way that B or P diffusions are controlled. This being the case, the charge retention properties of platinum-diffused MOS structures may be exploited by present day integrated circuit fabrication procedures. It has been reportedl,z that platinum-diffused metaloxide-semiconductor (MOS) capacitors fabricated on <111) n-type silicon material exhibit gross hysteresis effects in the high-frequency C- V characteristic due to stable charge storage in the oxide-silicon system. The hysteresis was found to be more pronounced in <111) than <100) silicon. Hysteresis as a function of diffusion time was examined by varying the platinum diffusion time between 10 and 300 min. It was found that the hysteresis initially increases with time until it reaches a maximum (for a 60 min Pt diffusion) and then decreases in magnitude with longer diffusion times. Subsequently <111) silicon was used to fabricate platinum-diffused MOS transistors 3 which exhibited a bias-induced shift in the turn-on voltage. These results suggested that the platinum-diffused MOS structures may have potential as nonvolatile memory devices. In addition, it was discovered that the charge storage properties of the oxide were considerably enhanced in devices where the high-temperature nitrogen anneal immediately after the gate oxidation was omitted. Recently it has been shown that the platinum-diffusion ambient affects the hysteresis. Mori et al. 4 reported that MOS capacitors fabricated with <111) Si where the platinum diffusion was carried out in an oxygen ambient did not produce hysteresis. Up till now all platinum diffusions have been carried out from the back surface of the wafers. In this letter we present results obtained with <111) and <100) p-type MOS capacitors where the platinum was diffused through the oxide. The diffusions were carried out under various conditions to determine whether hysteresis could be induced through front face diffusion and which fabrication conditions would lead to significant hysteresis. All materials used in this study were 3-5 n cm, <111) and 5-8 n cm, <100) p-type silicon. Prior to oxidation, the wafers were given standard peroxide-based organic and ionic cleans. 5 The gate oxides were then grown in dry oxygen at 9ooC to produce thicknesses of 50 and 100 A measured using an ellipsometer. On completion of the gate oxidation
-I

Present address: Solid State Device Laboratory. 210 Electrical Engineering West. Pennsylvania State University, University Park. Pa 16802.

the wafers were pulled to the cold zone of the furnace and allowed to cool to room temperature. To prepare for platinum diffusion, the back oxides were etched and the wafers given another RCA dean. 5 The platinum was spun at 2700 rpm onto the surface of the wafers in the form of high-purity semiconductor grade platinum-silica film (supplied by the Emulsitone Co., Whippany, New Jersey). The following platinum-diffusion conditions were used: Process A: 30 min at 300 C in dry N z followed by 60 min at 1000C in dry N z. Process B: 30 min at 300 C in dry Oz followed by 60 min at 1000C in dry N z Process C: 30 min at 300 C in dry O 2 followed by 60 min at 1OOO"C in dry Oz. The low-temperature heat treatments were performed to cure the platinum-silica film in preparation for the diffusion step. After the initial heat treatment at 300 C, the wafers were removed from the furnace and stored in high-purity dry nitrogen while the furnace temperature was raised to 1000 "C. All heat treatments were carried out in a high-purity quartz tube identical to the one used for the gate oxidation. The time and temperature selected were those which had previously yielded significant hysteresis. 1-3 The MOS capacitors were formed by evaporating aluminum onto the oxide and defining 1-mm-diam capacitors using conventional. photolithography. This process involved the wafers in a low-temperature forming gas anneal at 450 "C for 30 min before and 20 min after the aluminum evaporation. The MOS capacitors were completed by evaporating a gold ohmic contact on the back surface of the wafers. The hysteresis resulting from the various diffusion conditions was examined by tracing the initial high frequency (1 MHz) capacitance-voltage (C- V) curve from 0 to - 10 V and biasing the capacitor at - 10 V for 1 min. The return C- V curve from - 10 to + 10 V was then traced and + 10 V bias applied for 1 min. The C- V curve from + 10 V to some negative voltage was not traced. At this stage the testing was confined to observing bias-induced shifts in the fiat-band voltage of the capacitors. This enabled rapid testing across the wafers to determine which processing conditions had
1984 American Institute of Physics
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J. Appl. Phys. 56 (10),15 November 1984

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TABLE I. Flat-band voltage shifts after application of negative and positive biases. respectively. in the devices fabricated under various conditions on <100) wafers. All shifts are with respect to the initial fiat-band voltage and represent an average of 15 measurements across the wafer. All biases were 10 V applied for 1 min. No oxide Leaky; - 1. 5-V shift after - vebias; no change after + vebias No. 0(1)
Leaky; - 1.5-V shift after - vebias; no shift after + vebias No. 0(2)

50-A oxide
Leaky; - 4- V shift after - vebias; no change after + vebias No. 0(4) Not Leaky; + 4- V shift after - vebias; - 3-V shift after + vebias No. 0(5) Not Leaky; + O.S-V shift after - vebias; - 0.8-V shift after + vebias No. 0(6)

loo-A oxide
Leaky; no shift after - ve bias; - 3-V shift after + vebias No. 0(7) Not Leaky; + 4- V shift after - vebias; - 5-V shift after + vebias No.O(S) Not Leaky; no shift with

Leaky; + I-V shift after - vebias; return to original VFB after + ve bias No. 0(3)

+veor -ve
bias No. 0(9)

acheived the most useful hysteresis. The results are summarized in Tables I and U. It is unlikely that the observed hysteresis is due to mobile ion contamination, for the following reasons: (1) The platinum-silica film used for diffusion was manufactured to "semiconductor" grade purity and is a common platinum diffusion source. It has been used previously for doping silicon without any adverse effects due to mobile alkali ions. 6 7 (2) Previous studies of platinum diffusion effects on MOS capacitors using this platinum-silica film as a diffusion source in this laboratory have shown that the induced hysteresis is diffusion time dependent and completely disappears with increasing diffusion time. 1.2 In the present study,

MOS capacitors have been fabricated which exhibited no shift in flat-band voltage with bias. If alkali ion contamination was being introduced either from the diffusion tube or the platinum-silica film it should be present in all wafers. This was not the case, supporting previous work with this dopant source and furnace tube. Film thicknesses for the resulting Pt-Si02 surface layer ranged from 1320 to 1610 A. However, the diffusions carried out in an oxygen ambient produced a final thickness of -1850 A. All thicknesses were measured using a Gaertner L 111 ellipsometer. Tables I and n provide an overview of the data obtained in the present study for <100) and (111) wafers, respectively. Each value offtat-band voltage shift is an average ofM-

TABLE II. Flat-band voltage shifts after application of negative and positive biases. respectively. in the devices fabricated under various conditions on <III ) wafers. All shifts are with respect to the initial flat-band voltage and represent an average of IS measurements across the wafer. All biases were 10 V applied for I min. No oxide Leaky; + 0.7-V shift after - ve bias; return to original VPB after + ve bias No. 1(1) Leaky; no shift with - ve or + ve bias

50-A oxide
Slightly leaky; + 4-V shift after - vebias; - 3-V shift after + ve bias No. 1(4) Leaky; + 2-V shift after - ve bias; return to original after + ve bias No.I(S) Not Leaky; + 1. 8-V shift after - ve bias; - 1.5-V shift after + vebias No. 1(6)

loo-A oxide
Leaky; + 2.3-V shift after - ve bias; return to original VFB after + ve bias No. 1(7) Leaky; + 3.5-V shift after - ve bias; - 4- V shift after + vebias No.I(S) Not Leaky; + O.8-V shift after - vebias; - O.S-V shift after + vebias No. 1(9)

No. 1(2) Process C Leaky; no shift with - ve or + ve bias

O 2-02

No. 1(3)

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teen measurements made across a wafer. The capacitors which had platinum-silica film applied to the front surface, with no oxide present, tended to be very leaky and did not show any hysteresis with either (100) or < 111) wafers. In general, the majority of capacitors fabricated using process A (N 2-N 2 ) tended to be leaky and did not exhibit significant swings about the initial fiat-band voltage. This was the case for either orientation and whether there was an initial oxide present or not. Using process B (02-N2)' capacitors fabricated on (100) silicon with initial 50- and 100-A oxides were not leaky and produced-4 V swings about the initial fiatband voltage. However, (111) capacitors made under identical conditions were generally leaky and produced no significant hysteresis. This can be seen in Figs. 1 and 2 showing (100) and (111) capacitors, respectively. Process C (02-02) produced the most encouraging results on both (100) and ( 111) silicon. The quality of capacitors was vastly improved with very few leaky devices on the wafers with 50- and 100-A initial oxides. The platinum diffusion conditions also produced symmetrical voltage swings about the original fiatband voltage. It was observed that the wafers with 100 A of initial oxide produced a smaller swing about the fiat band than the thinner oxide wafers. In the case of the (100) wafer, hysteresis disappeared completely. It is evident that hysteresis can be induced in devices where the platinum has been diffused from the front surface (the face with the active devices). In addition the degree of hysteresis has been controlled by having an oxide present on the wafer and diffusing through it. Any oxide grown during the diffusion also affects the degree of hysteresis. Process C (0 2-02 ) produces capacitors with minimal hysteresis. This agrees with the results of Mori et a/. 4 who did not observe any hysteresis when their platinum diffusions were carried out in an oxygen ambient. This suggests that there is an optimum thickness for the prediffusion oxide which will result in nonleaky capacitors with symmetrical swings about the original fiat-band voltage. When the initial oxide was increased form 50 to 100 A and the platinum diffused using process C (0 2-02 ) the hysteresis was reduced in <111) silicon and disappeared completely in the < 1(0) capacitors. How200

200

~ 150

50

-10

-5

0 GATE VOLTAGE

10

FIG. 2. High-frequency C- V characteristics for a (111) MOS capacitor with a 50-A initial oxide. The platinum diffusion was carried out via process B (02-N2)' Curve I is the initial trace from 0 to - 10 V; curve 2 is the subsequent trace from - 10 to + 10 V after a - IO-V bias was applied I min; curve 3 is the trace from + 10 to - 10 V after a + IO-V bias was applied for I min. Table II. device No. I (5).

u:
:z ~

a.

tj1SO

~ 100!
50
-10

-5

0 GATE VOLTAGE

10

~G. I. High-frequency C-V characteristics for a (100) MOS capacitor WIth a 5O-A initial oxide. The platinum dilfusion was via process B (02-N2)' Curve I is the initial trace from 0 to - 10 V; curve 2 is the subsequent trace from - 10 to + 10 V after a - 10-V bias was applied for I min; curve 3 is the trace from + 10 to - 10 V after a + IO-V bias was applied for I min. Table I, device No. 0(5)..

ever, the yield per wafer was dramatically increased as may be expected because of the thicker final oxide. The reduced hysteresis in these capacitors suggests that the thicker oxide lowers the interaction between the platinum and the oxidesilicon system leading to reduced charge storage. While backside diffusion of platinum indiscriminately affects every device on the wafer, the present results show that front face platinum diffusion may be adequately masked (and controlled) by tile presence of an oxide. It may then be possible to isolate the effects of platinum to individual devices on a wafer in much the same way that B or P diffusion can be selectively performed. If this is achievable it may be possible to incorporate the charge-retention properties of the platinum-oxide-silicon system in integrated circuit design. Front face platinum diffusion through an oxide has resulted in hysteresis and good quality capacitors. Furthermore it is evident that the amount of hysteresis can be modified by the presence of an initial oxide and by any oxide grown during the actual diffusion process. This len.ds itself to the possibility of being able to isolate the platinum to individual devices on a wafer making the process compatible with existing integrated circuit manufacturing. Whether this is the case is currently under investigation. In addition the speed with which the device changes state and its chargeretention time will have to be determined and used as figures of merit enabling comparisons to be made with Pt-diffused devices having different oxide thicknesses and different platinum-diffusion times; the speed and charge-retention time will also be a means to make comparisons with conventional memory storage devices. At present only platinum silica has been used for the diffusion source. Other techniques for introducing the platinum into the oxide-silicon system. such as ion implantation, are planned. for future studies. The authors express their appreciation to the Australian Research Grants Committee for their financial support.
IA. G. Nassibian and L. Faraone. Appl. Phys. Len. 37, 75 (1980). lAo G. Nassibian and L. Faraone, IEEE Trans. Electron Devices ED-17,

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1757 (1980). 'A. G. Nassibian, D. Jordan, B. Golja, and J. G. Simmons, IEEE Trans. Electron Devices ED-28, 1014 (1981). ~. Mori, H. Kato, and H. Kuwano, Jpn. J. Appl. Phys. 22, L251 (1983).

sw. Kern and D. A. Puotinen, RCA Rev. 31,187 (1970).

6K. P. Lisiak and A. G. Milnes, Solid-State Electron. 18, 533 (1975). 7K, P. Lisiakand A. G. Milnes, J. Appl. Phys. 46, 5229 (1975).

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