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CHAPTER-1 INTRODUCTION

1.1 Objective of the project


The main theme of our project is to monitor the patients tablet timings with out the presence of doctor at the patient and displaying the information before the doctor. This monitoring can be done through the ARM-7 microcontrollers.The blocks used in this project is discussed below The micro controller used in this project is arm micro controller the criteria for choosing this micro controller is low cost, low power consumption and more efficiency. Pill box is used to check weather the patient had taken the tablet or not. IR sensor is used in the pill box. When it is opened the IR sensor sends the information to the controller. The GSM module is used to send the information to doctor with the help of wireless protocol. The RS-232 serial communication cable used in this project is used to interface the GSM to LPC2148 micro controller. This RS-232 cable is used in this project UART cable. The buzzer is used to alarming the patient to for reminding the tablet timings. The code is used to implement this project is dumped on the micro controller by using the soft wares. 1. keil c compiler. 2. embedded c programming language. 3. Flash magic.

1.2 Embedded systems


An embedded system is a special-purpose system in which the compute is completely encapsulated by or dedicated to the device or system it controls. Unlike a general-purpose computer, such as a personal computer, an embedded system performs one or a few pre-defined tasks, usually with very specific requirements. Since the system is dedicated to specific tasks, design engineers can optimize it, reducing the size and cost of the product. Embedded systems are often mass-produced, benefiting from economies of scale. Personal digital assistants (PDAs) or handheld computers are generally considered embedded devices because of the nature of their hardware design, even though they are more expandable in software terms. This line of definition continues to blur as devices expand. Physically, embedded systems range from portable devices such as digital watches and MP3 players, to large stationary installations like traffic lights, factory controllers, or the systems controlling nuclear power plants. In terms of complexity embedded systems can range from very simple with a single microcontroller chip, to very complex with multiple units, peripherals and networks mounted inside a large chassis or enclosure. Examples of embedded systems

Automatic teller machines (ATMs) Avionics, such as inertial guidance systems, flight control hardware/software and other integrated systems in aircraft and missiles

Cellular telephones and telephone switches engine controllers and antilock brake controllers for automobiles Home automation products, such as thermostats, air conditioners, sprinklers, and security
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monitoring systems

Handheld calculators Handheld computers Household appliances, including microwave ovens, washing machines, television sets, DVD players and recorders

Medical equipment Personal digital assistant Videogame consoles Computer peripherals such as routers and printers Industrial controllers for remote machine operation.

1.3 History of embedded system


In the earliest years of computers in the 1940s, computers were sometimes dedicated to a single task, but were too large to be considered "embedded". Over time however, the concept of programmable controllers developed from a mix of computer technology, solid state devices, and traditional electromechanical sequences. The first recognizably modern embedded system was the Apollo Guidance Computer, developed by Charles Stark Draper at the MIT Instrumentation Laboratory. At the project's inception, the Apollo guidance computer was considered the riskiest item in the Apollo project. The use of the then new monolithic integrated circuits, to reduce the size and weight, increased this risk. The first mass-produced embedded system was the Autonetics D-17 guidance computer for the Minuteman (missile), released in 1961. It was built from transistor logic and had a hard disk for main memory. When the Minuteman II went into production in 1966, the D-17 was replaced with a new computer that was the first high-volume use of integrated circuits. This program alone reduced prices on quad nand gate ICs from $1000/each to $3/each, permitting their use in commercial products.

Since these early applications in the 1960s, embedded systems have come down in price. There has also been an enormous rise in processing power and functionality. For example the first microprocessor was the Intel 4004, which found its way into calculators and other small systems, but required external memory and support chips. In 1978 National Engineering Manufacturers Association released the standard for a programmable microcontroller. The definition was an almost any computer-based controller. They included single board computers, numerical controllers, and sequential controllers in order to perform event-based instructions. By the mid-1980s, many of the previously external system components had been integrated into the same chip as the processor, resulting in integrated circuits called microcontrollers, and widespread use of embedded systems became feasible. As the cost of a microcontroller fell below $1, it became feasible to replace expensive knob-based analog components such as potentiometers and variable capacitors with digital electronics controlled by a small microcontroller with up/down buttons or knobs. By the end of the 80s, embedded systems were the norm rather than the exception for almost all electronics devices, a trend which has continued since.

1.4 Characteristics of embedded system


Embedded systems are designed to do some specific task, rather than be a general-purpose computer for multiple tasks. Some also have real-time performance constraints that must be met, for reason such as safety and usability; others may have low or no performance requirements, allowing the system hardware to be simplified to reduce costs.

An embedded system is not always a separate block - very often it is physically built-in to the device it is controlling. The software written for embedded systems is often called firmware, and is stored in read-only memory or Flash memory chips rather than a disk drive. It often runs with limited computer hardware resources: small or no keyboard, screen, and little memory. User interfaces

Embedded systems range from no user interface at all - dedicated only to one task - to full user interfaces similar to desktop operating systems in devices such as PDAs. Simple systems

Simple embedded devices use buttons, LEDs, and small character- or digit-only displays, often with a simple menu system. In more complex systems

A full graphical screen, with touch sensing or screen-edge buttons provides flexibility while minimizing space used: the meaning of the buttons can change with the screen, and selection involves the natural behavior of pointing at what's desired. Handheld systems often have a screen with a "joystick button" for a pointing device. The rise of the World Wide Web has given embedded designers another quite different option: providing a web page interface over a network connection. This avoids the cost of a sophisticated display, yet provides complex input and display capabilities when needed, on another computer. This is successful for remote, permanently installed equipment. In particular, routers take advantage of this ability.

CPU platform

Embedded processors can be broken into two distinct categories: microprocessors (P) and micro controllers (C). Micro controllers have built-in peripherals on the chip, reducing size of the system. There are many different CPU architectures used in embedded designs such as ARM, MIPS, Coldfire/68k, PowerPC, x86, PIC, 8051, Atmel AVR, Renesas H8, SH, V850, FR-V, M32R, Z80, Z8, etc. This in contrast to the desktop computer market, which is currently limited to just a few competing architectures. PC/104 and PC/104+ are a typical base for small, low-volume embedded and rugged system design. These often use DOS, Linux, NetBSD, or an embedded real-time operating system such as QNX or VxWorks. A common configuration for very-high-volume embedded systems is the system on a chip (SoC), an application-specific integrated circuit (ASIC), for which the CPU core was purchased and added as part of the chip design.

1.5 Peripherals
Embedded Systems talk with the outside world via peripherals, such as:

Serial Communication Interfaces (SCI): RS-232, RS-422, RS-485 etc Synchronous Serial Communication Interface: I2C, JTAG, SPI, SSC and ESSI Universal Serial Bus (USB) ppp Networks: Controller Area Network, LonWorks, etc Timers: PLL(s), Capture/Compare and Time Processing Units Discrete IO: aka General Purpose Input Output (GPIO)
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Tools

As for other software, embedded system designers use compilers, assemblers, and debuggers to develop embedded system software. However, they may also use some more specific tools:

An in-circuit emulator (ICE) is a hardware device that replaces or plugs into the microprocessor, and provides facilities to quickly load and debug experimental code in the system.

Utilities to add a checksum or CRC to a program, so the embedded system can check if the program is valid.

For systems using digital signal processing, developers may use a math workbench such as MathCad or Mathematica to simulate the mathematics..

An embedded system may have its own special language or design tool, or add enhancements to an existing language.

CHAPTER-2 BLOCK DIAGRAM OF PROJECT


2.1 BLOCK DIAGRAM
GSM Module

Power Supply LCD

LPC2148 Pill Box Micro controller Infrared sensor

Fig 2.1: GSM End device

GSM Module

Fig 2.2: GSM server device

2.2 OPERATION
The project mainly consists of pill box, IR sensor, LPC2148 microcontroller, LCD, GSM modules, Buzzer. The IR sensor is connected to microcontroller. The IR sensor is placed in the pill box so that when the pill box is opened the sensor detects it and sends the signal to the microcontroller. This signal is directly given to one of the port pins of the microcontroller. The microcontroller is programmed in such a way that it receives the data from the sensor and displays the data at display unit. When the pill box is opened the message will be sent to the server. At the server side the nurse or the doctor will check message. At the server side timings of taking tablets are already set, 2mins before the time the signal is sent to the microcontroller to on the buzzer so that patient will be reminded to take the tablet. After opening the pill box only the buzzer stops. These messages are given to GSM module with the help of MAX 232 which is inbuilt in the microcontroller. Here the MAX232 converts the parallel data from the microcontroller to the serial data and transmits it through the GSM module. The data which is given to the GSM module is converted into EM waves and transmitted through to the antenna. The GSM module at the receiver sides receives the signal and and converts it into the serial data and gives it to the server. On the webpage they can see the updated timings. They can also see weather the patient had taken the tablet or not.

CHAPTER-3 LPC 2148 MICRO CONTROLLER

3.1 ARM7 FAMILY


ARM7 family includes the ARM7TDMI, ARM7TDMI-S, ARM720T, and ARM7EJ-S processors. The ARM7TDMI core is the industrys most widely used 32-bit embedded RISC microprocessor solution. Optimized for cost and power-sensitive applications, the ARM7TDMI solution provides the low power consumption, small size, and high performance needed in portable, embedded applications. The ARM7TDMI-S core is the synthesizable version of the ARM7TDMI core, available in both VERILOG and VHDL, ready for compilation into processes supported by in-house or commercially available synthesis libraries. The ARM720T hard macro cell contains the ARM7TDMI core, 8kb unified cache, and a Memory Management Unit (MMU) that allows the use of protected execution spaces and virtual memory. This macro cell is compatible with leading operating systems including Windows CE, Linux, palm OS, and SYMBIAN OS.

The ARM7EJ-S processor is a synthesizable core that provides all the benefits of the ARM7TDMI low power consumption, small size, and the thumb instruction set while also incorporating ARMs latest DSP extensions and Jazelle technology, enabling acceleration of java-based applications. Compatible with the ARM9, ARM9E, and ARM10 families, and Strong-Arm architecture software written for the ARM7TDMI processor is 100% binary-compatible with other members of the ARM7 family and forwards-compatible with the ARM9, ARM9E, and ARM10 families, as well as products in Intels Strong ARM and xscale architectures. This gives designers a choice of
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software-compatible processors with strong price-performance points. Support for the ARM architecture today includes: Operating systems such as Windows CE, Linux, palm OS and SYMBIAN OS. More than 40 real-time operating systems, including qnx, wind rivers vxworks and mentor graphics vrtx.

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Fig 3.1: ARM7TDMI Core Diagram

Figure 3.1 shows the ARM7TDMI Core Diagram. The ARM7TDMI core is based on the Non Neumann architecture with a 32-bit data bus that carries both instructions and data. Load, store, and swap instructions can access data from memory. Data can be 8-bit, 16-bit, and 32-bit

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3.2 ARM7TDMI PROCESSOR CORE


The ARM7TDMI processor core implements the ARMv4T Instruction Set Architecture (ISA).This is a superset of the ARMv4 ISA which adds support for the 16-bit Thumb instruction set. Software using the Thumb instruction set is compatible with all members of the ARM Thumb family, including ARM9, ARM9E, and ARM10families

3.2.1 Registers The ARM7TDMI core consists of a 32-bit data path and associated control logic. This data path contains 31 general-purpose 32-bit registers, 7 dedicated 32-bit registers coupled to a barrel-shifter, Arithmetic Logic Unit, and multiplier.

3.2.2 Modes and exceptions The ARM7TDMI supports seven modes of operation: User mode Fast Interrupt (FIQ) Interrupt (IRQ) Supervisor mode Abort mode Undefined mode and System mode. All modes other than User are privileged modes. These are used to service hardware interrupts, exceptions, and software interrupts. Each privileged mode has an associated Saved Program Status Register (SPSR). This register is use to save the state of the Current Program Status Register (CPSR) of the task immediately before the exception occurs. In these privileged modes, mode-specific banked registers are available. These are automatically restored to their original values on return to the previous mode and the saved CPSR restored from the SPSR. System mode does not have any banked registers. It uses the User mode registers. System mode runs tasks that require a privileged processor mode and allows them to invoke all classes of exception.
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3.2.3 Processor states The ARM7TDMI processor can be in one of two states: ARM state In ARM state, 16 general registers and one or two status registers are accessible at any one time. The ARM state register set contains 16 directly accessible registers: R0 to R15. All of these except R15 are general-purpose, and may be used to hold either data or address value the registers available to the programmer in each mode, in ARM state, are illustrated in fig 3.1

Fig 3.2: Register Organization in ARM state

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Fig 3.3: Register Organization in THUMB state

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The THUMB state register set is a subset of the ARM state set. The programmer has direct access to eight general registers, R0-R7, as well as the Program Counter (PC), a stack pointer register (SP), a link register (LR), and the CPSR. There are banked Stack Pointers, Link Registers and Saved Process Status Registers (SPSRs) for each privileged mode. The registers available to the programmer in each mode, in THUMB state, are illustrated in Figure.3.3 Register Organization in THUMB state.

3.2.4 AMBA bus architecture The ARM7 Thumb family processors are designed for use with the Advanced Microcontroller Bus Architecture (AMBA) multi-master on-chip bus architecture. AMBA is an open standard that describes a strategy for the interconnection and management of functional blocks that makes up a System-on-Chip (SoC). The AMBA specification defines three buses: Advanced System Bus (ASB) Advanced High-performance Bus (AHB) Advanced Peripheral Bus (APB). ASB and AHB are used to connect high-performance system modules. APB offers a simpler interface for low-performance peripherals.

3.2.5 Advantages Small Dice Lower Power Consumption Simple decoding Higher performance Easy to implement an effective pipelined structure 3.2.6 Disadvantages Performance depends on compiler Poor code density RISC has a fixed size of instruction format Small number of instructions
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3.2.7 Applications Using the ARMv7 architecture, ARM can strengthen its position as a lowpower/performance leader while conquering new markets to carry its cores up in high performance and down in the low-cost high-volume domain of the microcontroller ARM designs the technology that lies at the heart of advanced digital products, from wireless, networking and consumer entertainment solutions to imaging, automotive, security and storage devices. ARM's comprehensive product offering includes 16/32-bit RISC

microprocessors, data engines, 3D processors, digital libraries, embedded memories, peripherals, software and development tools, as well as analog functions and high-speed connectivity products

3.3 LPC2148 MICROCONTROLLER LPC2148 microcontroller board based on a 16-bit/32-bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, that combine

microcontrollers with embedded high-speed flash memory ranging from 32 kB to 512 kB. A 128-bit wide memory interface and unique accelerator architecture enable 32-bit code execution at the maximum clock rate. For critical code size applications, the alternative 16-bit Thumb mode reduces code by more than 30% with minimal performance penalty. The meaning of LPC is Low Power Low Cost microcontroller. This is 32 bit microcontroller manufactured by Philips semiconductors (NXP).Due to their tiny size and low power consumption, LPC2148 is ideal for applications where miniaturization is a key requirement, such as access control and point-of-sale. The Thumb sets 16-bit instruction length allows it to approach twice the density of standard ARM code while retaining most of the ARMs performance advantage over a traditional 16-bit processor using 16-bit registers. This is possible because Thumb code operates on the same 32-bit register set as ARM code. Thumb code is able to provide up to 65 % of the code size of ARM, and 160 % of the performance of an equivalent ARM processor connected to a 16-bit memory system.

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3.3.1 Features of LPC2148 Microcontroller 16-bit/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 package. 8 kB to 40 kB of on-chip static RAM and 32 kB to 512 kB of on-chip flash memory; 128-bit wide interface/accelerator enables high-speed 60 MHz operation. In-System Programming/In-Application Programming (ISP/IAP) via on-chip boot loader software, single flash sector or full chip erase in 400 ms and programming of 256 B in 1 ms Embedded ICE RT and Embedded Trace interfaces offer real-time debugging with the on-chip Real Monitor software and high-speed tracing of instruction execution. USB 2.0 Full-speed compliant device controller with 2 kB of endpoint RAM. In addition, the LPC2148 provides 8 kB of on-chip RAM accessible to USB by DMA. One or two (LPC2141/42 Vs, LPC2144/46/48) 10-bit ADCs provide a total of 6/14 analog inputs, with conversion times as low as 2.44 ms per channel. Single 10-bit DAC provides variable analog output (LPC2148 only) Two 32-bit timers/external event counters (with four capture and four compare channels each), PWM unit (six outputs) and watchdog. Low power Real-Time Clock (RTC) with independent power and 32 kHz clock input Multiple serial interfaces including two UARTs (16C550), two Fast I2C-bus (400 kbit/s), SPI and SSP with buffering and variable data length capabilities. Up to 21 external interrupt pins available. 60 MHz maximum CPU clock available from programmable on-chip PLL with settling time of 100 ms. On-chip integrated oscillator operates with an external crystal from 1 MHz to 25 MHz and Power saving modes include Idle and Power-down Individual enable/disable of peripheral functions as well as peripheral clock scaling for additional power optimization. Processor wake-up from Power-down mode via external interrupt or BOD. CPU operating voltage range of 3.0 V to 3.6 V (3.3 V 10 %) with 5 V tolerant I/O.

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3.3.2 LPC2148 Microcontroller Architecture

Fig 3.4: LPC2148 Microcontroller Architecture

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3.3.3 Pin Diagram

Fig 3.5: LPC2148 Microcontroller Pin Diagram

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3.3.4 Architectural Overview The ARM7TDMI-S is a general purpose 32-bit microprocessor, which offers high performance and very low power consumption. The ARM architecture is based on Reduced Instruction Set Computer (RISC) principles, and the instruction set and related decode mechanism are much simpler than those of micro programmed Complex Instruction Set Computers (CISC). This simplicity results in a high instruction throughput and impressive real-time interrupt response from a small and cost-effective processor core. Pipeline techniques are employed so that all parts of the processing and memory systems can operate continuously. Typically, while one instruction is being executed, its successor is being decoded, and a third instruction is being fetched from memory. The ARM7TDMI-S processor also employs a unique architectural strategy known as Thumb, which makes it ideally suited to high-volume applications with memory restrictions, or applications where code density is an issue. The key idea behind Thumb is that of a super-reduced instruction set. Essentially, the ARM7TDMI-S processor has two instruction sets: The standard 32-bit ARM set. A 16-bit Thumb set. The Thumb sets 16-bit instruction length allows it to approach twice the density of standard ARM code while retaining most of the ARMs performance advantage over a traditional 16-bit processor using 16-bit registers. This is possible because Thumb code operates on the same 32-bit register set as ARM code. Thumb code is able to provide up to 65 % of the code size of ARM, and 160 % of the performance of an equivalent ARM processor connected to a 16-bit memory system. The particular flash implementation in the LPC2141/42/44/46/48 allows for full speed execution also in ARM mode. It is recommended to program performance critical and short code sections (such as interrupt service routines and DSP algorithms) in ARM mode. The impact on the overall code size will be minimal but the speed can be increased by 30% over Thumb mode.

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3.3.5 On-chip flash program memory The LPC2141/42/44/46/48 incorporates a 32kB, 64kB, 128kB, 256kB and 512kB flash memory system respectively. This memory may be used for both code and data storage. Programming of the flash memory may be accomplished in several ways. It may be programmed In System via the serial port. The application program may also erase and/or program the flash while the application is running, allowing a great degree of flexibility for data storage field firmware upgrades, etc. Due to the architectural solution chosen for an on-chip boot loader, flash memory available for users code on LPC2141/42/44/46/48 is 32 kB, 64 kB, 128 kB, 256 kB and 500 kB respectively. The LPC2141/42/44/46/48 flash memory provides a minimum of 100,000 erase/write cycles and 20 years of data-retention.

3.3.6 On-chip static RAM On-chip static RAM may be used for code and/or data storage. The SRAM may be accessed as 8-bit, 16-bit, and 32-bit. The LPC2141, LPC2142/44 and LPC2146/48 provide 8 kB, 16 kB and 32 kB of static RAM respectively. In case of LPC2146/48 only, an 8 kB SRAM block intended to be utilized mainly by the USB can also be used as a general purpose RAM for data storage and code storage and execution.

3.3.7 Memory map The LPC2141/42/44/46/48 memory map incorporates several distinct regions, as shown in Fig 3.4 Memory map. In addition, the CPU interrupt vectors may be remapped to allow them to reside in either flash memory (the default) or on-chip static RAM.

3.3.8 Interrupt controller The Vectored Interrupt Controller (VIC) accepts all of the interrupt request inputs and categorizes them as Fast Interrupt Request (FIQ), vectored Interrupt Request (IRQ), and non-vectored IRQ as defined by programmable settings. The programmable
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assignment scheme means that priorities of interrupts from the various peripherals can be dynamically assigned and adjusted. Fast interrupt request (FIQ) has the highest priority. If more than one request is assigned to FIQ, the VIC combines the requests to produce the FIQ signal to the ARM processor. The fastest possible FIQ latency is achieved when only one request is classified as FIQ, because then the FIQ service routine does not need to branch into the interrupt service routine but can run from the interrupt vector location. If more than one request is assigned to the FIQ class, the FIQ service routine will read a word from the VIC that identifies which FIQ source(s) is (are) requesting an interrupt. Vectored IRQs have the middle priority. Sixteen of the interrupt requests can be assigned to this category. Any of the interrupt requests can be assigned to any of the 16 vectored IRQ slots, among which slot 0 has the highest priority and slot 15 has the lowest. Nonvectored IRQs have the lowest priority. The VIC combines the requests from all the vectored and non-vectored IRQs to produce the IRQ signal to the ARM processor. The IRQ service routine can start by reading a register from the VIC and jumping there. If any of the vectored IRQs are pending, the VIC provides the address of the highest-priority requesting IRQs service routine, otherwise it provides the address of a default routine that is shared by all the non-vectored IRQs. The default routine can read another VIC register to see what IRQs are active. Each peripheral device has one interrupt line connected to the Vectored Interrupt Controller, but may have several internal interrupt flags. Individual interrupt flags may also represent more than one interrupt source.

3.3.9 Pin connect block The pin connect block allows selected pins of the microcontroller to have more than one function. Configuration registers control the multiplexers to allow connection between the pin and the on chip peripherals. Peripherals should be connected to the appropriate pins prior toBeing activated and prior to any related interrupt(s) being enabled. Activity of any enabled peripheral function that is not mapped to a related pin should be considered undefined. The Pin Control Module with its pin select registers defines the functionality of
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the microcontroller in a given hardware environment. After reset all pins of Port 0 and 1 are configured as input with the following exceptions: If debug is enabled, the JTAG pins will assume their JTAG functionality; if trace is enabled, the Trace pins will assume their trace functionality. The pins associated with the I2C0 and I2C1 interface are open drain.

3.3.10 Fast general purpose parallel I/O (GPIO) Device pins that are not connected to a specific peripheral function are controlled by the GPIO registers. Pins may be dynamically configured as inputs or outputs. Separate registers allow setting or clearing any number of outputs simultaneously. The value of the output register may be read back, as well as the current state of the port pins. LPC2141/42/44/46/48 introduces accelerated GPIO functions over prior LPC2000 devices: GPIO registers are relocated to the ARM local bus for the fastest possible I/O timing. Mask registers allow treating sets of port bits as a group, leaving other bits unchanged. All GPIO registers are byte addressable. Entire port value can be written in one instruction. Bit-level set and clear registers allow a single instruction set or clear of any number of bits in one port. Direction control of individual bits. Separate control of output set and clear. All I/O default to inputs after reset.

3.3.11 UARTs The LPC2141/42/44/46/48 each contains two UARTs. In addition to standard transmit and receive data lines, the LPC2144/46/48 UART1 also provide a full modem control handshake interface. Compared to previous LPC2000 microcontrollers, UARTs in LPC2141/42/44/46/48 introduce a fractional baud rate generator for both UARTs, enabling these microcontrollers to achieve standard baud rate such as 115200 with any
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crystal frequency above 2 MHz. In addition, auto-CTS/RTS flow-control functions are fully implemented in hardware (UART1 in LPC2144/46/48 only). 16 byte Receive and Transmit FIFO. Register locations conform to 550 industry standard. Receiver FIFO triggers points at 1, 4, 8, and 14 bytes Built-in fractional baud rate generator covering wide range of baud rates without a need for external crystals of particular values. Transmission FIFO control enables implementation of software (XON/XOFF) Flow control on both UARTs. LPC2144/46/48 UART1 equipped with standard modem interface signals. This Module also provides full support for hardware flow control (auto-CTS/RTS). 3.3.12. I2C-bus serial I/O controller The LPC2141/42/44/46/48 each contains two I2C-bus controllers. The I2C-bus is bidirectional, for inter-IC control using only two wires: a serial clock line (SCL), and a serial data line (SDA). Each device is recognized by a unique address and can operate as either a receiver-only device (e.g., an LCD driver or a transmitter with the capability to both receive and send information (such as memory)). Transmitters and/or receivers can operate in either master or slave mode, depending on whether the chip has to initiate a data transfer or is only addressed. The I2C-bus is a multi-master bus; it can be controlled by more than one bus master connected to it. The I2C-bus implemented in LPC2141/42/44/46/48 supports bit rates up to 400 k bit/s (Fast I2C-bus) Compliant with standard I2C-bus interface. Easy to configure as master, slave, or master/slave. Programmable clocks allow versatile rate control. Bidirectional data transfer between masters and slaves Multi-master bus (no central master). Arbitration between simultaneously transmitting masters without
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corruption of serial data on the bus. Serial clock synchronization allows devices with different bit rates to communicate via one serial bus. Serial clock synchronization can be used as a handshake mechanism to suspend and resume serial transfer. 3.3.13. SPI serial I/O controller The LPC2141/42/44/46/48 each contains one SPI controller. The SPI is a full duplex serial interface, designed to handle multiple masters and slaves connected to a given bus. Only a single master and a single slave can communicate on the interface during a given data transfer. During a data transfer the master always sends a byte of data to the slave, and the slave always sends a byte of data to the master. Compliant with Serial Peripheral Interface (SPI) specification. Synchronous, Serial, Full Duplex, Communication. Combined SPI master and slave. Maximum data bit rate of one eighth of the input clock rate.

3.3.14 SSP serial I/O controller The LPC2141/42/44/46/48 each contains one SSP. The SSP controller is capable of operation on a SPI, 4-wire SSI, or Micro wire bus. It can interact with multiple masters and slaves on the bus. However, only a single master and a single slave can communicate on the bus during a given data transfer. The SSP supports full duplex transfers, with data frames of 4 bits to 16 bits of data flowing from the master to the slave and from the slave to the master. Often only one of these data flows carries meaningful data. Compatible with Motorolas SPI, TIs 4-wire SSI and National Semiconductors Micro wire buses. Synchronous serial communication. Master or slave operation. 8-frame FIFOs for both transmit and receive. Four bits to 16 bits per frame.
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3.3.15 General purpose timers/external event counters The Timer/Counter is designed to count cycles of the peripheral clock (PCLK) or an externally supplied clock and optionally generate interrupts or perform other actions at specified timer values, based on four match registers. It also includes four capture inputs to trap the timer value when an input signals transitions, optionally generating an interrupt. Multiple pins can be selected to perform a single capture or match function, providing an application with or and and, as well as broadcast functions among them. The LPC2141/42/44/46/48 can count external events on one of the capture inputs if the minimum external pulse is equal or longer than a period of the PCLK. In this configuration, unused capture lines can be selected as regular timer capture inputs, or used as external interrupts. A 32-bit timer/counter with a programmable 32-bit prescaler. External event counter or timer operation. Four 32-bit capture channels per timer/counter that can take a snapshot of the timer value when an input signals transitions. A capture event may also optionally generate an interrupt. Four 32-bit match registers that allow: Continuous operation with optional interrupt generation. Stop timer on match with optional interrupt generation. Reset timer on match with optional interrupt generation.

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CHAPTER-4 GLOBAL SYSTEM FOR MOBILE COMMUNICATION (GSM)


4.1 Definition
Global system for mobile communication (GSM) is a globally accepted standard for digital cellular communication. GSM is the name of a standardization group established in 1982 to create a common European mobile telephone standard that would formulate specifications for a pan-European mobile cellular radio system operating at 900MHz. Originally from ( Groupe Spcial Mobile) is the most popular standard for mobile phones in the world. Its promoter, the GSM Association, estimates that 82% of the global mobile market uses the standard. GSM is used by over 2 billion people across more than 212 countries and territories. Its ubiquity makes international roaming very common between mobile phone operators, enabling subscribers to use their phones in many parts of the world. GSM differs from its predecessors in that both signaling and speech channels are digital call quality, and so is considered a second generation (2G) mobile phone system. This has also meant that data communication was built into the system using the 3rd Generation Partnership Project (3GPP). The key advantage of GSM systems to consumers has been better voice quality and low-cost alternatives to making calls, such as the Short message service (SMS, also called "text messaging"). The advantage for network operators has been the ease of deploying equipment from any vendors that implement the standard. Like other cellular standards, GSM allows network operators to offer roaming services so that subscribers can use their phones on GSM networks all over the world.

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4.2 History
In 1982, the European Conference of Postal and Telecommunications Administrations (CEPT) created the Groupe Spcial Mobile (GSM) to develop a standard for a mobile telephone system that could be used across Europe. In 1987, a memorandum of understanding was signed by 13 countries to develop a common cellular telephone system across Europe. In 1989, GSM responsibility was transferred to the European

Telecommunications Standards Institute (ETSI) and phase I of the GSM specifications were published in 1990. The first GSM network was launched in 1991 by Radiolinja in Finland with joint technical infrastructure maintenance from Ericsson. By the end of 1993, over a million subscribers were using GSM phone networks being operated by 70 carriers across 48 countries. A summary of GSM milestones are: Year Milestone 1982 GSM formed 1986 field test 1987 TDMA chosen as access method 1988 memorandum of understanding signed 1989 validation of GSM system 1990 Pre-operation system 1991 commercial system start-up 1992 coverage of larger cities/airports 1993 coverage of main roads 1995 coverage of rural areas

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4.3 Technical details


4.3.1 What is GSM? GSM (Global System for Mobile communications) is an open, digital cellular technology used for transmitting mobile voice and data services. GSM differs from first generation wireless systems in that it uses digital technology and time division multiple access transmission methods. GSM is a circuit-switched system that divides each 200kHz channel into eight 25kHz time-slots. GSM operates in the 900MHz and 1.8GHz bands in Europe and the 1.9GHz and 850MHz bands in the US. The 850MHz band is also used for GSM and 3GSM in Australia, Canada and many South American countries. GSM supports data transfer speeds 9.6 kbit/s, allowing the transmission of basic data services such as SMS (Short Message Service). GSM satellite roaming has also extended service access to areas where terrestrial coverage is not available. The transmission power in the handset is limited to a maximum of 2 watts in GSM850/900 and 1 watt in GSM1800/1900. GSM was further enhanced in 1997 with the Enhanced Full Rate (EFR) codec, a 12.2 kbit/s codec that uses a full rate channel. Finally, with the development of UMTS, EFR was refactored into a variable-rate codec called AMR-Narrowband, which is high quality and robust against interference when used on full rate channels, and less robust but still relatively high quality when used in good radio conditions on half-rate channels. There are four different cell sizes in a GSM networkmacro, micro, pico and umbrella cells. The coverage area of each cell varies according to the implementation environment. Macro cells can be regarded as cells where the base station antenna is installed on a mast or a building above average roof top level. Micro cells are cells whose antenna height is under average roof top level; they are typically used in urban areas. Picocells are small cells whose coverage diameter is a few dozen meters; they are mainly used indoors. Umbrella cells are used to cover shadowed regions of smaller cells and fill in gaps in coverage between those cells.
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Cell horizontal radius varies depending on antenna height, antenna gain and propagation conditions from a couple of hundred meters to several tens of kilometers. The longest distance the GSM specification supports in practical use is 35 kilometres (22 mi). There are also several implementations of the concept of an extended cell, where the cell radius could be double or even more, depending on the antenna system, the type of terrain and the timing advance. Indoor coverage is also supported by GSM and may be achieved by using an indoor picocell base station, or an indoor repeater with distributed indoor antennas fed through power splitters, to deliver the radio signals from an antenna outdoors to the separate indoor distributed antenna system. These are typically deployed when a lot of call capacity is needed indoors, for example in shopping centers or airports. However, this is not a prerequisite, since indoor coverage is also provided by in-building penetration of the radio signals from nearby cells. 4.3.2 GSM Network The GSM network is divided into three major systems: the switching system (SS), the base station system, and the operation and support system (OSS). The basic GSM network elements are shown in fig.

Fig 4.1: GSM network elements

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The Switching System The switching system (SS) is responsible for performing call processing and subscriber-related functions. The switching system includes the following functional units.

Home Location Register (HLR)The HLR is a database used for storage and management of subscriptions. The HLR is considered the most important database, as it stores permanent data about subscribers, including a subscriber's service profile, location information, and activity status. When an individual buys a subscription from one of the PCS operators, he or she is registered in the HLR of that operator.

Mobile Services switching center (MSC)The MSC performs the telephony switching functions of the system. It controls calls to and from other telephone and data systems. It also performs such functions as toll ticketing, network interfacing, common channel signaling, and others.

Visitor Location Register (VLR)The VLR is a database that contains temporary information about subscribers that is needed by the MSC in order to service visiting subscribers. The VLR is always integrated with the MSC. When a mobile station roams into a new MSC area, the VLR connected to that MSC will request data about the mobile station from the HLR. Authentication center (AUC)A unit called the AUC provides authentication and encryption parameters that verify the user's identity and ensure the confidentiality of each call. The AUC protects network operators from different types of fraud found in today's cellular world.

Equipment identity register (EIR)The EIR is a database that contains information about the identity of mobile equipment that prevents calls from stolen, unauthorized, or defective mobile stations. The AUC and EIR are implemented as stand-alone nodes or as a combined AUC/EIR node.

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The Base Station System (BSS)

All radio-related functions are performed in the BSS, which consists of base station controllers (BSCs) and the base transceiver stations (BTSs).

BSCThe BSC provides all the control functions and physical links between the MSC and BTS. It is a high-capacity switch that provides functions such as handover, cell configuration data, and control of radio frequency (RF) power levels in base transceiver stations. A number of BSCs are served by an MSC.

BTSBTS handles the radio interface to the mobile station. The BTS is the radio equipment (transceivers and antennas) needed to service each cell in the network. A group of BTSs are controlled by a BSC.

The Operation and Support System

The operations and maintenance center (OMC) is connected to all equipment in the switching system and to the BSC. The implementation of OMC is called the operation and support system (OSS). The OSS is the functional entity from which the network operator monitors and controls the system. The purpose of OSS is to offer the customer cost-effective support for centralized, regional and local operational and maintenance activities that are required for a GSM network. An important function of OSS is to provide a network overview and support the maintenance activities of different operation and maintenance organizations. Additional Functional Elements

Other functional elements are as follows:

Message center (MXE)The MXE is a node that provides integrated voice, fax, and data messaging. Specifically, the MXE handles short message service, cell broadcast, voice mail, fax mail, e-mail, and notification.
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Mobile service node (MSN)The MSN is the node that handles the mobile intelligent network (IN) services.

Gateway mobile services switching center (GMSC)A gateway is a node used to interconnect two networks. The gateway is often implemented in an MSC. The MSC is then referred to as the GMSC.

GSM interworking unit (GIWU)The GIWU consists of both hardware and software that provides an interface to various networks for data communications. Through the GIWU, users can alternate between speech and data during the same call. The GIWU hardware equipment is physically located at the MSC/VLR.

4.4 GSM Security


GSM was designed with a moderate level of security. The system was designed to authenticate the subscriber using a pre-shared key and challenge-response.

Communications between the subscriber and the base station can be encrypted. The security model therefore offers confidentiality and authentication, but limited authorization capabilities, and no non-repudiation.GSM uses several cryptographic algorithms for security.
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CHAPTER-5 INFRARED SENSOR


5.1 IR Sensor
An infrared sensor is an electronic device that emits and/or detects infrared radiation in order to sense some aspect of its surroundings. Infrared sensors can measure the heat of an object, as well as detect motion. Many of these types of sensors only measure infrared radiation, rather than emitting it, and thus are known as passive infrared (PIR) sensors. All objects emit some form of thermal radiation, usually in the infrared spectrum. This radiation is invisible to our eyes, but can be detected by an infrared sensor that accepts and interprets it. In a typical infrared sensor like a motion detector, radiation enters the front and reaches the sensor itself at the center of the device. This part may be composed of more than one individual sensor, each of them being made from pyroelectric materials, whether natural or artificial. These are materials that generate an electrical voltage when heated or cooled. These pyroelectric materials are integrated into a small circuit board. They are wired in such a way so that when the sensor detects an increase in the heat of a small part of its field of view, it will trigger the motion detector's alarm. It is very common for an infrared sensor to be integrated into motion detectors like those used as part of a residential or commercial security system. An infrared sensor can be thought of as a camera that briefly remembers how an area's infrared radiation appears. A sudden change in one area of the field of view, especially one that moves, will change the way electricity goes from the pyroelectric materials through the rest of the circuit. This will trigger the motion detector to activate an alarm. If the whole field of view changes temperature, this will not trigger the device.
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Infrared motion detectors used in residential security systems are also desensitized somewhat, with the goal of preventing false alarms. Typically, a motion detector like these will not register movement by any object weighing less than 40 pounds (18 kg). With this modification, household pets will be able to move freely around the house without their owners needing to worry about a false alarm. For households with large pets, sensors with an 80-pound (36 kg) allowance are also made.

5.2 Principle
IR LED emits infrared radiation. This radiation illuminates the surface in front of LED. Surface reflects the infrared light. Depending on reflectivity of the surface, amount of light reflected varies. This reflected light is made incident on reverse biased IR sensor. When photons are incident on reverse biased junction of this diode, electron-hole pairs are generated, which results in reverse leakage current. Amount of electron-hole pairs generated depends on intensity of incident IR radiation. More intense radiation results in more reverse leakage current. This current can be passed through a resistor so as to get proportional voltage. Thus as intensity of incident rays varies, voltage across resistor will vary accordingly. This voltage can then be given to OPAMP based comparator.Output of the comparator can be read by uC. Alternatively, you can use on-chip ADC in AVR microcontroller to measure this voltage and perform comparison in software.

Fig 5.1 : IR sensoR

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CHAPTER-6 SERIAL COMMUNICATION


6.1 RS232 (serial port)
RS-232 (Recommended Standard - 232) is a telecommunications standard for binary serial communications between devices. The devices are commonly referred to as a DTE (data terminal equipment) and DCE (data communications equipment); The RS232 is the communication line which enables the data transmission by only using three wire links. The three links provides transmit, receive and common ground... The transmit and receive line on this connecter send and receive data between the computers. As the name indicates, the data is transmitted serially. The two pins are TXD & RXD. There are other lines on this port as RTS, CTS, DSR, DTR, and RTS, RI. The 1 and 0 are the data which defines a voltage level of 3V to 25V and -3V to -25V respectively.

6.2 TTL Logic Levels


When communicating with various micro processors one needs to convert the RS232 levels down to lower levels, typically 3.3 or 5.0 Volts. Here is a cheap and simple way to do that. Serial RS-232 (V.24) communication works with voltages -15V to +15V for high and low. On the other hand, TTL logic operates between 0V and +5V. Modern low power consumption logic operates in the range of 0V and +3.3V or even lower. RS-232 TTL Logic

-15V -3V +2V +5V High +3V +15V 0V +0.8V Low Table 6.2 TTL Logic Levels
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Thus the RS-232 signal levels are far too high TTL electronics, and the negative RS-232 voltage for high cant be handled at all by computer logic. To receive serial data from an RS-232 interface the voltage has to be reduced. Also the low and high voltage level has to be inverted. This level converter uses a Max232 and five capacitors. The MAX232 from Maxim was the first IC which in one package contains the necessary drivers and receivers to adapt the RS-232 signal voltage levels to TTL logic.

6.3 PIN DIAGRAM

Fig 6.1: MAX-232 pin diagram

MAX-232 includes a Charge Pump, which generates +10V and -10V from a single 5v supply. This I.C. also includes two receivers and two transmitters in the same package. This is useful in many cases when you only want to use the Transmit and Receive data Lines. However this convenience is expensive, but compared with the price of designing a new power supply it is very cheap. There are also many variations of these devices. The large value of capacitors are not only bulky, but also expensive. That's why
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other devices are available which use smaller capacitors and even some with built-in capacitors.

Fig 6.2: IC pins of MAX-232

6.4 RS232 INTERFACED TO MAX 232


J2 9 8 7 6 5 4 3 2 1
16

U3 T1OUT TXD P3.1 C4 5V C5 0.1uf C6 0.1uf 0.1uf C7 2 6 13 8 10 11 1 3 4 5 R1IN R2IN T2IN T1IN C1+ C1C2+ C2V+ V-

C1 1uf 12 R1OUT 9 R2OUT 14 T1OUT 7 T2OUT P3.0 RXD T1OUT

MAX3232 0.1uf

Fig 6.3 RS232 Interfaced to MAX 232

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15

GND

VCC

Rs232 is 9 pin db connector, only three pins of this are used i.e. 2, 3, 5 the transmit pin of RS232 is connected to rx pin of microcontroller

6.5 Max232 interfaced to ARM

Fig 6.4: MAX-232 interfacing with ARM

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CHAPTER-7 LIQUID CRYSTAL DISPLAY


7.1 Description
A liquid crystal display (LCD) is a flat panel display, electronic visual display, or video display that uses the light modulating properties of liquid crystals (LCs). LCs do not emit light directly. LCDs are more energy efficient and offer safer disposal than CRTs. Its low electrical power consumption enables it to be used in battery-powered electronic equipment. It is an electronically modulated optical device made up of any number of segments filled with liquid crystals and arrayed in front of a light source (backlight) or reflector to produce images in color or monochrome. The most flexible ones use an array of small pixels. The earliest discovery leading to the development of LCD technology, the discovery of liquid crystals. Resolution: The horizontal and vertical size expressed in pixels (e.g., 1024x768). Unlike CRT monitors, LCD monitors have a native-supported resolution for best display effect. Dot pitch: The distance between the centers of two adjacent pixels. The smaller the dot pitch size, the less granularity is present, resulting in a sharper image. Dot pitch may be the same both vertically and horizontally, or different (less common). Viewable size: The size of an LCD panel measured on the diagonal (more specifically known as active display area). Response time: The minimum time necessary to change a pixel's color or brightness. Response time is also divided into rise and fall time. Matrix type: Active or Passive. Viewing angle: (coll., more specifically known as viewing direction).
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Color support: How many types of colors are supported (coll., more specifically known as color gamut). Brightness: The amount of light emitted from the display (coll., more specifically known as luminance). Contrast ratio: The ratio of the intensity of the brightest bright to the darkest dark. Aspect ratio: The ratio of the width to the height (for example, 4:3, 16:9 or 16:10). Input ports (e.g., DVI, VGA, LVDS, or even S-Video and HDMI).

LCD is a type of display used in digital watches and many portable computers. LCD displays utilize to sheets of polarizing material with a liquid crystal solution between them. An electric current passed through the liquid causes the crystals to align so that light cannot pass through them. LCD technology has advanced very rapidly since its initial inception over a decade ago for use in laptop computers. Technical achievement has resulted in brighter displace, higher resolutions, reduce response times and cheaper manufacturing process.

Fig 7.1: LCD screen The liquid crystals can be manipulated through an applied electric voltage so that light is allowed to pass or is blocked. By carefully controlling where and what wavelength (color) of light is allowed to pass, the LCD monitor is able to display images. A back light provides LCD monitors brightness. Just as there are many varieties of solids and liquids, there is also a variety of liquid crystal substances. Depending on the temperature and particular nature of a substance, liquid crystals can be in one of several distinct phases.

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One feature of liquid crystals is that they're affected by electric current. A particular sort of nematic liquid crystal, called twisted nematics (TN), is naturally twisted. Applying an electric current to these liquid crystals will untwist them to varying degrees, depending on the current's voltage. LCDs use these liquid crystals because they react predictably to electric current in such a way as to control light passage. Over the years many improvements have been made to LCD to help enhance resolution, image, sharpness and response times.. This has been particularly important for improving LCDs ability to display small-sized fonts and image clearly. LCD interfacing with 8051 is a real-world application. In recent years the LCD is finding widespread use replacing LEDs (seven segment LEDs or other multi segment LEDs). This is due to following reasons: 1. The declining prices of LCDs. 2. The ability to display numbers, characters and graphics. This is in contrast to LEDs, which are limited to numbers and a few characters. An intelligent LCD display of two lines, 20 characters per line, which is interfaced to the 8051. 3. Incorporation of a refreshing controller into the LCD, thereby relieving the CPU to keep displaying the data. 4. Ease of programming for characters and graphics.

7.2 PIN DIAGRAM


Most of the LCD modules conform to a standard interface specification. A 14pin access is provided having eight data lines, three control lines and three power lines. The connections are laid out in one of the two common configurations, either two rows of seven pins, or a single row of 14 pins.

Fig 7.2: Diagram of LCD display


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PIN DESCRIPTIONS Vcc, Vss and Vee While Vcc and Vss provide +5V and ground respectively, Vee is used for controlling LCD contrast. RS, register select There are two very important registers inside the LCD. The RS pin is used for their selection as follows. a) If RS=0, the instruction command code register is selected, allowing the user to send a command such as clear display, cursor at home, etc., b) If RS=1 the data register is selected, allowing the user to send data to be displayed on the LCD. R/W, read/write R/W input allows the user to write information to the LCD or read information from it. R/W=1 when reading; R/W=0 when writing. EN, Enable The enable pin is used by the LCD to latch information presented to its data pins. When data is supplied to data pins, a high-to-low pulse must be applied to this pin in order for the LCD to latch in the data present at the data pins. D0-D7 The 8-bit data pins, D0-D7, are used to send information to the LCD or read the contents of the LCDs internal registers.

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Fig 7.3: Pin connections of lcd display

TABLE 7.1: PIN DESCRIPTIONS OF LCD

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TABLE 7.2: INSTRUCTION SET OF LCD

BASIC COMMANDS OF LCD: Set Cursor Move Direction: 04h Shift cursor to the left 06h Shift cursor to the right 80h force cursor to the beginning of the first line C0h force cursor to the beginning of second line 02h return home Enable Display/Cursor: 0Ch - Turn Display On, cursor off 0ah - Turn Cursor On, Display off 08h - Cursor off, Display off 0eh/0fh- display on, cursor blinking Shift Display: 18h 1Ch - Display Shift to left, right respectively Set Interface Length: 38h Initialize LCD as 2 lines, 5*7 matrixes Reading Data back is used in this application, which requires data to be moved back and forth on the LCD. The "Busy Flag" is polled to determine whether the last instruction that has been sent has completed processing. Before we send commands or data to the
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LCD module, the Module must be initialized. For eight bit mode, this is done using the following series of operations: Wait more than 15 msecs after power is applied. Write 0x030 to LCD and wait 5 msecs for the instruction to complete Write 0x030 to LCD and wait 160 usecs for instruction to complete Write 0x030 AGAIN to LCD and wait 160 usecs or Poll the Busy Flag Set the Operating Characteristics of the LCD Write "Set Interface Length" Write 0x010 to turn off the Display Write 0x001 to Clear the Display Write "Set Cursor Move Direction" Setting Cursor Behaviour Bits Write "Enable Display/Cursor" & enable Display and Optional Cursor

When LCD is powered up, the display should show a series of dark squares, possibly only on part of display. The display module resets itself to an initial state when power is applied, which curiously has the display blanked off so that even if characters are entered, they cannot be seen. It is therefore necessary to issue a command at this point, to switch the display on.

7.3 Initializing the LCD


LCD must be initialized and configured before using. This is accomplished by sending a number of initialization instructions to the LCD. The first instruction send must tell the LCD whether it is to be communicated with an 8-bit or 4-bit data bus.. a) Clearing the Display

When the LCD is first initialized, the screen should automatically be cleared by the controller.

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b) Writing Text into the LCD The data to be displayed is send to the LCD through data bus. c) Cursor Positioning The cursor positioning in a LCD can be done in the right entry mode or left entry mode. As left entry mode is flexible it is implemented. Interfacing of LCD:

Fig 7.4: Interfacing of LCD Description of interfacing diagram The figure 7.4 depicts the interfacing diagram of LCD with ARM. In this LCD we have 8 data bits , two power supply and two ground pins and finally three control pins for controlling the operation of LCD. The three pins RS, R/W, EN pin which are the control pins of LCD are connected to a voltage supply of 5 volts. From the 8 data lines present in LCD only 4 data lines ranging from 7 to 10 will be connected to arm using the pins 27 to 30. The required data that is to be sent from the processor to the display unit will be sent through these pins only . we use LCD display in our project to display the required information like speed of the zone , speed limit with which the vehicle must travel in that zone .

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CHAPTER-8 REGULATED POWER SUPPLY


The power supply are designed to convert high voltage AC mains electricity to a suitable low voltage supply for electronic circuits and other devices. A power supply can by broken down into a series of blocks, each of which performs a particular function. A d.c power supply which maintains the output voltage constant irrespective of a.c mains fluctuations or load variations is known as Regulated D.C Power Supply For example a 5V regulated power supply system as shown below:

Fig 8.1: Functional Block Diagram of Power supply

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8.1 Transformer
A transformer is an electrical device which is used to convert electrical power from one electrical circuit to another without change in frequency. Transformers convert AC electricity from one voltage to another with little loss of power. Transformers work only with AC and this is one of the reasons why mains electricity is AC. Step-up transformers increase in output voltage, step-down transformers decrease in output voltage. Most power supplies use a step-down transformer to reduce the dangerously high mains voltage to a safer low voltage. The input coil is called the primary and the output coil is called the secondary. There is no electrical connection between the two coils; instead they are linked by an alternating magnetic field created in the soft-iron core of the transformer. The two lines in the middle of the circuit symbol represent the core. Transformers waste very

little power so the power out is (almost) equal to the power in. Note that as voltage is stepped down current is stepped up. The ratio of the number of turns on each coil, called the turns ratio, determines the ratio of the voltages. A step-down transformer has a large number of turns on its primary (input) coil which is connected to the high voltage mains supply, and a small number of turns on its secondary (output) coil to give a low output voltage.

Fig 8.2: An Electrical Transformer


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Transformers waste very little power so the power out is (almost) equal to the power in. Note that as voltage is stepped down current is stepped up. The ratio of the number of turns on each coil, called the turns ratio, determines the ratio of the voltages. A step-down transformer has a large number of turns on its primary (input) coil which is connected to the high voltage mains supply, and a small number of turns on its secondary (output) coil to give a low output voltage.

Turns ratio = Vp/ VS = Np/NS Power Out= Power In VS X IS=VP X IP

Vp = primary (input) voltage Np = number of turns on primary coil Ip = primary (input) current

8.2 Rectifier
A circuit, which is used to convert a.c to dc, is known as RECTIFIER. The process of conversion a.c to d.c is called rectification. There are several ways of connecting diodes to make a rectifier to convert AC to DC. The bridge rectifier is the most important and it produces full-wave varying DC. A full-wave rectifier can also be made from just two diodes if a centre-tap transformer is used, but this method is rarely used now that diodes are cheaper. A single diode can be used as a rectifier but it only uses the positive (+) parts of the AC wave to produce half-wave varying DC. Types of rectifiers: Half wave Rectifier Full wave rectifier 1. Center tap full wave rectifier. 2. Bridge type full bridge rectifier.
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Comparison of rectifier circuits:


Type of Rectifier Half wave Parameter Number of diodes 1 PIV of diodes Vm 2Vm Vm 2 3 Full wave Bridge

D.C output voltage

Vm/

2Vm/

2Vm/

Vdc, at no-load

0.318Vm

0.636Vm

0.636Vm

Ripple factor RippleFrequency

1.21

0.482

0.482

F Rectification Efficiency RMS voltage Vrms 0.406 Vm/2

2f

2f

0.812 Vm/2

0.812 Vm/2

Table 8.1 : comparison of rectifiers


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Full-wave rectifier: From the above comparisons we came to know that full wave bridge rectifier as more advantages than the other two rectifiers. So, in our project we are using full wave bridge rectifier circuit. Bridge Rectifier: A bridge rectifier makes use of four diodes in a bridge arrangement to achieve full-wave rectification. This is a widely used configuration, both with individual diodes wired as shown and with single component bridges where the diode bridge is wired internally. A bridge rectifier makes use of four diodes in a bridge arrangement as shown in fig(a) to achieve full-wave rectification. This is a widely used configuration, both with individual diodes wired as shown and with single component bridges where the diode bridge is wired internally. Bridge rectifiers are rated by the maximum current they can pass and the maximum reverse voltage they can withstand (this must be at least three times the supply RMS voltage so the rectifier can withstand the peak voltages).

Figure 8.3: Bridge rectifier

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8.3 Operation
During positive half cycle of secondary, the diodes D2 and D3 are in forward biased while D1 and D4 are in reverse biased as shown in the fig(b). The current flow direction is shown in the fig (b) with dotted arrows. During negative half cycle of secondary voltage, the diodes D1 and D4 are in forward biased while D2 and D3 are in reverse biased as shown in the fig(c). The current flow direction is shown in the fig (c) with dotted arrows

Fig 8.4: Direction of current flow in a circuit

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8.4 Filter
A Filter is a device, which removes the a.c component of rectifier output but allows the d.c component to reach the load Capacitor filter: We have seen that the ripple content in the rectified output of half wave rectifier is 121% or that of full-wave or bridge rectifier or bridge rectifier is 48% such high percentages of ripples is not acceptable for most of the applications. Ripples can be removed by one of the following methods of filtering: (a) A capacitor, in parallel to the load, provides an easier by pass for the ripples voltage though it due to low impedance. At ripple frequency and leave the d.c.to appears the load. (b) An inductor, in series with the load, prevents the passage of the ripple current (due to high impedance at ripple frequency) while allowing the d.c (due to low resistance to d.c) (c) various combinations of capacitor and inductor, such as L-section filter section

filter, multiple section filter etc. which make use of both the properties mentioned in (a) and (b) above. Two cases of capacitor filter, one applied on half wave rectifier and another with full wave rectifier. Filtering is performed by a large value electrolytic capacitor connected across the DC supply to act as a reservoir, supplying current to the output when the varying DC voltage from the rectifier is falling. Filtering significantly increases the average DC voltage to almost the peak value (1.4 RMS value). To calculate the value of capacitor(C), C = *3*f*r*Rl Where, f = supply frequency, r = ripple factor, Rl = load resistance Note: In our circuit we are using 1000microfarads.
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8.5 Regulator
Voltage regulator ICs is available with fixed (typically 5, 12 and 15V) or variable output voltages. The maximum current they can pass also rates them. Negative voltage regulators are available, mainly for use in dual supplies. Most regulators include some automatic protection from excessive current ('overload protection') and overheating ('thermal protection'). Many of the fixed voltage regulator ICs have 3 leads and look like power transistors, such as the 7805 +5V 1A regulator shown on the right. The LM7805 is simple to use. You simply connect the positive lead of your unregulated DC power supply (anything from 9VDC to 24VDC) to the Input pin, connect the negative lead to the Common pin and then when you turn on the power, you get a 5 volt supply from the output pin.

Fig 8.5 : A Three Terminal Voltage Regulator 78XX: The Bay Linear LM78XX is integrated linear positive regulator with three terminals. The LM78XX offer several fixed output voltages making them useful in wide range of applications. When used as a zener diode/resistor combination replacement, the LM78XX usually results in an effective output impedance improvement of two orders of magnitude, lower quiescent current. The LM78XX is available in the TO-252, TO-220 & TO-263packages.
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Power Suplly Interfacing With Microcontroller

1 230V 50Hz 2

3 4 5 + 1 1 100uf VIN 7805 VOUT 3 100uf

3
U3 VIN 1117 VOUT 1

P1.27 VREF XTAL1 XTAL2 P1.28 VSSA P0.23 RESET P1.29 P0.20 P0.19 P0.18 P1.30 VDD Vss VBAT

P0.21 P0.22 RTXC1 P1.19 RTXC2 Vss VDDA P1.18 P0.25 D+ DP1.17 P0.28 P0.29 P0.30 P1.16

LPC 2148

P1.20 P0.17 P0.16 P0.15 P1.21 VDD Vss P0.14 P1.22 P0.13 P0.12 P0.11 P1.23 P0.10 P0.9 P0.8

Figure 8.6 Power Suplly Interfacing With Microcontroller

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P0.31 Vss P0.0 P1.31 P0.1 P0.2 VDD P1.26 Vss P0.3 P0.4 P1.25 P0.5 P0.6 P0.7 P1.24

CHAPTER-9 SOFTWARE
About Keil Software
It is possible to create the source files in a text editor such as Notepad, run the Compiler on each C source file, specifying a list of controls, run the Assembler on each Assembler source file, specifying another list of controls, run either the Library Manager or Linker (again specifying a list of controls) and finally running the Object-HEX Converter to convert the Linker output file to an Intel Hex File. Once that has been completed the Hex File can be downloaded to the target hardware and debugged. Alternatively KEIL can be used to create source files; automatically compile, link and covert using options set with an easy to use user interface and finally simulate or perform debugging on the hardware with access to C variables and memory. Unless you have to use the tolls on the command line, the choice is clear. KEIL Greatly simplifies the process of creating and testing an embedded application.

Project Keil
The user of KEIL centers on projects. A project is a list of all the source files required to build a single application, all the tool options which specify exactly how to build the application, and if required how the application should be simulated. A project contains enough information to take a set of source files and generate exactly the binary code required for the application. Because of the high degree of flexibility required from the tools, there are many options that can be set to configure the tools to operate in a specific manner. It would be tedious to have to set these options up every time the application is being built; therefore they are stored in a project file. Loading the project file into KEIL informs KEIL which source files are required, where they are, and how to configure the tools in the correct way. KEIL can then execute each tool with the
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correct options. It is also possible to create new projects in KEIL. Source files are added to the project and the tool options are set as required. The project can then be saved to preserve the settings. The project is reloaded and the simulator or debugger started, all the desired windows are opened. KEIL project files have the extension.

Simulator/Debugger
The simulator/ debugger in KEIL can perform a very detailed simulation of a micro controller along with external signals. It is possible to view the precise execution time of a single assembly instruction, or a single line of C code, all the way up to the entire application, simply by entering the crystal frequency. A window can be opened for each peripheral on the device, showing the state of the peripheral. This enables quick trouble shooting of mis-configured peripherals. Breakpoints may be set on either assembly instructions or lines of C code, and execution may be stepped through one instruction or C line at a time. The contents of all the memory areas may be viewed along with ability to find specific variables. In addition the registers may be viewed allowing a detailed view of what the microcontroller is doing at any point in time.

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CONCLUSION & FUTURE ENHANCEMENT


CONCLUSION
The main theme of our project is to monitor the patients tablet timings without the presence of doctor at the patient and displaying the information before the doctor. This monitoring can be done through the ARM-7 microcontrollers. The whole data from the controller is collected, processed is stored into the memory, data is transferred with the help of a wireless module designed by a GSM module. As this GSM modules have Wireless Application Protocol, though there are different transmitters, it can receiver all the information from the each transmitter and stores it the buffer and displays the information before the doctor without any mixing up the data of one transmitter with other. In medical fields, there are many patients who wish to be taken care of at their own homes. However, medical care at homes requires self-management of diseases and illnesses by the patients themselves. So this system is very useful to monitor the patient tablet timings by doctor virtually.

FUTURE ENHANCEMENT
In future the systems may be developed providing medical staff with accurate medication history, enabling them to visually analyze their patients medication.

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