1 DEPARTRMENT. OF ELECTRICAL & ELECTRONICS MICROPROCESSOR LAB EXPERIMENT NO.

Name: Partner, s Name 1 2 3 Experiment No: Performing Date: Class Sr No: Cheeked On:

AIM: - To obtain interfacing of RAM chip to 8085 / 8086 based system.

INSTRUMENT REQUIRED:1. Training Kit 8085, 3. Key board, 2. 6264 Ram study card, 4. Connecting wire, 5. Bus bar 50 pin

General Procedures:1. 2. 3. 4. 5. 6. Connect the Ram study card with 8085 microprocessor training kit using 50 pin FRC. Check the polarity of cable for proper communication between kit and card. Keep the switch in single step mode. Enter the program given from memory location 3000H. Execute the program. See the results on LEDs by single stepping program.

Prepared by: -- SULEKHA SAXENA (AP)

Assembly language programming:Memory Location 3000 3003 3005 3006 3007 3009 300A 300B 300D 300E 300F 3011 3012 3015 3016 3017 3018 3019 301A 301B Assembly code LXI H 8000H MVI A AAH MOV M,A INX H MVI A 55H MOV M,A INX H MVI A FFH MOV M,A INX H MVI A 00 MOV M,A LXI H 8000H MOV A,M INX H MOV A,M INX H MOV A,M INX H MOV A,M ; read 4th data from memory. ; read 3rd data from memory. ; read 2nd data from memory. ; take 4th data. ; write data into memory. ; Initialize memory. ; read data from memory. ; take 3rd data. ; write data into memory. ; take 2nd data. ; write data into memory. Task ; Initialize memory ; Take the data. ; write data into memory

301C JMP 3000H ; repeat the process. __________________________________________________________________________ Prepared by: -- SULEKHA SAXENA (AP)

Result :-

STEP STERT 1 2 3 4 5 6 7

D7 1 0 1 0 1 0 1 0

D6 0 1 1 0 0 1 1 0

D5 1 0 1 0 1 0 1 0

D4 0 1 1 0 0 1 1 0

D3 1 0 1 0 1 0 1 0

D2 0 1 1 0 0 1 1 0

D1 1 0 1 0 1 0 1 0

D0 0 1 1 0 0 1 1 0

RD 0 0 0 0 1 1 1 1

WR 1 1 1 1 0 0 0 0

CS 1 1 1 1 1 1 1 1

The result has been verified.

Precaution
1. All the connection should be tight. 2. Connection should be based on polarity of Bus bar.

Prepared by: -- SULEKHA SAXENA (AP)

2 DEPARTRMENT. OF ELECTRICAL & ELECTRONICS MICROPROCESSOR LAB EXPERIMENT NO. Name: Partner, s Name 1 2 3 Experiment No: Performing Date: Class Sr No: Cheeked On:

AIM: - To obtain interfacing of Key Board Controller.

INSTRUMENT REQUIRED:1. Training Kit 8085, 3. PC Key board, 2. Key Board Controller Kit, 4. Connecting wire, 5. Bus bar of 26 pin.

General Procedures:1. 2. 3. 4. 5. Connect the Key board controller with 8085 microprocessor training kit using 26 pin FRC. Check the polarity of cable for proper communication between kit and card. Enter the program given from memory location 4000H. Execute the program. Pressing the key of Key Board Controller Kit and See the results on 8085 LCD Screen. .

Assembly language programming:Memory Location 4000 4002 4004 Assembly code MVI A 90 OUT 03 MVI B 00 Prepared by: -- SULEKHA SAXENA (AP) ; Initialize the find key code in Reg. B Task ; Initialize the Port A, as an input & Port B and C as an out put .

4006 4008 4009 400B 400D 4010 4012 4015 4016 4018 4019 401B 401E 401F 4020 4021 4024 4025 4028 FUNCTION INPUT : OUTPUT : : CODE A A

MVI C 01 MOV A,C OUT 02 IN 00 CALL CODE CPI 08H JM DISP MOV A,B ADI 08H MOV B,A CPI 18H JP INIT MOV A,C RLC MOV C,A JMP SCAN ORA B CALL F433 JMP INTI

; Put the walking one pattern in register C , with one in LSB position. ; Move the pattern in A . ; Out of Port C. ;Input Port A. ; Codify the 8 bit word in to 8 bit ; Any key closure ? ;Yes, Go to display it. ; No, Move partial result in Reg. A. ; Increment the PC Code in part result. ; Has PC Code become I I ; Yes Go start scanning frorr Row 0. ; No ; move the walking one to scare the next line. ; Continue scanning. ; Or the PA Code with PC Code . ; Display on LCD. ; Go to scam the KB again. ; 8 bit data to 3 bits. ; 8 bits decoded data. ; 3 bits encoded data.

402B

ORA A Prepared by: -- SULEKHA SAXENA (AP)

402C 402F 4031 4032 4034 4035 4038 4039 403C

JNZ CODE2 MVI A 08 RET MVI D 00 RRC JC CODE10 INR D JMP CODE5 MOV A,D ; Check the next bit. ; Let LSB in A go to carry ; Go to return if the bit was one increment counter.

403D RET __________________________________________________________________________ Result :The result has been verifies.

Precaution 1. All the connection should be tight.

2. Connection on polarity of Bus bar.

Prepared by: -- SULEKHA SAXENA (AP)

DEPARTRMENT. OF ELECTRICAL & ELECTRONICS MICROPROCESSOR LAB EXPERIMENT NO. Partner, s Name 1 2 3

Name:

Experiment No: Performing Date:

Class Sr No: Cheeked On:

AIM: - To Perform microprocessor based traffic light control.

INSTRUMENT REQUIRED:1. Training Kit 8085, 3. Key board, 2. Traffic light control card, 4. Connecting wire, 5. Bus bar 26 pin

General Procedures:1. Connect + 5V and GND to the module from the power supply. 2. Connect 26 pin FRC Cable from 8255 of the kit to the module as per the polarity. 3. Enter the program from2000 memory address of the kit. 4. Execute the program from2000 memory address of the kit. 5. Observe the status of LEDs on the module.

Assembly language programming:Memory Location 2000 2002 Assembly code MVI A 80 OUT 03 Prepared by: -- SULEKHA SAXENA (AP) Task ;Initialize 8255, all ports . ;As output port

2004 2006 2008 200A 200C 200E 2011 2013 2015 2017 201A 201C 201E 2020 2022 2024 2027 2029 202B 202D 2030 2032 2034

MVI A 10 OUT 00 OUT 01 MVI A 11 OUT 02 CALL DELAY1 MVI A 04 OUT 00 OUT 01 CALL DELAY2 MVI A 41 OUT OO OUT 01 MVI A 11 OUT 02 CALL DELAY1 MVI A 04 OUT 00 OUT 01 CALL DELAY2 MVI A 02 OUT 00 OUT 01 Prepared by: -- SULEKHA SAXENA (AP)

;Go straight for traffic of ;Right singnal for traffic of ;UP direction and Stop signal ;For traffic of other three directions.

;Alert signal for traffic of UP directions

;Go straight and Turn. . ;Right single for traffic of RIGHT directions ;Signal for traffic of other Three directions.

;Alert signal for the traffic of RIGHT directions.

2036 2039 203B 203D 203F 2041 2043 2046 2048 204A 204C 204E 2050 2053 2055 2057 2059 205B 205D 2060 2062 2064 2066

CALL DELAY2 MVI A 01 OUT 00 OUT 01 MVI A 44 OUT 02 CALL DELAY1 MVI A 01 OUT 00 OUT 01 MVI A 22 OUT 02 CALL DELAY2 MVI A 01 OUT 00 OUT 01 MVI A 99 OUT 02 CALL DELAY1 MVI A 01 OUT 00 OUT 01 MVI A 33 Prepared by: -- SULEKHA SAXENA (AP) Alert signal for the traffic of LEFT directions. ;Signal for traffic of other Three directions. ;Go straight and Turn. ;Right single for traffic of LEFT direction and Stop. ;Alert signal for the traffic of DOWN directions. ;Signal for traffic of other Three directions. ;Go straight and Turn. ;Right single for traffic of DOWN direction and Stop.

2068 206A 206D DELAY 1 SUBROUTINE 2100 2102 2104 2106 2107 210A 210B 210E 210F 2112 DELAY 2 SUBROUTINE

OUT 02 CALL DELAY2 JMP START ;Jump to START for Loop

MVI B 25 MVI C FF MVI D FF DCR D JNZ LOOP1 DCR C JNZ LOOP2 DCR B JNZ LOOP3 RET

;delay of 10sec.

2150 MVI B 05 ;delay of 2 sec. 2152 MVI C FF 2154 MVI D FF 2156 DCR D 2157 JNZ LOOP1 215A DCR C 215B JNZ LOOP2 215E DCR B 215F JNZ LOOP3 2162 RET _____________________________________________________________________ Result :The result has been verified.

Precaution
1. All the connection should be tight. 2. Connection should be based on polarity of Bus bar.

Prepared by: -- SULEKHA SAXENA (AP)

DEPARTRMENT. OF ELECTRICAL & ELECTRONICS MICROPROCESSOR LAB EXPERIMENT NO. Partner, s Name 1 2 3

Name:

Experiment No: Performing Date:

Class Sr No: Checked On:

AIM: - To developed and run a program for finding out the largest number for a given set of numbers.

INSTRUMENT REQUIRED:1. Training Kit 8086. 2. PC Key board.

Assembly language programming:Memory Location 0400 0403 0406 0408 040A Assembly code MOV SI,0500 MOV CX,0010 MOV AH,00 CMP AH,[SI] JAE 040E Prepared by: -- SULEKHA SAXENA (AP) Task ; Load SI register with staring address of string ; Initialize Counter Reg.(with the length of string i.e. No of bytes). ; Initialize the 8 bit Acc ; The first data byte of the string with 00 ; If both bytes match (above is equal) then branch to (I)

040C

MOV AH,[SI]

; Else move the content of (0500) into 8 bit ACC i.e. a real no in AH. ;Point at the next address of string. ; Decrement the counter value if not zero, continue processing (searching to the Max No continued.) ; Max. No. in 0510 address.

040E 040F

INC SI LOOPNE 0408

04011

MOV [SI],AH

0413 HLT ; Halt. ____________________________________________________________________________ Let the given set of no at the given memory location 0500 0501 0502 0503 0504 0505 0506 0507 : : : : : : : : 01 02 03 04 05 06 15 07 0508 0509 050A 050B 050C 050D 050E 050F : : : : : : : : 12 08 09 0A 0B 0E 0C 0D

Result:0510 : 15 The result has been verified. Precautions:1 Insert the programming in 8086 kit carefully. 2.Insert the data in RAM at the prescribed location.

Prepared by: -- SULEKHA SAXENA (AP)

DEPARTRMENT. OF ELECTRICAL & ELECTRONICS MICROPROCESSOR LAB EXPERIMENT NO. Partner, s Name 1 2 3

Name:

Experiment No: Performing Date:

Class Sr No: Checked On:

AIM: - To developed and run the program for arranging in descending order of a set of numbers.

INSTRUMENT REQUIRED:1. Training Kit 8086. 2. PC Key board.

Assembly language programming:Memory Location 0200 0203 0205 0206 0208 Assembly code MOV SI,0500 MOV BX,[SI] DEC BX MOV CX,[SI] DEC CX Prepared by: -- SULEKHA SAXENA (AP) Task ; Initialize SI Reg. with Mem LOCN 0500 ; BX has the no. of bytes (to be used for sorting ) LOCN 0500 & 0501. ; Decrement the no. of bytes by one. ; Also CX has the no of bytes in LOCNS 0500 & 0501 ; Decrement the no. of bytes by one.

0209 020C 020E 020F . 0211 0213 0215

MOV SI,0502 MOV AL,[SI] INC SI CMP AL,[SI] JAE 0219 XCHG AL,[SI] DEC SI

; Initialize SI Reg. with the starting address of string (having data bytes). ;Move the first data byte of string into AL. ;Point at the next bytes of the string. ;Compare the two bytes of the sting ; If two byte s are equal or 1st byte is above that the second Byte Branch to (1). ; Else ; Second byte is less than first bytes and swap(interchange) the two bytes.

0216 0218 0219

MOV [SI],AL INC SI LOOP 020C ; Point at the next LOCN of the string. ; Loop if CX is not zero (i.e. continue processing till z=0) ; At this juncture, first sorting will be over i.e. first no. is logically compared with the rest of the no. For the correct sorting , all the nos. must be compared with each other ;logically, i.e. above processing should be carried out no. of bytes times .

021B

DEC BX

021C 021F

MOV SI 0500 JNZ 0206

0221 HLT ; Halt ________________________________________________________________________

Prepared by: -- SULEKHA SAXENA (AP)

Let the given set of no at the given memory location 0500 0501 0502 0503 0504 0505 0506 : : : : : : : 05 00 20 25 28 15 07

Result:0502 0503 0504 0505 0506 : : : : : 28 25 20 15 07

The result has been verified. Precautions:1 Insert the programming in 8086 kit carefully. 2. Insert the data in RAM at the prescribed location.

Prepared by: -- SULEKHA SAXENA (AP)

DEPARTRMENT. OF ELECTRICAL & ELECTRONICS MICROPROCESSOR LAB EXPERIMENT NO. Partner, s Name 1 2 3

Name:

Experiment No: Performing Date:

Class Sr No: Checked On:

AIM: - To perform multiplication/Division of given number

INSTRUMENT REQUIRED:1. Training Kit 8086. 2. PC Key board.

Assembly language programming:(A) PROGRAM FOR MULTIPLICATION

Memory Location 0300 0302 0304 0306 Assembly code MOV AL,9 MOV BL,8 MUL BL MOV [0400],AL Prepared by: -- SULEKHA SAXENA (AP) Task ; Load the register AL with 9 ; Load the register BL with 8 ; Multiply the content of AL with BL ; Content of AL moved at the Memory location 0400

030C

MOV SI,0400

; Initialize SI Reg. with the starting address of string (having data bytes). ; Halt

030F

HLT

Result:Multiplication Result isThe result has been verified.

48

(B) PROGRAM FOR DIVISION

Memory Location 0500 0503 0506 Assembly code MOV AL,8 MOV BL,2 DIV BL Task ; Load the register AL with 8 ; Load the register BL with 2 ; Divide the content of AL with BL ; Content of AL moved at the Memory location 0600 ; Initialize SI Reg. with the starting address of string (having data bytes). ; Halt

0508

MOV [0600],AL

050C

MOV SI,0600

050F

HLT

Prepared by: -- SULEKHA SAXENA (AP)

Result:Division Result isThe result has been verified. Precautions:-

1 Insert the programming in 8086 kit carefully. 2.Insert the data in RAM at the prescribed location.

Prepared by: -- SULEKHA SAXENA (AP)

DEPARTRMENT. OF ELECTRICAL & ELECTRONICS MICROPROCESSOR LAB EXPERIMENT NO. Partner, s Name 1 2 3

Name:

Experiment No: Performing Date:

Class Sr No: Checked On:

AIM: - To perform conversion of temperature from 0 F to 0C and vice verse.

INSTRUMENT REQUIRED:1. Training Kit 8086. 2. PC Key board.

Assembly language programming:Memory Location 0600 0602 0605 0607 0609 Assembly code MOV AL,65 MOV CL,20 SUB AL,CL MOV DL,5 MUL DL Prepared by: -- SULEKHA SAXENA (AP) Task ;Load the register AL with 65 ;Load the register CLwith 20 ;Subtract the content of CL with AL ;Load the register DL with 5 ;Multiply the content of AL with DL

060B

MOV BL,9

; Load the register BL with 9

060D 0611 0614

DIV BL MOV [0700],AL MOV SI,0700

; Divide the content of AL with BL ; Content of AL moved at the Memory location 0600 ; ; Initialize SI Reg. with the starting address of string (having data bytes). ; Halt

HLT

Result:0 C Result isThe result has been verified.

26

Precautions:1 Insert the programming in 8086 kit carefully. 2.Insert the data in RAM at the prescribed location.

Prepared by: -- SULEKHA SAXENA (AP)

DEPARTRMENT. OF ELECTRICAL & ELECTRONICS MICROPROCESSOR LAB EXPERIMENT NO. Partner, s Name 1 2 3

Name:

Experiment No: Performing Date:

Class Sr No: Checked On:

AIM: - To study 8085 based microprocessor system.

THEORYCPU MEMORY RAM ROM TIMER I/O KEYBOARD LCD DUSPLAY BUS INTERFACE

System specification : 8 bit microprocessor, the 8085. : Total on board capacity of 64K bytes. : 8/32 K bytes. : 16 K bytes of EPROM loaded with powerful monitor program. : 16 bit programmable timer/ counter using 8253. : 24 I/O line using 8255. : 32 Hexadecimal keys. : 161 liquid crystal display. : All data address and control signals (TTL compatible available
at edge connector) : RS -232c through SID/SOD lines with auto baud rate.

Prepared by: -- SULEKHA SAXENA (AP)

POWER SUPPLY OPERATING TEMP

: + 5V 400 mA : 0 to 500C

PIN DEFNITIO OF 8085:In fig. show pin configuration and functional pin diagram of 8285 respectively. The signals of 8085 can be classified Intec seven groups according their functions. 1) Power supply and frequency signals: (i) VCC : It requires a single +5 V power supply (ii) VSS : Ground reference. (iii) X1 and X2 : A turned ekt line LC,RC or crystal is connected at these two pine. The internal clock generator divides oscillator frequency by 2 there fore to cape rate a system at 3 MHz; the crystal of tuned ekt must have a frequency of 6 MHz. 2) Data Bus and address Bus: (i) AD0 to AD7: The 8 bit data bus (D0 - D7) is multiplexed with the lower half (A0 - A7) of the 16 bit address bus. During first part if the machine cycle (T1) lower 8 bit of memory address or I/O address on the bus. During remaining part if the machine cycle (T2 and T1) these line are used as a bi directional data bus A8 to A15 b : The upper half of the 16 bit address on the address line A8 to A15 these line are exclusively used for the most significant 8bit if the 16 nit address lines.

(ii)

3) Control and status signals: (i) ALE (Address hatch Enable) : We knew that AD0 to AD7 line are multiplexed and the lower half of address (A0 to A7) is available only during T1 of the machine cycle These lower half of address is also necessary during T2 and T3 of machine cycle to access specific location in memory or I/O port . This means that the lower half of an address must be latched in T1 of the machine cycle , So that it is available thorough the machine cycle the latching of lower half of an address bus is done by using external latching and ALF single from 8085 (ii) RD and WR: - These single are basically use to control the direction of the data flow b/w processor and memory or input device/part. A law on RD indicates that the data must be read from the selected memory location on I/O part via data bus. A law on WR indicates that the data must be written in to the selected memory location on I/O part via data bus. (iii) IO/M So and S1: IO/M indicated when there I/O operation or memory operation is being carried out. S1 and S0 indicate the type of machine cycle in progress. (iv) READY: It is used by the microprocessor the sense whether a peripheral is ready or not for data transfer, If not the processor waits, it is these used to synchronize slower peripherals to the micro processor. 4) Interrupt signals: (i) The 8085 has five hardware interrupt signals , RST5.5, RST6.5, RST 7.5 and INTR .The microprocessor recognizes interrupt requests an these lines at the and of the current instruction execution . Prepared by: -- SULEKHA SAXENA (AP)

(ii)

The INTA (interrupt Acknowledge) signal is used to indicate that the processor has acknowledged an INTR interrupt.

5) Serial I/O signals : (i) (ii) SIDC (serial I/O Data) : This input signal is used to accept serial data bit by bit from the external device SOD (serial data O/P Data): This is an O/P signal which enables the transmission of serial data bit by bit to the external device.

6) DMA Signal: (i) HOLD: This signal indicates that another master is requesting for the use of address bus, data bus and control service. (ii) HLDA : This active high signal is used to acknowledge HOLD request. 7) Reset Signals: (i) RESET IN : A low on this pin (a) sets the program counter to zero (ooooH) (b) Reset the interrupt enable and HLDA flip flops . (c) Tri states the data bus address bus and control bus. (d) Affects the contents of processors internal registers randomly On reset, the PC stets to ooooH which causes the 8085 to9 excaite the first instruction from address ooooH. For proper reset operation reset signal must BC held low for at least 3clock cycles.The power on reset circuit can be used to ensure execution of first instruction from address ooooH. (ii) RESET OUT: This active high signal indicates tat processor is being reset. This signal is synchronized to the processor clock and it can be used to reset other devices connected in the system

Prepared by: -- SULEKHA SAXENA (AP)