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+
=
(7)
From equations (5) & (6)
L
V
R
R
R
R
L
V
R
R
R
R
L
I
dt
dI
G
LOAD
ESR
LOAD
ESR C
LOAD
ESR
ESR
L
L L
+
+
+ +
+
+ = )
) 1 (
1 ( )
1
(
From above equation (7)
G
C
L
LOAD
ESR
LOAD
LOAD
ESR
LOAD
ESR
LOAD
ESR
LOAD
ESR
ESR
L
C
L
V
L
V
I
R
R
C R
R
R
C
R
R
R
R
L
R
R
R
R
L
dt
dV
dt
dI
(
(
(
(
(
(
+
(
(
(
(
(
(
(
(
(
+
+
+
+
+
=
(
(
(
(
(
0
1
) 1 (
1
) 1 (
1
)
) 1 (
1 (
1
)
1
(
1
state equation for this phase is given below:
G
LOAD
ESR
LOAD
LOAD
ESR
LOAD
ESR
LOAD
ESR
LOAD
ESR
ESR
L
V
L
X
X
R
R
C R
R
R
C
R
R
R
R
L
R
R
R
R
L
X
X
(
(
(
(
(
(
+
(
(
(
(
(
(
(
(
(
(
(
(
+
+
+
+
+
=
(
(
(
(
-
-
0
1
) 1 (
1
) 1 (
1
)
) 1 (
1 (
1
)
1
(
1
2
1
2
1
From Fig.3:
dt
dV
C R V V
C
ESR C OUT
+ =
(8)
From equation (7) & (8)
)
1
( )
) 1 (
1 (
LOAD
ESR
ESR
L
LOAD
ESR
LOAD
ESR
C OUT
R
R
R
I
R
R
R
R
V V
+
+
+
=
(9)
(
(
(
(
(
(
(
(
+
=
C
L
LOAD
ESR
LOAD
ESR
LOAD
ESR
ESR
OUT
V
I
R
R
R
R
R
R
R
V
) 1 (
1
1
U
X
X
R
R
R
R
R
R
R
Y
LOAD
ESR
LOAD
ESR
LOAD
ESR
ESR
(
(
(
(
+
(
(
(
(
(
(
(
(
(
+
=
0
0
) 1 (
1
1
2
1
a. During OFF State
G
V
i
n
C
i
n
R
L
R
L
E
S
R
R
C
L
O
A
D
R
L
I
C
V
Fig.4 Off-State Circuit Diagram of Synchronous Buck Converter
From Fig. 4:
LOAD
OUT C
L
R
V
dt
dV
C I + =
(10)
dt
dV
C R V
dt
dI
L R I
C
ESR C
L
L L
+ = +
(11)
dt
dV
C R V V
C
ESR C OUT
+ =
(12)
From equations (10) &(12)
) 1 ( ) 1 (
LOAD
ESR
LOAD
C
LOAD
ESR
L C
R
R
CR
V
R
R
C
I
dt
dV
+
+
=
(13)
From equations (11) & (13)
) 14 )(
) 1 (
1 ( )
1
(
LOAD
ESR
LOAD
ESR C
L
LOAD
ESR
ESR L L
R
R
R
R
L
V
R
R
R
R
L
I
dt
dI
+
+ + +
+
=
From above equations (13) & (14)
G
C
L
LOAD
ESR
LOAD
LOAD
ESR
LOAD
ESR
LOAD
ESR
LOAD
ESR
ESR
L
C
L
V
L
V
I
R
R
C R
R
R
C
R
R
R
R
L
R
R
R
R
L
dt
dV
dt
dI
(
(
(
(
(
(
+
(
(
(
(
(
(
(
(
(
(
(
+
+
+
+
+
=
(
(
(
(
(
0
1
) 1 (
1
) 1 (
1
)
) 1 (
1 (
1
)
1
(
1
State equation for this phase is given below:
G
LOAD
ESR
LOAD
LOAD
ESR
LOAD
ESR
LOAD
ESR
LOAD
ESR
ESR
L
V
L
X
X
R
R
C R
R
R
C
R
R
R
R
L
R
R
R
R
L
X
X
(
(
(
(
(
(
+
(
(
(
(
(
(
(
(
(
(
(
(
+
+
+
+
+
=
(
(
(
(
-
-
0
1
) 1 (
1
) 1 (
1
)
) 1 (
1 (
1
)
1
(
1
2
1
2
1
From Fig.4:
dt
dV
C R V V
C
ESR C OUT
+ =
From equations (12) & (13)
)
1
( )
) 1 (
1 (
LOAD
ESR
ESR
L
LOAD
ESR
LOAD
ESR
C OUT
R
R
R
I
R
R
R
R
V V
+
+
+
=
(15)
U
X
X
R
R
R
R
R
R
R
Y
LOAD
ESR
LOAD
ESR
LOAD
ESR
ESR
(
(
(
(
+
(
(
(
(
(
(
(
(
(
+
=
0
0
) 1 (
1
1
2
1
Thus with the help of state space equations,values of
matrice A
1
,B
1
,C
1,
D
1
parameters of ON-State and A
2
,B
2
,C
2
, D
2
parameters of OFF-State are extracted and A,B,C,D
parameters can be obtained as follows:
A=A
1
*d+A
2
*(1-d);
Where, d is duty ratio.
Similarly B,C and D parameters are also obtained.Thus
statespace average model for buckconverter is constructed.
IV. CLOSED LOOP CONTROL ALGORITHM
The performance of closed loop converter is highly
influenced by PI control parameters. Auto tuning controller
improves dynamic response efficiency and reliability. The
main idea of auto-tuning is presented as: first system
identification is executed and then control parameters are tuned
[7].Various methods are introduced to adjust the controller
terms. In this paper, mathematical modeling of buck converter
using State space averaging technique is implemented for
this purpose. From the above obtained A, B, C and D matrices,
we can obtain the K
P
and K
I
values of the PI Controller by
State space modeling of synchronous buck converter using
MATLAB commands sys=ss(A,B,C,D) and sisotool (sys).
Then by the result windows obtained by sisotool we select the
automated PID tuning option to obtain the K
P
and K
I
values,
and which includes the frequency response of closed loop
system. SISO design tool automatically designs interactive
compensator design.
The complete closed loop control structure of synchronous
buck converter is illustrated in Fig.5 and the load voltage is
compared with reference value, error voltage is generated. The
resultant error is fed to PI controller. PI Controller attempts to
correct the error between voltage variable measured and a
desired voltage (reference) value by calculating and then
outputting a corrective action that can adjust the process
accordingly. As we know PI controller involves two separate
variables: the Proportional and the Integral values. Where the
proportional value determines the reaction to voltage error, and
the Integral determines the reaction based on the sum of recent
errors. The integral term added to the proportional term
accelerates the movement of process towards reference voltage
and eliminates the residual steady-state error that occurs with a
P controller. The amplified error voltage so obtained is passed
through Hysteresis control limiter which limits the value
obtained by PID controller to certain value. By using pulse-
width modulation (PWM) control regulation of output voltage
is achieved by varying the duty cycle of the switches
synchronously.
G
V
i
n
C
i
n
R
L
R
L
E
S
R
R
C
L
O
A
D
R
Fig.5.Schematic of closed loop control algorithm of \\Synchronous Buck
Converter
Further, the frequency response of PI controller is plotted
using Bode plot which is given in Fig.6. From Fig.6 we could
observe that, the Gain Margin=15.9 db. With gain crossover
frequency=7.62x10
3
rad.sec
-1
, and Phase Margin =88.8deg.
With phase crossover frequency=582 rad.sec
-1
. Since phase
crossover frequency is very less than gain crossover frequency,
the controller reveals that, the system is highly stable.
Frequency (rad/s)
10
1
10
2
10
3
10
4
10
5
10
6
-270
-225
-180
-135
-90
-45
0
P
h
a
s
e
(
d
e
g
)
-150
-100
-50
0
M
a
g
n
i
t
u
d
e
(
d
B
)
Fig.6.Bode plot for PI controller
V. SIMULATION RESULTS AND DISCUSSION
In order to verify the proposed study of small scale PV
system of 6 W (12 V & 500 mA) with dc-dc synchronous buck
converter, the complete module is modeled and tested in
MATLAB/Simulink environment. The performance of
synchronous buck converter is analyzed under different
operating conditions and the corresponding results are
presented here.
a. During Steady State Conditions
Fig.7 depicts the steady state response of Synchronous
Buck Converter for constant load. From Fig.7 (a), one can be
see that, the output voltage of the converter settles in less than
6ms with the aid of above designed PI controller. The
corresponding output voltage and current ripple are shown in
Fig.7 (b) and Fig.7(c) respectively and the voltage and current
ripple of output voltage which is maintained very low with the
help of the designed output capacitor which limits the output
voltage and current ripple. Voltage stress across MOSFET
M1 & MOSFET M2are illustrated Fig.7 (d) and Fig.7 (e)
with limited values according to desired value. Fig.7 (f) shows
the response of input voltage from PV system which maintains
constant at 12V.
0 100 80 60 40 20
0
3
V
o
u
t
45.8 45.8 45.7 45.8 45.8
3
V
o
u
t
R
i
p
p
l
e
45.8 45.8 45.8 45.8 45.7
1
I
o
u
t
R
i
p
p
l
e
45.8 45.8 45.8 45.8 45.7
0
5
10
V
m
1
45.8 45.8 45.8 45.8 45.7
0
5
10
V
m
2
0 100 80 60 40 20
0
12
Time(ms)
V
i
n
Fig.7. Steady state response of synchronous buck converter (a) output voltage
(b) output voltage ripple (c)output current ripple (d) voltage stress across
MOSFET M1 (e) voltage stress across MOSFET M2 (f) input voltage
b. During Step Changes in the Load
Fig.8 depicts the dynamic response of Synchronous Buck
Converter during step changes in the load. From Fig.2.2 (a), we
could observe that, the output voltage settles less than 6ms and
maintained constant irrespective of the load variation from 1A
to 1.5A as illustrated in Fig.8(d) During load variations, the
transients in output voltage persist and it settles within 5ms
from the evidence of Fig.8.(b). Voltage stress across MOSFET
M1 & MOSFET M2are illustrated Fig.7 (d) and Fig.7 (e)
with limited values according to desired value. Fig.7 (f) shows
the response of input voltage from PV system which maintains
constant at 12V.
0 50 100 150 200 250 300
0
3
V
o
u
t
99.5 100.3 101 101.7 102.4 103.1 103.8 104.6 105.3 106
2.95
3
3.05
V
o
u
t
S
e
t
t
l
e
99.5 99.5 99.6 99.6 99.7 99.7 99.8 99.8
1
I
o
u
t
R
i
p
p
l
e
0 50 100 150 200 250 300
0.5
1
1.5
I
o
u
t
99.5 99.5 99.6 99.6 99.7 99.7 99.8 99.8
0
5
10
V
m
1
99.5 99.5 99.6 99.6 99.7 99.7 99.8 99.8
0
5
10
Time(ms)
V
m
2
99.5 99.5 99.6 99.6 99.7 99.7 99.8 99.8
3
V
o
u
t
R
i
p
p
l
e
Fig. 8. Response of synchronous buck converter during step changes in the
load. (a) Response of Output voltage (b) Settling of output voltage after
change in load current. (c) output voltage ripple (d)output current ripple (e)
Load Current (f) voltage stress across MOSFET M1 (g) voltage stress across
MOSFET M2 .
c. During Variation of Solar irradiation and
Temperature (Source Variation)
As illustrated in Fig.9, the source variation is considered
as PV is cell possessing highly non-linear characteristics
between Ipv and V
pv
due to variation of
insolation and
temperature. For more realistic study, solar irradiation and
temperature is measured at NIT, Rourkela campus from 12
P.M to 3 P.M and are shown in Fig.9.(d) and Fig.9.(e)
respectively. Due to variation on these parameters, V
pv
is also
getting varied and is depicted in Fig.9 (e). During this source
variation, the controller can able to improve the dynamic
response and it maintains the output voltage constant at 3 V
and is shown in Fig.9 (a). Fig.9(b) & Fig.9(c) depicts that the
output voltage ripple and output current ripple are limited to
very less values by the help of high output capacitance.
0.65 0.65 0.65 0.65 0.65 0.65 0.65 0.65 0.65
1
I
o
u
t
R
i
p
p
l
e
0 0.5 1 1.5 2 2.5 3
10
15
20
I
r
r
a
d
i
a
n
c
e
(
W
/
m
2
)
0 0.5 1 1.5 2 2.5 3
20
40
50
T
e
m
p
(
C
)
0 0.5 1 1.5 2 2.5 3
8
9
10
11
12
Time(Sec.)
V
i
n
0 0.5 1 1.5 2 2.5 3
0
3
5
V
o
u
t
0.65 0.65 0.65 0.65 0.65 0.65 0.65 0.65 0.65
2.9998
3
3.0002
V
o
u
t
R
i
p
p
l
e
.Fig. 9.Dynamics of Synchronous Buck Converter (a) ouput voltage (b) output
voltage ripple (c)output current ripple (d)Solar Irradiation (f) Temperature
(g)output voltage of PV-Array i.e. input to Synchronous Buck Converter.
d. Converter Design and Its Efficiency Calculation
The following interpretations are made for capacitor and
inductor calculation.
a) Inductance Calculation
For an inductor, V=L*I/T
Rearrange and substitute:
L = (V
in
V
out
)*(D / F
sw
)/I
ripple
b) Output Capacitor Calculation
For a capacitor, V=I*(R
ESR
+T/C + R
L
/T)
Assume ripple voltage of 50 mV
Then, C
out
= (I*T)/ (V-(I*R
ESR
))
The above obtained value of C
out
is minimum value of output
capacitance. To have the least amount of output ripple,
capacitance can be increased to the desired value.
c) Input Capacitor
Input ripple current is assumed to be I
load
/2
Acceptable input ripple voltage is 200 mV
Compute capacitance; C= T / ((V
ripple
/ I
ripple
)- R
ESR
)
For better performance Input Capacitor value should be
increased to a desired value.
d) Synchronous Buck Converter Efficiency
Output Power= 3 watts (3 V & 1 A)
Inductor Loss=50mW
{(I
load
) 2 * R
ESR
}
Output capacitor loss= 4.5 mW
{(I
ripple
) 2* R
ESR
}
Input capacitor loss= 30 mW
{(I
ripple
) 2* R
ESR
}
Main MOSFET loss=105.52 mW
{[Conduction loss=(I
d
)
2
*R
ds(on)
*D]+[Switching loss=
(( V
dif
*I
d
/2)*(T
on
+ T
off
)*F
sw
+C
oss
*V
dif
2
*F
sw
)]}
Synchronous MOSFET loss (Without Schottky Diode) =
107.72 mW
{[Conduction loss=(I
d
)
2
*R
ds(on)
*D]+[Switching loss=
(( V
dif
*I
d
/2)*(T
on
+ T
off
)*F
sw
+C
oss
*V
dif
2
*F
sw
)]}
Synchronous MOSFET loss(With Schottky Diode)=3.3 mW
{{[Conduction loss=(I
d
)
2
*R
ds(on)
*D]}
Total Loss (Without Schottky Diode) = 297.74 mW
Converter efficiency (Without Schottky Diode)= 90.97 %
{(P
out
/(P
out
+ Total losses))*100}
Total Loss (With Schottky Diode) = 193.32 mW
Converter efficiency (With Schottky Diode) = 93.95 %
{(P
out
/(P
out
+ Total losses))*100}
NOTE:
MOSFET M2 is clamped by a Schottky rectifier; it
prevents the MOSFETs intrinsic body diode from conducting
which prevents the body diode from developing a stored
charge. The body diode in a MOSFET is a slow rectifier and
would add significant losses if it were allowed to switch.
Because the MOSFET rectifier (synchronous rectifier)
switches with less than a volt across itself, the switching losses
are almost zero. The MOSFET conduction losses are very low
compared to the Schottky rectifier's forward voltage drop. Thus
switching losses are reduced and efficiency is increased
eventually. From the Fig.10, one can observe that, the
efficiency of synchronous buck converter is more than that of
conventional buck converter for same output power rating.
1 2 3 4 5 6 7 8 9 10
65
70
75
80
85
90
95
100
e
f
f
i
c
i
e
n
c
y
(
i
n
%
a
g
e
)
output power(in watts)
synchronous buck converter with schottky diode
synchronous buck converter without schottky diode
buck converter
Fig.10. Converters Efficiency comparison
VI. CONCLUSIONS
In this paper, an accurate mathematical modeling and
design of synchronous buck converter for low power PV
energy system is presented. The ultimate aim of this paper is to
use State Space Averaging technique for modeling of converter
which decides precise
I P
K K , values for PI controller.
Synchronous buck converter with closed loop PI controller
indeed to improve the dynamic response of the converter
during load as well as source variation with reduced voltage
and current ripple. Moreover, the circuit structure is simpler
and much cheaper compared to other control mechanisms
where large number of components is needed. Further, the
converter design and its efficiency also determined and we
could find the efficiency of synchronous buck converter is
higher than conventional dc-dc buck converter for same power
rating.
REFERENCES
[1] J.P. Benner and L. Kazmerski, Photovoltaic gaining greater visibility,
IEEE Spectrum., vol. 29, no. 9, pp. 3442, Sep. 1999.
[2] B.Chitti Babu, S.R.Samantaray and Ashwin Kumar, Design and
Implementation of Low Power Smart PV Energy System for Portable
Applications Using Synchronous Buck Converter, Journal of Low
Power Electronics (JOLPE), American Scientific publishers, Vol. 08,
no.03, Jun. 2012, In Press
[3] Subhash Chander, Promod Agarwal and Indra Gupta, Design, Modeling
and Simulation of DC-DC Proc. of IEEE 2010 International
Conference on Sustainable Energy Technologies (ICSET), Dec. 2010
[4] J.P.Lee, B.D. Min, T.J. Kim, D.W.Yoo, and J.Y.Yoo,Design and
Control of Novel Topology for Photo-Voltaic DC/DC Converter with
High Efficiency under Wide Load Ranges. Journal of Power
Electronics., vol.9. no.2, pp.300-307, Mar, 2009
[5] Tseng, Ching-Jung and Chen, Chern-Lin, Novel ZVT-PWM
Converters with Active Snubbers.IEEE Transactions On Power
Electronics, Vol. 13, No. 5, September 1998. Pp. 861 869.
[6] H. Altas, A. M. Sharaf, A photovoltaic array simulation model for
MATLAB-Simulink GUI Environment,Proc. Of International
Conference on Clean Electrical Power, ICCEP07, May 21-23, 2007,
Capri, Italy.
[7] S.M.Cuk, Analysis and control of synchronous buck converter, M.S,
Thesis, 2009, Baskent University.Turkey.