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PROJECT REPORT ON AUTOMATED TEST EQUIPMENT (TESTING A PCB)

INTRODUCTION
Automated test equipment (ATE) is computer controlled test and measurement equipment, arranged in such a way as to be able to test a unit with minimal human interaction. The advantage of this kind of test is that they are repeatable and cost efficient in high volume. The chief disadvantages are the upfront costs; programming and setup. Automated test equipment can test components, printed circuit boards, and interconnections and verifications. Test types for components include logic, memory, linear or mixed signal, passive components and active components. Logic test systems are designed for handling the testing of microprocessors, gate arrays, ASICs and other logic devices. Memory testers are automated test equipment for the testing of SDRAM, DDR-SDRAM SIMMs and DIMMs. Linear or mixed signal equipment is used for the testing of components such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), comparators, track-and-hold amplifiers and video products. These components incorporate features such as, audio interfaces, signal processing functions and high-speed transceivers. Passive component ATEs test passive components including capacitors, resistors, inductors etc. Typically testing is done by the application of a test current. Discrete automated test equipment tests active components including transistors, diodes, MOSFETs, Regulators, Triacs, Zeners, SCRs, and JFETs. Printed circuit board testers include manufacturing defect analyzers, in-circuit testers, and functional analyzers. Manufacturing defect analyzers (MDAs) detect manufacturing defects, such as shorts and missing components, but they can't test digital ICs as they test with the UUT (unit under test) powered down (cold). As a result, they assume the ICs are good. MDAs are also referred to as analog circuit testers. In-circuit analyzers test components that are part of a board assembly. The components under test are "in a circuit." The UUT is powered up (hot). They are also referred to as digital circuit testers. A functional test simulates an operating environment and tests a board against its functional specification. They may also be referred to as emulators.

Test types for interconnection and verification include cable and harness testers and bare-board testers. Cable and harness testers are used to detect opens (missing connections), shorts (open connections) and miswires (wrong pins) on cable harnesses, distribution panels, wiring looms, flexible circuits and membrane switch panels with commonly used connector configurations. Other tests performed by automated test equipment include resistance and hipot tests. Bare board automated test equipment is used to detect the completeness of a PCB circuit before assembly and wave solder. Configurations for automated test equipment include bed-of-nails (BON), flying probe, and optical. In a bed-of-nails configuration each circuit net on the board is connected to the tester, typically with one nail per net. BONs typically require a vacuum or air source. The flying probe system uses a low number of moving probes rather than the high number of fixed probes in the BON. Test times may be slower due to probe movements, but the method has compensating benefits. In practice, a flying probe can provide close to 100% test coverage on a board with thousands of nets of passive components and hundreds of digital devices. Optical inspection methods include scanning probe microscopes to reveal surface defects. Optical inspections do not need test fixtures and requires no electrical sources or measurements. Common features for automated test equipment include boundary-scan capabilities, temperature control, and support of STDF, Standard Test Data Format.

HISTORY OF PCB
The history of printed circuit board, wiring board and PCB all describe a device that provides electrical interconnections and a surface for mounting electronic components. Although wiring board" is more technically correct, the term "printed circuit board" (PCB) is most commonly used. The printed circuit board history begins with the first patents describing the "printed wire" were issued in 1903, PCBs as we know them came into use after World War II. Dr. Paul Eisler, an

Austrian scientist working in England, is generally credited in history with making the first PCB. The concept was to replace radio tube wiring with something less bulky. In the 1950s and '60s, the history of PCBs evolved to circuitry on one side (single-sided) were the dominant variety. Still in use today, single sided boards are the simplest variety of PCB. PCB's history in the '60s and early '70s, lead to processes that were developed for plating copper on the walls of the drilled holes in circuit boards, permitting top and bottom circuitry to be electrically interconnected. These double-sided boards became the industry standard. Used today in consumer products and computer peripheral equipment, double-sided boards are slightly more expensive than single-sided boards. As the densities and complexities of electronic components increased, the multi layer circuit board a process of sandwiching several circuitry layers together was developed. By the mid 1980s, the history changed to multi layers accounting for the majority of Printed Circuit Boards produced in the U.S. Today's computers, aerospace equipment, and instrumentation and telecommunications gear all contain multi-layer boards. The history of the printed wiring board or now referred to as the printed circuit board has evolved over time to become the leading method of electronics in just about everything we use and buy.

PCB MANUFACTURING PROCESS


The PCB manufacturing process is very important for anyone involved in the electronics industry. Printed circuit boards, PCBs, are very widely used as the basis for electronic circuits. Printed circuit boards are used to provide the mechanical basis on which the circuit can be built. Accordingly virtually all circuits use printed circuit boards and they are designed and used in quantities of millions.

Although PCBs form the basis of virtually all electronic circuits today, they tend to be taken for granted. Nevertheless technology in this area of electronics is moving forward. Track sizes are decreasing, the numbers of layers in the boards is increasing to accommodate for the increased connectivity required, and the design rules are being improved to ensure that smaller SMT devices can be handled and the soldering processes used in production can be accommodated. The PCB manufacturing process can be achieved in a variety of ways and there are a number of variants. Despite the many small variations, the main stages in the PCB manufacturing process are the same.

Materials
Conducting layers are typically made of thin copper foil. Insulating layers dielectric are typically laminated together with epoxy resin prepreg. The board is typically coated with a solder mask that is green in color. Other colors that are normally available are blue and red. There are quite a few different dielectrics that can be chosen to provide different insulating values depending on the requirements of the circuit. Some of these dielectrics are polytetrafluoroethylene (Teflon), FR-4, FR-1, CEM-1 or CEM-3. Well known prepreg materials used in the PCB industry are FR2 (Phenolic cotton paper), FR-3 (Cotton paper and epoxy), FR-4 (Woven glass and epoxy), FR-5 (Woven glass and epoxy), FR-6 (Matte glass and polyester), G-10 (Woven glass and epoxy), CEM-1 (Cotton paper and epoxy), CEM-2 (Cotton paper and epoxy), CEM-3 (Woven glass and epoxy), CEM-4 (Woven glass and epoxy), CEM-5 (Woven glass and polyester). Thermal expansion is an important consideration especially with BGA and naked die technologies, and glass fiber offers the best dimensional stability.

A PCB as a design on a computer (left) and realized as a board assembly with populated components (right). The board is double sided, with through-hole plating, green solder resist, and white silkscreen printing. Both surface mount and through-hole components have been used.

Typical density of a raw PCB (an average amount of traces, holes, and vias, with no components) is 2.15g / cm3.

Patterning (etching)
The vast majority of printed circuit boards are made by bonding a layer of copper over the entire substrate, sometimes on both sides, (creating a "blank PCB") then removing unwanted copper after applying a temporary mask (e.g. by etching), leaving only the desired copper traces. A few PCBs are made by adding traces to the bare substrate (or a substrate with a very thin layer of copper) usually by a complex process of multiple electroplating steps. There are three common "subtractive" methods (methods that remove copper) used for the production of printed circuit boards:
1. Silk screen printing uses etch-resistant inks to protect the copper foil. Subsequent etching removes the unwanted copper. Alternatively, the ink may be conductive, printed on a blank (nonconductive) board. The latter technique is also used in the manufacture of hybrid circuits. 2. Photoengraving uses a photomask and chemical etching to remove the copper foil from the substrate. The photomask is usually prepared with a photoplotter from data produced by a technician using CAM, or computer-aided manufacturing software. Laser-printed transparencies are typically employed for phototools; however, direct laser imaging techniques are being employed to replace phototools for high-resolution requirements. 3. PCB milling uses a two or three-axis mechanical milling system to mill away the copper foil from the substrate. A PCB milling machine (referred to as a 'PCB Prototyper') operates in a

similar way to a plotter, receiving commands from the host software that control the position of the milling head in the x, y, and (if relevant) z axis. Data to drive the Prototyper is extracted from files generated in PCB design software and stored in HPGL or Gerber file format.

"Additive" processes also exist. The most common is the "semi-additive" process. In this version, the unpatterned board has a thin layer of copper already on it. A reverse mask is then applied. (Unlike a subtractive process mask, this mask exposes those parts of the substrate that will eventually become the traces.) Additional copper is then plated onto the board in the unmasked areas; copper may be plated to any desired weight. Tin-lead or other surface platings are then applied. The mask is stripped away and a brief etching step removes the now-exposed original copper laminate from the board, isolating the individual traces. Some boards with plated thru holes but still single sided were made with a process like this. General Electric made consumer radio sets in the late 1960s using boards like these. The additive process is commonly used for multi-layer boards as it facilitates the plating-through of the holes (to produce conductive vias) in the circuit board.

PCB copper electroplating machine for adding copper to the in-process PCB

PCB's in process of adding copper via electroplating

The dimensions of the copper conductors of the printed circuit board is related to the amount of current the conductor must carry. Each trace consists of a flat, narrow part of the copper foil that remains after

etching. Signal traces are usually narrower than power or ground traces because their current carrying requirements are usually much less. In a multi-layer board one entire layer may be mostly solid copper to act as a ground plane for shielding and power return. For printed circuit boards that contain microwave circuits, transmission lines can be laid out in the form of stripline and microstrip with carefully-controlled dimensions to assure a consistent impedance. In radio-frequency circuits the inductance and capacitance of the printed circuit board conductors can be used as a delibrate part of the circuit design, obviating the need for additional discrete components.

Imaging
One of the most important steps in fabricating printed circuit boards is the imaging process. The imaging process takes the circuitry pattern from the design and transfers it to the physical board, creating a mask to allow copper plating to fill in the areas that will become the actual circuitry pattern on the board. This step is critical in the manufacturing process as the imaging of the pattern is often very intricate and small and requires an exact image of the pattern in order to work properly. In imaging process the circuitry pattern is transferred to the blank circuit board panel covered with a resist except where the copper will ultimately remain on the base material. The fundamental principle of resist is to protect selected areas from electrolytic copper plating. Dry-Film Resist, Dry film resist is an ultraviolet light sensitive photopolymer (photoresist). It is supplied on a roll and applied by processing the panel through heated rollers (hot roll laminator). After the hot roll lamination, the panel is placed in a UV printer frame, and a phototool is positioned to the panel using tooling pins as locators. The emulsion on the phototool forms the circuitry pattern plus any auxiliary features added during the panelization. This emulsion blocks the UV light so that the UV light only passes through the clear portions of the phototool to activate the light sensitive resist. This step in the imaging process is called exposure. The areas of the dry film exposed to the UV light undergo a chemical reaction called photopolymerization. These areas then become impervious to chemical solutions in the next step of the imaging process, developing.

The panel is placed in a conveyorized developing machine which sprays a developer solution made of water and sodium carbonate monohydroxide on the panel to remove the unexposed resist. An image of the desired circuitry open to the base copper is formed completing the imaging process.

Lamination
Some PCBs have trace layers inside the PCB and are called multi-layer PCBs. These are formed by bonding together separately etched thin boards.

Drilling
Holes through a PCB are typically drilled with tiny drill bits made of solid tungsten carbide. The drilling is performed by automated drilling machines with placement controlled by a drill tape or drill file. These computer-generated files are also called numerically controlled drill (NCD) files or "Excellon files". The drill file describes the location and size of each drilled hole. These holes are often filled with annular rings (hollow rivets) to create vias. Vias allow the electrical and thermal connection of conductors on opposite sides of the PCB. Most common laminate is epoxy filled fiberglass. Drill bit wear is in part due to the fact that glass, being harder than steel on the Mohs scale, can scratch steel. High drill speed necessary for cost effective drilling of hundreds of holes per board causes very high temperatures at the drill bit tip, and high temperatures (400-700 degrees) soften steel and decompose (oxidize) laminate filler. Copper is softer than epoxy and interior conductors may suffer damage during drilling. When very small vias are required, drilling with mechanical bits is costly because of high rates of wear and breakage. In this case, the vias may be evaporated by lasers. Laser-drilled vias typically have an inferior surface finish inside the hole. These holes are called micro vias. It is also possible with controlled-depth drilling, laser drilling, or by pre-drilling the individual sheets of the PCB before lamination, to produce holes that connect only some of the copper layers, rather than passing through the entire board. These holes are called blind vias when they

connect an internal copper layer to an outer layer, or buried vias when they connect two or more internal copper layers and no outer layers. The walls of the holes, for boards with 2 or more layers, are made conductive then plated with copper to form plated-through holes that electrically connect the conducting layers of the PCB. For multilayer boards, those with 4 layers or more, drilling typically produces a smear of the high temperature decomposition products of bonding agent in the laminate system. Before the holes can be plated through, this smear must be removed by a chemical de-smear process, or by plasma-etch. Removing (etching back) the smear also reveals the interior conductors as well.

Exposed conductor plating and coating


PCBs are plated with solder, tin, or gold over nickel as a resist for etching away the unneeded underlying copper. Matte solder is usually fused to provide a better bonding surface or stripped to bare copper. Treatments, such as benzimidazolethiol, prevent surface oxidation of bare copper. The places to which components will be mounted are typically plated, because untreated bare copper oxidizes quickly, and therefore is not readily solderable. Traditionally, any exposed copper was coated with solder by hot air solder levelling (HASL). This solder was a tin-lead alloy, however new solder compounds are now used to achieve compliance with the RoHS directive in the EU and US, which restricts the use of lead. One of these lead-free compounds is SN100CL, made up of 99.3% tin, 0.7% copper, 0.05% nickel, and a nominal of 60ppm germanium. It is important to use solder compatible with both the PCB and the parts used. An example is Ball Grid Array (BGA) using tin-lead solder balls for connections losing their balls on bare copper traces or using lead-free solder paste. Other platings used are OSP (organic surface protectant), immersion silver (IAg), immersion tin, electroless nickel with immersion gold coating (ENIG), and direct gold (over nickel). Edge connectors, placed along one edge of some boards, are often nickel plated then gold plated. Another coating consideration is rapid diffusion of coating metal into Tin solder. Tin forms intermetallics such as Cu5Sn6 and Ag3Cu that dissolve into the Tin liquidus or solidus(@50C), stripping surface coating and/or leaving voids.

Electrochemical migration (ECM) is the growth of conductive metal filaments on or in a printed circuit board (PCB) under the influence of a DC voltage bias. Silver, zinc, and aluminum are known to grow whiskers under the influence of an electric field. Silver also grows conducting surface paths in the presence of halide and other ions, making it a poor choice for electronics use. Tin will grow "whiskers" due to tension in the plated surface. Tin-Lead or Solder plating also grows whiskers, only reduced by the percentage Tin replaced. Reflow to melt solder or tin plate to relieve surface stress lowers whisker incidence. Another coating issue is tin pest, the transformation of tin to a powdery allotrope at low temperature.

Solder resist
Areas that should not be soldered may be covered with a polymer solder resist (solder mask) coating. The solder resist prevents solder from bridging between conductors and creating short circuits. Solder resist also provides some protection from the environment. Solder resist is typically 20-30 microns thick.

Screen printing
Line art and text may be printed onto the outer surfaces of a PCB by screen printing. When space permits, the screen print text can indicate component designators, switch setting requirements, test points, and other features helpful in assembling, testing, and servicing the circuit board. Screen print is also known as the silk screen, or, in one sided PCBs, the red print. Lately some digital printing solutions have been developed to substitute the traditional screen printing process. This technology allows printing variable data onto the PCB, including serialization and barcode information for traceability purposes. The PCB manufacturing process is an essential element of the electronics production lifecycle. PCB manufacturing employs many new areas of technology and this has enabled significant improvements to be made both in the reduction of sizes of components and tracks used, and in the reliability of the boards.

Testing
Unpopulated circuit boards are subjected to a bare board test where each circuit connection (as defined in a netlist) is verified as correct on the finished circuit board. In high volume circuit board production, a bed of nails tester or fixture is used to make contact with the copper lands or holes on one or both sides of the board to facilitate testing. Computers are used to control the electrical testing unit to send a small current through each contact point on the bed of nails and verify that such current can be detected on the appropriate contact points. For small to medium volume production runs, a flying probe tester is used to check electrical contacts. These flying probes employ moving heads to make contact with the copper lands and holes to validate the electrical connectivity of the board being tested. Key factors which can adversely affect the cost of testing: Increased complexity of devices. Increased trend to SMT. conformal coating on devices. These key factors result in:
reduced

pin spacing on loaded PCBs. device pins.

inaccessible increased test

device density.

interface costs increase and technical difficulties in interfacing.

lack of diagnostic access.

COMPONENTS OF ATE
The Semiconductor ATE architecture consists of master controller (usually a computer) that synchronizes one or more source and capture instruments (listed below). Historically, customdesigned controllers or relays were used by ATE systems. The Unit Under Test (UUT) is physically connected to the ATE by another robotic machine called a Handler or Prober and

through a customized Interface Test Adapter (ITA) or "fixture" that adapts the ATE's resources to the UUT. Most modern semiconductor ATEs include multiple Digital Signal Processing (DSP) instruments used to measure a wide range of parameters, including: Digital Power Supply (DPS), Parametric Measurement Units (PMU), Arbitrary Waveform Generators (AWG), Digitizers, Digital IOs, and utility supplies. Each of these instruments perform different measurements on the UUT. All of these instruments must be synchronized so the source and capture waveforms very precisely aligned a basic requirement in DSP-based ATE. The DSP-based signal generation would require a number of sample patterns to be calculated and be sent a very specific times. ATE automatic test equipment is a vital part of the electronics test scene today. Automatic test equipment enables printed circuit board test, and equipment test to be undertaken very swiftly far faster than if it were done manually. As time of production staff forms a major element of the overall production cost of an item of electronics equipment, it is necessary to reduce the production times as possible. This can be achieved with the use of ATE, automatic test equipment. Automatic test equipment can be expensive, and therefore it is necessary to ensure that the correct philosophy and the correct type or types automatic test equipment are used. Only by applying the use of automatic test equipment correctly can the maximum benefits be gained. There is a variety of different approaches that can be used for automatic test equipment. Each type has its own advantages and disadvantages, and can be used to great effect in certain circumstances. When choosing ATE systems it is necessary to understand the different types of systems and to be able to apply them correctly.

Types of ATE automatic test systems


There is a good variety of types of ATE systems that can be used. As they approach electronics test in slightly different ways they are normally suited to different stages in the production test

cycle. The most widely used forms of ATE, automatic test equipment used today are listed below:

Automatic optical inspection, AOI: AOI, Automatic Optical Inspection is widely used in
many manufacturing environments. It is essentially a form of inspection, but achieved automatically. This provides a much greater degree of repeatability and speed when compared to manual inspection. AOI, automatic optical inspection it is particularly useful when situated at the end of a line producing soldered boards. Here it can quickly locate production problems including solder defects as well as whether the correct components and fitted and also whether their orientation is correct. As AOI systems are generally located immediately after the PCB solder process, any solder process problems can be resolved quickly and before too many printed circuit boards are affected.

AOI automatic optical inspection takes time to set up and for the test equipment to learn the board. Once set it can process boards very quickly and easily. It is ideal for high volume production. Although the level of manual intervention is low, it takes time to set up correctly, and there is a significant investment in the test system itself.

Automated X-Ray inspection, AXI: Automated X-Ray inspection has many similarities to
AOI. However with the advent of BGA packages it was necessary to be able to use a form of inspection that could view items not visible optically. Automated X-Ray inspection, AXI systems can look through IC packages and examine the solder joints underneath the package to evaluate the solder joints.

ICT In circuit test: In-Circuit Test, ICT is a form of ATE that has been in use for many years
and is a particularly effective form of printed circuit board test. This test technique not only looks at short circuits, open circuits, component values, but it also checks the operation of ICs. Although In Circuit Test, ICT is a very powerful tool, it is limited these days by lack of access to boards as a result of the high density of tracks and components in most designs. Pins for contact with the nodes have to be very accurately placed in view of the very fine pitches and may not always make good contact. In view of this and the increasing number of nodes being found on many boards today it is being used less than in previous years, although it is still widely used.

Manufacturing Defect Analyzer, MDA: A Manufacturing Defect Analyzer, MDA is another


form of printed circuit board test and it is effectively a simplified form of ICT. However this form of printed circuit board test only tests for manufacturing defects looking at short circuits, open

circuits and looks at some component values. As a result, the cost of these test systems is much lower than that of a full ICT, but the fault coverage is less.

Functional testing, including rack and stack: Functional test can be considered as any form
of electronics testing that exercises the function of a circuit. There are a number of different approaches that can be adopted dependent upon the type of circuit (RF, digital, analogue, etc), the degree of testing required. The main approaches are outlined below: 1. Functional Automatic Test Equipment, FATE: This term usually refers to the

large functional automatic test equipment in a specially designed console. These automatic test equipment systems are generally used for testing digital boards but these days these large testers are not widely used. The increasing speeds at which many boards run these days cannot be accommodated on these testers where leads between the board under test and the tester measurement or stimulus point can result in large capacitances that slow the rate of operation down. In addition to this fixtures are expensive as is the programme development. Despite these drawbacks these testers may still be used in areas where production volumes are high and speeds not particularly high. They are generally used for testing digital boards. 2. Rack and stack test equipment using GPIB: One way in which boards, or units themselves can be tested is using a stack of remotely controlled test equipment. The most widely method of controlling the test equipment is still to use the General Purpose Interface Bus (GPIB). There may also be a test interface adapter required to control and interface to the item under test. Whilst the GPIB is relatively slow and has been in existence for over 30 years it is still widely used as it provides a very flexible method of test. Laboratory test equipment can often be used as most items of lab test equipment have a GPIB port. The main drawback of GPIB is its speed and the cost of writing the programmes although packages like LabView can be used to aid programme generation and execution in the test environment. Fixtures or test interfaces can also be expensive. 3. Chassis or rack based test equipment: One of the major drawbacks of the GPIB rack and stack automatic test equipment approach is that it occupies a large amount of space, and the operating speed is limited by the speed of the GPIB. To overcome these problems a variety of standards for systems contained within a chassis have been developed.

The idea of containing test instruments within a chassis was first developed under the VXI (VME eXtensions for Instrumentation) guise. The system uses test instruments on a card that can be slotted into a standard chassis. This saves both space and cost when compared to the stand-alone instruments as well as proving an increase in communications speed when compared to other technologies such as GPIB. Later introductions of PXI and then PXI Express provided for lower cost instrumentation while still retaining the advantages of the chassis approach.

Although there are a variety of ATE, automatic test equipment approaches that can be used, these are some of the more popular systems in use. They can all use test management software such as LabView to assist in the running of the individual tests. This enables facilities such as the ordering of tests, results collection and printout as well as results logging, etc.

JTAG Boundary scan testing: Boundary scan is a form of testing that has come to the fore in recent years. Also known as JTAG, Joint Test Action Group, or by its standard IEEE 1149.1, boundary scan offers significant advantages over more traditional forms of testing and as such has become one of the major tools in automatic testing.

As a result of its ability to test boards and even ICs with very limited physical test access, Boundary Scan / JTAG has become very widely used.
With the requirement for testing circuit efficiently increasing while test access is decreasing, efficient methods of testing are needed. Boundary scan uses special boundary scan ICs that have a shift register in the output. By connecting boundary scan compatible ICs serially on a board (or just using the boundary scan chain in an IC for individual IC testing) and enabling the boundary scan chain, it is possible to send in a serial data word, and then monitor the exiting data word. Analysing the exit data train enables the test information to be accessed. In this way it is possible to gain a high level of test access without compromising the circuit.

Combinational test: No single method of testing is able to provide a complete solution these days. To help overcome this various ATE automatic test equipment systems incorporate a variety of test approaches. These combinational testers are generally used for printed circuit board testing. By doing this, a single electronics test is able to gain a much greater level of access for the printed circuit board test, and the test coverage is much higher. Additionally a combinational tester is able to undertake a variety of

different types of test without the need to mover the board from one tester to another. In this way a single suite of tests may include In-circuit testing as well as some functional tests and then some JTAG boundary scan testing. Each type of automatic test philosophy has its strengths, and accordingly it is necessary to choose the correct type of test approach for the testing that is envisaged.
By utilising all the different test techniques appropriately, it is possible to ATE automatic test equipment to be used to its fullest advantage. This will enable tests to be executed swiftly, while still providing a high level of coverage. Inspection techniques including AOI and X-ray inspection can be used along with In-circuit test, and JTAG boundary scan testing. Functional testing can also be used. While it is possible to use different types of test, it is necessary to ensure that products are not over tested as this wastes time. For example if AOI or X-Ray inspection is used, it may not be appropriate to use In-circuit testing. The place of JTAG boundary scan testing should also be considered. In this way the most effective test strategy can be defined.

TEST EQUIPMENT SWITCHING


The addition of a high-speed switching system to a test systems configuration allows for faster, more cost-effective testing of multiple devices, and is designed to reduce both test errors and costs. Designing a test systems switching configuration requires an understanding of the signals to be switched and the tests to be performed, as well as the switching hardware form factors available.

AUTOMATED OPTICAL INSPECTION


Automatic or automated optical inspection, AOI, is a key technique used in the manufacture and test of electronics printed circuit boards, PCBs. Automatic optical inspection, AOI enables fast and accurate inspection of electronics assemblies and in particular PCBs to ensure that the

quality of product leaving the production line is high and the items are built correctly and without manufacturing faults.

Need for AOI, automatic optical inspection


Despite the major improvements that have been made, modern circuits are far more complicated than boards were even a few years ago. The introduction of surface mount technology, and the subsequent further reductions in size mean that boards are particularly compact. Even relatively average boards have thousands of soldered joints, and these are where the majority of problems are found. This increase in the complexity of boards also means that manual inspection is not a viable option these days. Even when it was an accepted approach, it was realised that it was not particularly effective as inspectors soon tired and poor and incorrect construction was easily missed. With the marketplace now requiring high volume, high quality products to be brought to market very quickly very reliable and fast methods are needed to ensure that product quality remains high. AOI, automatic optical inspection is an essential tool in an integrated electronics test strategy that ensure costs are kept as low as possible by detecting faults early in the production line. One of the solutions to this is to use automated or automatic optical inspection systems. Automated optical inspection systems can be placed into the production line just after the solder process. In this way they can be used to catch problems early in the production process. This has a number of advantages. With faults costing more to fix the further along the production process they are found, this is obviously the optimum place to find faults. Additionally process problems in the solder and assembly area can be seen early in the production process and information used to feedback quickly to earlier stages. In this way a rapid response can ensure that problems are recognised quickly and rectified before too many boards are built with the same problem.

AOI, automatic optical inspection basics


AOI, automatic optical inspection systems use visual methods to monitor printed circuit boards for defects. They are able to detect a variety of surface feature defects such as nodules, scratches and stains as well as the more familiar dimensional defects such as open circuits, shorts and thinning of the solder. They can also detect incorrect components, missing components and incorrectly placed components. As such they are able to perform all the visual checks performed previously by manual operators, and far more swiftly and accurately. They achieve this by visually scanning the surface of the board. The board is light by several light sources and one or more high definition cameras are used. In this way the AOI machine is able to build up a picture of the board The automated optical inspection, AOI system uses the captured image which is processed and then compared with the knowledge the machine has of what the board should look like. Using this comparison the AOI system is able to detect and highlight any defects or suspect areas. AOI uses a number of techniques to provide the analysis of whether a board is satisfactory or has any defects:

Template matching:

Using this form of process the AOI, automated optical inspection

system compares the image obtained with the image from a "golden board".

Pattern matching: Using this techniques the AOI system stores information of both good and
bad PCB assemblies, matching the obtained image to these.

Statistical pattern matching: This approach is very similar tot hat above, except that it uses
a statistically based method of addressing problems. By storing the results of several boards and several types of failure, it is able to accommodate minor acceptable deviations without flagging errors.

In order to build up the database of what the board should be, both known status boards and PCB design information is used as described later.

As technology has improved it has been able for AOI systems to very accurately predict defects and have a small number of no defect found scenarios. As such AOI systems form a very useful element in a sophisticated manufacturing environment.

AOI image capture and analysis


One of the key elements of an AOI, automated optical inspection system is the image capture system. This captures an image of the printed circuit board, PCB assembly which is then analysed by the processing software within the AOI system. There are many variants of image capture system dependent upon the exact application and the complexity / cost of the AOI system. Imaging systems may comprise a single camera or there may be more than one to provide better imaging and the possibility of a 3D capability. The cameras should also be able to move under software control. This will enable them to move to the optimum position for a given PCB assembly. In addition to this the type of camera has an impact on performance. Speed against accuracy is a balance that has to be struck and will impact on the camera type used:

Streaming video:

One type of camera used for automated optical inspection, AOI, takes

streaming video from which complete frames are taken. The captured frame then enables a still image to be generated on which the signal processing is performed. This approach is not as accurate as other still image systems but has the advantage of very high speed.

Still image camera system: This is generally placed relatively close to the target PCB and as
a result it requires a good lighting system. It may also be necessary to be able to move the camera under software control.

When analysing an image of a board, the AOI system looks for a variety of specific features: component placement, component size, board fiducials, label patterns (e.g. bar codes), background colour and reflectivity, etc. As an important element of its task the AOI system also inspects the soldered joints to ensure they indicate that the joints are satisfactory.

When analysing the boards the AOI system must take into account many variations between good boards. Not only do components vary considerably in size between batches, but also the colour and reflectivity. Often there are also differences in the silk screening where ink thickness and colour typeface may change slightly.

AOI light source


Lighting is a key element in the AOI system. By choosing the correct lighting source it is possible to highlight different types of defect more easily. With the advances that have been made in lighting technology in recent years, this has enabled lighting to be used to enhance the images available and in turn this enables defects to be highlighted more easily with a resultant reduction in processing required and an increase in speed and accuracy. Most AOI systems have a defined lighting set. This will depend upon the operation required and the product types to be tested. These have usually been optimised for the anticipated conditions. However sometimes some customisation may be required, and an understanding of lighting is always of use. A variety of types of lighting are available:

Fluorescent lighting:

Fluorescent lighting is widely used for AOI, automated optical

inspection applications as it provides an effective form of lighting for viewing defects on PCBs. The main problem with fluorescent lighting for AOI applications is that the lamps degrade with time. This means that the automated optical inspection system will be subject to a constantly changing levels and quality of light

LED lighting:

The development of LED lighting has meant that AOI, automated optical

inspection systems are able to adopt a far more stable form of lighting. Although LED lighting does suffer from a reduction in light output from the LEDs over time, this can be compensated for by increasing the current. Using LED lighting, the level of lighting can also be controlled. LEDs are therefore a far more satisfactory form of lighting than fluorescent or incandescent lights that were used years ago

Infra-red or ultra-violet:
reveal certain types of defect.

On some occasions infra-red or ultra-violet lighting may be

required to enhance certain defects, or to enable automated optical inspection to be carried out to

Apart from the form of lighting, the positioning of the lighting for an automatic optical inspection system, AOI, is equally important. The light sources require positioning to not only to ensure that all areas are well light, which is particularly important when certain components may cast shadows, but also to highlight defects. Careful adjustment may be needed for different assemblies.

AOI, automated optical inspection system programming


In order to be able to test a PCB assembly using AOI, automatic optical inspection, the details for an acceptable board must be stored within the system. This programming activity must be carried out correctly if the AOI system is to be able to correctly detect any defects on the PCB assemblies passing through. there are several methods that can be used to programme an AOI system:

Use of "Golden Board": One method is to provide a known good board as a target for the
AOI, automated optical inspection system to use. This is passed through the system so that it can learn the relevant attributes. It will look at the components, the solder profiles of each joint, and many other aspects. In order to provide the system with enough variance data several boards are often required.

Algorithm based programming: PCB data is provided to the system and it then generates
its own profile for the board. This scheme will also require real boards, but fewer are generally required.

There are advantages and disadvantages to both systems. It is a balance between set-up time, maintenance, accuracy and the requirements for the particular AOI, automated optical inspection system. Typically the requirements will be largely dependent upon the machine in use.

It is essential that any printed circuit board manufacturing area is able to check the quality of the boards coming off the end of the line. Only in this way are they able to monitor quality and when problems are detected to rectify the process so that further boards are not affected by the same problems. In this way automatic optical inspection and where necessary X-ray inspection are two essential tools for the manufacturing industry.

X-RAY INSPECTION
Automatic optical inspection works very well in electronics manufacturing for printed circuit boards where joints are visible. However many PCBs today are using technologies such as ball grid array, BGA integrated circuits and chip scale packages, CSPs where the solder connections are not visible. This has arisen as a result of the need for greater numbers of interconnections to integrated circuit packages and as a general result of increasing complexity. In these and many other instances it is necessary to carry out checks using automated X-Ray inspection, AXI, equipment that can not only check the solder joints under components, but also reveal many defects in solder joints that may not be visible with ordinary optical inspection equipment. In recent years, the need for automated X-Ray inspection equipment has grown considerably and as a result, a much wider range of equipment is available. Additionally the techniques used in automated X-Ray inspection equipment has improved and this has enabled far greater levels of detection to be achieved for printed circuit board, PCB manufacture. As one significant improvement in AXI, automated X-ray inspection, not only are 2D or two dimensional techniques available, but machines utilising 3D technology are available and give significant improvements in performance.

AXI technology features


AXI, automated X-ray inspection systems are able to monitor a variety of aspects of a printed circuit board assembly production. They would normally be placed after the solder process to monitor defects in PCBs after leaving the soldering process. They have the distinct advantage

over optical systems that they are able to "see" solder joints that are under packages such as BGAs, CSPs and flip chips where the solder joints are hidden. AXI, automated X-ray inspection systems are not only able to "see" through the chips, but they are also able to provide an internal view of the solder joints. In this way they are able to detect voiding within a solder joint that may otherwise look perfectly acceptable. This means that AXI, automated X-ray inspection systems are able to provide additional information over that which could be provided by purely optical systems to ensure that solder joints are being made to the required standard. AXI, automated optical inspection can inspect the features of solder joints providing information on the way the soldering process is operating. Parameters such as solder thickness, joint sizes and profiles can be undertaken on specific joints on boards. These can then be used to provide data on the solder process and how well it is operating. AXI systems are also able to see the heel of the joint which AOI systems are unable to see as they are masked by the leads from the ICs as shown.

Solder joint geometry for a typical Quad Flat Pack IC When an automated X-ray inspection system, or an optical system is used within an electronics PCB manufacturing process, the defects and other information detected by the inspection system can be quickly analysed and the process altered to reduce the defects and improve the quality of the process. In this way not only are actual faults detected, but the process can be altered to reduce the fault levels on the boards coming through. Accordingly they ensure that the highest standards are maintained and they are particularly useful when new boards are being set up and the process needs to be optimised.

It should be realised that AXI is only one of the number of tools that can be used within an electronics PCB manufacturing organisation. Two other tools, namely AOI, automatic optical inspection, and ICT, in-circuit test can provide similar information in many areas. The table below provides a comparison of the different types on information that each form of automatic test equipment, ATE can provide. Automated X-ray inspection, AXI has an important place in many electronics PCB manufacturing organisations. AXI is able to provide a fast and in-depth and accurate inspection of PCBs passing through the production facility and in this way provide real-time feedback that enables the production system to be optimised to enable high quality reliable circuits to be produced. Although more expensive than some other forms of inspection, AXI has many advantages and these need to be carefully balanced against the costs to ensure whatever choice is made, it is correct for the particular production environment.

IN-CIRCUIT TESTING,ICT
In-Circuit Test, ICT is a powerful tool for printed circuit board test. Using a bed of nails incircuit test equipment it is possible gain access to the circuit nodes on a board and measure the performance of the components regardless of the other components connected to them. Parameters such as resistance, capacitance and so forth are all measured along with the operation of analogue components such as operational amplifiers. Some functionality of digital circuits can also be measured, although their complexity usually makes a full check uneconomic. In this way, using ICT, In-Circuit Test, it is possible to undertake a very comprehensive form of printed circuit board test, ensuring that the circuit has been manufactured correctly and has a very high chance of performing to its specification.

Basic concept of ICT, in-circuit test


In circuit test equipment provides a useful and efficient form of printed circuit board test by measuring each component in turn to check that it is in place and of the correct value. As most faults on a board arise out of the manufacturing process and usually consist of short circuits,

open circuits or wrong components, this form of testing catches most of the problems on a board. Even when ICs fail, one of the major reasons is static damage, and this normally manifests itself in the areas of the IC close to the connections to the outside world, and these failures can be detected relatively easily using in-circuit test techniques. Naturally an in-circuit test does not give a test of the functionality of a board, but if it has been designed correctly, and then assembled correctly, it should work. In-circuit test equipment consists of two main parts. The first is the tester itself. This consists of a matrix of drivers and sensors that are used to set up and perform the measurements. There may be 1000 or more of these driver sensor points. These are normally taken to a large connector conveniently located on the system. This connector interfaces with the second part of the tester - the fixture. In view of the variety of boards this will be designed specifically for a particular board, and acts as an interface between the board and the in circuit tester. It takes the connections for the driver sensor points and routes them directly to the relevant points on the board using a "bed of nails".

Bed of nails tester


A bed of nails tester is a traditional electronic test fixture which has numerous pins inserted into holes in an Epoxy phenolic glass cloth laminated sheet (G-10) which are aligned using tooling pins to make contact with test points on a printed circuit board and are also connected to a measuring unit by wires. Named by analogy with a real-world bed of nails, these devices contain an array of small, spring-loaded pogo pins; each pogo pin makes contact with one node in the circuitry of the DUT (Device Under Test). By pressing the DUT down against the bed of nails, reliable contact can be quickly, simultaneously made with hundreds or even thousands of individual test points within the circuitry of the DUT. The hold-down force may be provided manually or by means of a vacuum pulling the DUT downwards onto the nails. Devices that have been tested on a bed of nails tester may show evidence of this after the fact: small dimples (from the sharp tips of the pogo pins) can often be seen on many of the soldered connections of the PCB.

Typically, four to six weeks are needed for the manufacture and programming of such a fixture. Fixture can either be vacuum or press-down. Vacuum fixtures give better signal reading versus the press-down type. On the other hand, vacuum fixtures are expensive because of their high manufacturing complexity. The bed of nails or fixture as generally termed is used together with a in-circuit tester such as MTS 300 from Digitaltest (Germany), i3070, 3070 from Agilent (USA), Teradyne Spectrum Series and continuation of the former Genrad Teststation series under the Teradyne flag (USA), SPEA (Italy) 3030 series, IFR 4200 series, was Marconi Test prior to acquisition by IFR (USA), TRI (Taiwan), Okano (Japan), SEICA, HIOKI(Japan) and Checksum (USA). The Checksum system is an entry level machine selling for approx. USD$10K and finding approximately 95-98% of manufacturing defects. The Teradyne system is a system designed for high end manufacture and military use, and sells for approx. USD$200K plus.

Driver-sensors for ICT


Driver-sensors are the active circuits that are used for making the measurements. Normally drivers and sensors are always present in pairs in an in-circuit test system. As the name suggests the drivers supply a voltage or current to enable a node in the circuit to be driven to a particular state. They normally have a reasonably high capability to enable the node to be driven to the required state despite the condition of the surrounding circuitry. Typically they may need to force the output of a digital IC to a given state despite the natural output state of the device. To achieve this the output impedance of the driver must be very low. Sensors are used to make the measurements. Like most other measuring devices these need to have a high impedance so that they do not disturb the circuit being measured.

Guarding
The key to the success of in-circuit testing is a technique known as guarding. It is very easy to measure the value of a component when it is not in a circuit. For example a resistor value can be measured by simply placing an ohmmeter across it. However when the component is in a circuit, the situation is somewhat different. Here it is most likely that there are other paths around the component that will alter the value that is measured. To overcome this problem and gain a far more accurate indication of the value of the component a technique known as guarding is used. Here the nodes around the component under test are earthed and in this way any leakage paths are removed and more accurate measurements made.

ICT fixtures and connections


In order to carry out the test it is necessary to gain access to each node on the board. The most common way of achieving this is to generate a "bed of nails" fixture. The board is held in place accurately by the fixture and pulled onto spring loaded pins that make contact with connections on the board. The board may either be pulled down under the action of a vacuum or it may be achieved mechanically. At one time when board component densities were much lower it was often possible to place special ATE pads onto the board to enable good connection to be made. Nowadays with very much more compact boards this is not possible. Instead connections are made onto the component pads. This is obviously more difficult because of the solder and the component connection itself, but can still be achieved to a high degree of reliability. Typically each spring exerts a force of between 100 and 200g to ensure that good contact is made. This obviously means that the total force required for all the pins on a board can be very significant. Sometimes supports for the board are required to ensure that it does not flex too much as this may result in cracking some delicate surface mount components.

Typically pins are placed on a 0.1 inch matrix. Many new surface mount IC packages require a much finer pitch, and to achieve this an adapter is often used. There is a great variety of different types of pin that can be used. The major design changes are within the head or tip that contacts the board under test. Each type of head has a particular application for which it is best suited. Concave tips may be used to connect onto terminal posts, flat tips or those with a spherical radius may be used to connect onto card edge fingers, whilst those with a sharp point may be used to connect onto component pads. These sharp tips will penetrate any oxide layer, giving a high level of reliability on soldered areas. The wiring in the fixtures is generally not neatly loomed together. Whilst this may not be as aesthetically pleasing, it reduces the levels of cross-talk and spurious capacitance. It also reduces the wire lengths within the fixture as the shortest route between two points can be taken within reason.

ICT program generation


One of the advantages of the in-circuit tester is that programme generation can be made much simpler than that of a functional tester. It is possible for much of the programme to be generated automatically from a knowledge of the circuit. This can be provided very easily from the printed circuit files. The information about the nodes along with the circuit value information can be combined to give a programme that can then be altered manually to provide

Multiplexing
Today's printed circuit boards can be very complicated. On larger boards the node count can easily rise over a thousand and may reach several thousand on some. To have dedicated pins on the tester for each node can be very costly as each one requires its own driver sensor. To reduce this manufacturers introduce a system known as multiplexing. Here a particular node may be placed through a switching matrix so that it can address more than one node. The number of nodes that are addressed by each tester primary node is known as the multiplex ratio.

Whilst it may appear to be an excellent idea to reduce costs, it reduces the flexibility of the tester. Only one of the multiplexed nodes can be accessed at any time. This can cause restrictions in the programming and also in the fixture itself. Considerable thought has to be given to the fixture construction to ensure that two pins on the same multiplex are not required at the same time. It may also cause problems if the pins are allocated automatically by software that generates the test programme and fixture wiring diagram. When buying a machine it is worth checking whether multiplexing is used and what the ratio is. With this information a judgement can be made of the cost saving against the reduction in flexibility.

Fault coverage
With access to all the nodes on the board, manufacturers generally quote that it is possible to find around 98% of faults using in circuit test. This is very much an ideal figure because there are always practical reasons why this may not be achieved. One of the major reasons that it is not always possible to gain complete coverage of the board. Low value capacitors are a particular problem as the spurious capacitance of the test system itself means that low values of capacitance cannot be measured accurately if at all. A similar problem exists for inductors but at least it is possible if a component is in place by the fact that it exhibits a low resistance. Further problems are caused when it is not possible to gain access to all the nodes on the board. This may result from the fact that the tester has insufficient capacity, or it may result from the fact that a point to which the tester needs access is shielded by a large component, or anyone of a number of reasons. When this occurs it is often possible to gain a level of confidence that the circuit has been correctly assembled by what may be termed "implied testing" where a larger section of circuit containing several components is tested as an entity. However the confidence will be less and location of faults may be more difficult.

Pros and Cons of ICT


One advantage of an ICT as a first line form of printed circuit board test is that most board faults arise from problems in manufacture. These might arise from the incorrect component inserted, a wrong value resistor, a diode in the wrong way. These are very easily and quickly located using ICT. An In-Circuit tester is also very easy to program and no long diagnostic routines are required to locate any problems. While the fixtures can be reasonably expensive the production of these as well can be automated to a large degree. However against this any changes to the board layout as a result of up-issuing the board can result in changes to the fixture that may be difficult to implement. Another advantage of ICT as a form of printed circuit board test is that the test results are easily interpreted. This enables them to be used by a variety of people. As a result their running costs are less than some other systems that might need highly skilled diagnostic technicians and as a result this makes them attractive for use on the shop floor to locate most of the problems. There are some other limitations. The first is that they obviously cannot provide a full functional check of the specification of the board. During the ICT printed circuit board test, the board is not being exercised in its operational mode, its operational parameters cannot be checked. Another problem that is becoming more difficult to overcome is that access to the nodes is becoming more difficult. Many years ago it was possible to place special pads onto the boards to enable the fixture pins to connect to the board easily. Now boards are so compact that there is no possibility of being able to apply special pads to each node. Also the size of component connections is becoming much smaller and this means that probing these points is far more difficult. However it is still possible to achieve a good coverage on many boards. One problem that concerned people, especially some years ago was that of back driving. When performing a test some nodes have to be held at a certain level. This meant forcing the output of possibly a digital integrated circuit to an alternative state purely by applying a voltage to override the output level. This naturally put a strain on the output circuitry of the chip. It is generally

assumed that this can be done for a very short period of time - sufficient to undertake the test without any long-term damage to the chip. However with the geometries in ICs shrinking, this is likely to become more problematical.

Roving probe
To reduce the fixture costs, provide additional flexibility and enable board changes to be accommodated by updates to a software programme, a type of in circuit tester known as a roving probe or roving prober may be used. Instead of having a bed of nails fixture a simple fixture to hold the board is used and probes that move under software control are used to probe the relevant points on the board. These systems normally have a number of probes, some that can access both sides of the board. These systems provide a slower form of printed circuit board test than the systems that use a bed of nails fixture because there is a delay between measurements as the probe moves to the next position and this will naturally reduce the throughput. However the system is cheaper for the maintenance and introduction of new boards because of the reduced fixturing costs and reduced cost of changes. In circuit test has many advantages and is an ideal form of printed circuit board test in many respects. However as a result of the rapidly shrinking component sizes and the resultant difficulties in gaining access to all the nodes on boards testing using ICT has been steadily becoming more difficult. Accordingly many people have been predicting the imminent demise of ICT as a form of printed circuit board test. It remains to be seen how long this will take.

FLYING PROBE IN-CIRCUIT TESTING


The flying probe tester is a form of automated test equipment that has been in use since around 1986 when the first testers were introduced. Flying probe testers provide many advantages over other forms of automated test equipment for particular applications. As a result, flying probe testers are now in widespread use in a variety of areas of the electronics manufacturing industry.

Initially, flying probe testers were introduced to cover the prototype and very small quantity production areas. Now the use of this type of automated test equipment has expanded, and although not used as the main test in high volume production, they are nevertheless used in many areas.

Flying probe test basics


The concept of a flying probe tester is that rather than having a comprehensive fixture for a given PCB assembly that can access all the required nodes via a "bed of nails", the system uses a generic board holder, and one or more probes moves across the board accessing individual nodes under software control. The flying probe tester is therefore able to cut down on the number of test fixtures required and it is also much easier to introduce changes, especially to features such as component or pad positions because it is just a matter of changing the software. The flying probe tester can be considered as a form of in-circuit tester, ICT. Early flying probe testers were only able to offer relatively basic capabilities and were more akin to Manufacturing Defect Analysers, MDA capable of testing for shorts and opens as well as basic tests on components such as diodes and transistor junctions. Advancements made in the technology mean that flying probe testers now include facilities such as on-board memory module programming and boundary scan testing. With these capabilities, they are able to offer the equivalent performance of an advanced in-circuit tester. One advantage of the flying probe tester is that as the flying probe assembly itself is a precision mechanical item the probes can be placed very accurately. This enables them to be placed on small pads or component solder connections with high levels of accuracy. Some manufacturers state that their systems can probe pins on IC types including PLCCs, SOICs, PGAs, SSOPs, QFPs, etc as the probe placement accuracy is sufficiently high.

Advantages and disadvantages of flying probe test


Like any system, the flying probe tester has its advantages and disadvantages. This means that it is ideally suited to use in some applications, but not in others. Essentially as it is a form of incircuit test, it is normally compared to other full in-circuit testers. Advantages of a flying probe test system:

No special fixture required: In view of the fact that the probes move according under software control to make contact with the required nodes, the "bed of nails" fixture required for ICT is not required. SA simple generic mechanism to hold the board in place is needed.

Changes can be made easily: As the probes move under software control, any changes to pad positions or components can be made by purely changing the software. It is not necessary to make any mechanical changes to a fixture as in the case of a "bed of nails" fixture.

Test development time reduced: Software for a flying probe tester can be developed relatively quickly from the PCB design files. The big saving is that no mechanical fixture is required and its manufacturing time is not needed. Accordingly development of the test programme for the flying probe tester simply requires the PCB files, and ultimately a first off board or boards on which to test the programme.

The advantages of the flying probe test system mean that it is ideally suited to many applications. However the disadvantages also need to be considered as well. Disadvantages of a flying probe test system:

Speed of operation is slow: When compared to other forms of automated test equipment
such as an ICT, the flying probe tester is much slower because the probes have to physical move to each position in turn. For an ICT system all the connections are in place in the fixture

It may not always possible to make complicated tests: Using early flying probe testers it
was not possible to test components beyond passive components or diodes. To achieve higher levels of fault detection technologies such as boundary scan and the use of on-board memory

enable more complicated tests to be undertaken. It is necessary to check the performance of the individual flying probe tester to ensure it can meet the requirements.

Balancing the advantages and disadvantages of the flying probe test system, it is ideally suited to prototype applications and also areas where small volume production is undertaken. In view of the test times taken, it is not suitable for volume production applications in view of the test times unless it is used only for sample testing. Flying probe testers are now widely used throughout the electronics manufacturing industry. They provide a much cheaper and more flexible form of in-circuit test. While these flying probe testers have their limitations, their advantages outweigh these in small volume and prototype applications where their flexibility, low development costs and short development times mean they are ideally suited for these areas.

DIGITAL FUNCTIONAL AUTOMATED TESTING


Digital functional testers, often referred to as FATE systems are not as widely used as they used to be some years ago. These systems apply a signal pattern to the input of the board. This may often simulate or nearly simulate the live input to the board, and then the system monitors the outputs looking for the correct output pattern. The advantage of this type of tester is that it is able to provide a very fast test of a board. This enables it to be passed on to the next stage of the equipment assembly with a very high degree of certainty that it will function to its specification in the unit or system into which it is incorporated.

Interface
Like in-circuit testers the interface to the board is usually effected using a bed of nails. These may be virtually the same in construction as one used for in circuit testing and it enables fast connection to be made to the board. Whilst connection through the connectors would often be possible, this takes additional time, and in view of the cost of many of these testers and the

throughput required, this would not be an acceptable solution. Instead a bed of nails fixture that is operated either using a vacuum or mechanically is used. In this way the board is simply placed onto the fixture and the connections are made as it is pulled onto the pins. This operation is completed in a matter of a few seconds rather than tens of seconds or even a minute or more if connectors were used. The fixture need not be nearly as complicated as one used for an in circuit test. The reason for this is that connection is only required to the input and output nodes rather than all the circuit nodes in the case of an in circuit tester. Indeed if pins were applied to all the nodes, the stray capacitance introduced may impeded the operation of the board.

Program generation
FATE systems are most widely used for testing digital boards. Much of the programme can be generated automatically by entering the circuit data into the tester. Once this has been done the computer within the tester builds up its own picture of the circuit and then with a knowledge of the pin connections it can then build up a test programme for the board. The simulations run by programming stations have been known to reveal design problems such as race states or even circuitry that is not required. Unfortunately programme generation is never as straight forward as might be liked and the programmes generated in this way usually need a lot of finishing which is generally very time consuming. In addition to this any analogue areas need to be programmed manually and often require analogue measuring instruments to be used. This can be very time consuming. In view of the significant level of manual programming required for functional test programmes they can be very expensive to implement.

Guided probe
FATE systems are very fast at finding functional faults with a board. They are not always so fast in finding a problem. In many instances the tester will be able to deduce the problem from its knowledge of the circuit. In most cases they are unable to locate a problem because they do not have "sight" of the internal areas of the board. To overcome this it is necessary to gain a view of the circuit at intermediate points in the board. This is generally achieved using what is called a guided probe. This is a probe connected to the tester that can be manually applied to different points on the circuit under programme control. In this way it is possible to check the points on the board that are not accessible via the bed of nails. Some of the routines that are required to fault finding using a guided probe may be generated automatically, but often they need to be programmed manually, especially for any analogue areas. This programming can be particularly time consuming although very necessary if a large number of reject boards is not to be the result.

Advantages and disadvantages


The main advantage of an FATE system is that it tests boards very quickly. Speed is reduced quite considerably, though, when analogue testing is required. Part of the reason for this is that the analogue instruments may take time to settle. Another contribution arises from the fact that they may be controlled via a GPIB port, although some may use VXI instrumentation. The disadvantages with large FATE systems are generally the cost. The system itself may cost several hundred thousand pounds. On top of this, there are the fixture costs for each board as well as the programming costs. A further disadvantage is that the lead lengths to some points on the circuit have significant levels of capacitance and these restrict the testing to speeds much slower than the full speed of the board. This is becoming more of a problem with many boards today

Today an option that many people are opting for is a low cost bench-top combination tester that combines in circuit testing with boundary scan and functional testing. In this way a very high degree of confidence can be reached whilst still being able to locate faults quickly. However for high speed digital boards other solutions often need to be devised.

ANALYST
To successfully diagnose faults on complex, often high speed, electronics, DiagnoSYS testers have a number of software and hardware tools available which permit diagnosis usually to a single failing device or manufacturing fault. These tools are controlled by a Diagnostic System called
ANALYST.

Purpose of a Diagnostic System


Once a test program has identified that a UUT is faulty, it is normally necessary to identify the source of the fault so that repairs may be carried out. On simple UUT's it may be possible to identify the failure from the fault symptoms, or from diagnostic messages included by the programmer. Many UUT's however, are too complex for this simple approach. ANALYST interprets the information gained from running a test program against a faulty UUT and compares it against previous failure, and stored good activity, information. From this information ANALYST is able to identify the failure area with a high degree of accuracy. ANALYST is designed to adapt to the nature of the UUT, and to the facilities available on the tester. When the UUT fails, the test program produces a fault signature. Fault signatures are inspected by ANALYST and compared against any Fault Dictionaries available (usually obtained from digital simulation). If a matching fault signature is found, ANALYST can produce a diagnosis from this information. A fault dictionary cannot always provide sufficient information to diagnose to one specific fault. In this case, or if no fault dictionary is available, ANALYST uses a guided probe to backtrack a failure location. ANALYST uses a series of information to aid its diagnostics:

Test Program: provides the stimulus and the output changes to a UUT via test channels. The test channels monitor these changes (or in the case of a faulty condition, the lack of changes) to determine the functionality of the UUT - i.e. PASS or FAIL. UUT: Unit Under Test provides information to be compared with the information already held on the test database from both the edge connector and the internal networks. System Probe: is used to gather the information from the networks of the UUT for comparison with the known good activity stored on the database and determines if it is faulty or not. Diagnostic Algorithm: guides the system probe to the networks which are on the fault path (i.e. where the fault propagates to the edge connector to cause the UUT to fail and stop the program). Network Activity: is a record of the activity for each network on the UUT. It is stored on the database and compared with the data measured by the System Probe on a faulty UUT network. Analyst compares the two sets of data and makes decisions on probing routes or diagnostic messages. Diagnostic Messages: are displayed by the system on the screen and/or ticket printer during the diagnostic process. Operator Messages: are displayed during the diagnostic process to guide the operator to the fault on the UUT. FAST-PROBE: is a hand held probe positioned by the operator according to probing instructions supplied by ANALYST. FAST-PROBE can be used to collect high speed digital activity, signature analysis data and analogue activity information from the UUT, which ANALYST compares with stored good information to track failures. NAIL-PROBE: is similar to FAST-PROBE in operation, except that it uses existing fixture nails to probe the UUT. ANALYST can gather information from NAIL-PROBE automatically, thereby reducing or avoiding the need for operator probing and thus speeding up the diagnosis time. Since it lacks the mobility of FAST-PROBE, NAILPROBE cannot be used in the additional modes of FASTPROBE nor can it diagnose open track faults. USER PROBE: A special user probe can be supplied on suitably configured testers, which may be used in conjunction with ANALYST. CDP: Fault diagnostics can be much simplified, particularly on bus structured boards, if ANALYST knows which devices are driving at a given point, and the direction in which

they are driving. ANALYST can use CDP information to concentrate on devices which are active at the time of a failure, leading to a reduction in operator probing and faster diagnostics. FAULT DICTIONARIES: are used by ANALYST to produce the most comprehensive fault diagnosis possible, and to minimise the amount of probing required to backtrack a fault. The backtracking algorithm knows the logical dependency of the devices on the UUT, from the compiled netlist information in the database. Using this information the algorithm performs a search of the UUT, following the earliest first fail. The algorithm starts from a failing input pin of a device, probes the pin and selects a possible driver for the pin. The inputs of this driver are then located and probed. LOCATOR: is a software package which may be called by ANALYST to provide topological information to an operator. A layout of part of the board is shown with a clear identification of the setting up/probing points referred to in the display window.

Inconsistent Activity and Misprobe Check


Operator Mis-probes UUT Trace Inconsistencies UUT Track Open Checks ANALYST has a collection of tools which collectively detect operator misprobes, giving a further reduction in the number of probe operations needed. The misprobe check does not merely discover operator misprobes, it also detects inconsistent UUT activity and track-open faults. On the fly misprobe checks perform multiple probes on the same networks in order to check that the track is continuous and that the operator is probing correctly. The misprobe check is therefore a collection of tools which ensure that the operator miss-probes, track-opens and inconsistent UUT activity are still discovered and dealt with, while still only performing one probe operation per network.

BOUNDARY SCAN TESTING


Boundary scan tests may be generated manually but are usually created using the Scan Program Generator(SPG). The basic tests check the integrity of the chain on a UUT. Other tests can be generated that check for short circuits and open circuits on the PCB. Scan test facilities are integral to the s790 and s790VXI test systems but can be run on upgraded s700 test systems that have been fitted with VXI Scan Cards.Boundary Scan aims to overcome access problems to components and to confirm:
-

correct operation of devices correct interconnection between devices correct interaction between devices

Boundary Scan is used because modern technologies limit physical access through:
- high -

pin count packages.

requirement for high accuracy pin placement. technology means poor access.

- surface mount -

conformal coating difficult to probe.

- double sided boards can't use BONs.

Need for visibility and Control to:


reduce debug and reduce test

test time.

development time.

reduce cost of test

Scan Program Generator(SPG)


The Scan Program Generator is a tool for automating the testing of boards containing Boundary Scan devices. It uses a test plan interface for the user to construct a test sequence using pre-defined
protocols.

LANGUAGES

Component Description Language


The Component Description Language provides component description facilities and library management for test systems using components conforming to the IEEE 1149.1 standard. It enables the descriptions of scan components to be placed in a library and allows the modification of existing components held in the library.

Board Description Language


The Board Description Language is a source language used to describe the individual components on a board and the interconnections between them. With respect to boundary scan, it contains details of what components form the scan chain and how the test access port (TAP) connections are made. The source file must be compiled into object form for use with the Scan Program Generator.

Fixture Data Language


The fixture data language is a source language used to prepare descriptions of test fixtures. The source file must be compiled into object form for use with the Scan Program Generator.

Boundary Scan Definition Language


This is a subset of VHDL (Very High Speed Hardware Description Language) and is used to describe the testability features of devices that comply with the IEEE1149.1 standard.

BSDL to CDL Translator


This allows the translation of Boundary Scan Description Language into DiagnoSYSs Component Description Language. The main purpose of the translator is to generate the scan test
section of the component description.

CONTEXT DEPENDENT PROBING


Context Dependent Probing (CDP) is used during Functional Digital Diagnostic Testing. CDP gives benefits of a reduction in the number of probing operations needed to diagnose a failure and provides accurate diagnostics in less time, which in turn gives cost benefits of higher throughput. The number of probe operations needed to diagnose a fault can be reduced by a ratio
of 5:1 or more.

CDP identifies which component(s) could contribute to a fault thereby determining which component(s) to probe or ignore. Context Dependent Probing (CDP) further improves the diagnostic capability of the ANALYST probing algorithm by reducing the number of probes taken to diagnose a fault. Improvements of 5:1 and more are feasible with these techniques. CDP uses a 'diagnostic data build' technique which takes information from the Component Descriptions for the devices on the board, the Trace Data file and the Board Description to 'build' the diagnostic data for a database. This information is used to identify control pins for a device to be probed and therefore allow Analyst to probe these pins first. It also gives information which allows Analyst to decide the order in which devices connected to a network should be probed if that network should fail. This is done by matching Trace Data for control pin(s) for devices with truth-table information taken from the Component Description for each device, enabling an analysis to be made as to whether each device is driving, sensing or tri-state at the failing measure index. Device inputs can also be set to 'ignore' status, by this analysis, if they do not affect the device outputs at the failing measure index. Diagnostic data is held in a Diagnostic Details file which can be user modified via menu selections in the Probe Display window.

Additional features offered by the ANALYST probing algorithm when CDP data is present are:
it it

will identify which device is driving a bus at the point of failure will concentrate on control pins initially

it will 'ignore' non-critical pins

SIMULATORS
A simulator provides a software model of a circuit. It allows the programmer to write input test vectors (patterns) and present them to the simulator which then calculates the internal and external nodal activity generated. The simulator has full knowledge of the logical activity in the circuit which makes it possible to automatically check the ability of the manually written test vectors to detect and diagnose faults within the circuit.

Fault Lists and Fault Dictionary


The simulator generates a list of all possible faults in the circuit called a Fault List. It then applies each fault in turn to the software model and then runs the test program to check whether or not they are detected and then diagnosed. When a fault is detected it is marked as found and the resulting vector on the outputs of the circuit is recorded against the fault cause in a Fault Dictionary.

CADDIF
Simulator Links translate the Simulator created files into an intermediate format called CADDIF (Computer Aided Design Data Interchange Format) via a Simulator Port. The CADDIF standard Defines a neutral format for test data allowing it to be independent of either the tester or simulator computer platform. The CADDIF standard is public domain information which allows an open architecture concept between simulators and ATE in general.

S790
The S790 is a combinational test system which is very modular and capable of handling a number of test requirements. This means that the digital and analog pin cards, power supplies, analog instruments, fixtures, test programs, etc. are all capable of being configured to an individual users requirements.

S790 VXI SYSTEM


The architecture of this system is based around a VXI rack and the National Instruments CPU30 slot zero controller. A CATE workstation connects to the tester via an Ethernet link. By using the CPU30 card VXI instrumentation can be easily introduced and controlled by the system. The instrumentation can also be synchronised and pipelined to facilitate faster programming. IEEE instrumentation can also be controlled and interfaced to the system using the CPU30 card. The heart of the 790-VXI or 760 VXI capability is the National Instruments VXIcpu-30 card. This card is the embedded processor which runs the VXworks operating system. The terminology is overviewed below: VME - this is a 'standard' for backplane communications for small computer boards. It is a multi master bus on which any device with bus master capability can arbitrate for control of the data transfers. There is no central bus controller unlike the IEEE system. VXI - this is the VME bus eXtension for Instrumentation. It is a standard based on the VME bus maintaining the modular approach but extending it for instrumentation. VXworks - the operating system for the VXIcpu-30 card. MXI - Multi system Extension Interface. This is an ultra high speed communication link between devices and operates at speeds up to 20 MBytes per second. It is based on the VME and NUBus and is a general purpose interface bus. VXI instruments - single card instruments fitting into a VXI crate. They do not have a front panel but can be used alongside, or instead of, IEEE instruments. The VXI specification defines protocols for data transfer, clear, trigger, local lockout, SRQ and serial poll facilities. The VXI logical address is equivalent to the GPIB address.

VXI TECHNOLOGY
VXI Technology is used to control the programmable instruments fitted to the s790 VXI test system. VXIbus is an abbreviation of VME extension for Instruments bus which is based upon industry-standard VMEbus computer architecture extends modular systems approach to instruments. The goal of the VXIbus is to define technically a modular instrument standard open to all manufacturers and be compatible with present industry standards. The VXIbus specification details technical requirements for compatibility of: main-frames backplanes power supplies instrument modules for interconnecting and operating different manufacturer's products within the same card chassis if they comply with the VXIbus specification. VXI can be thought of as bringing the UNIX and ETHERNET type standard to testing in the future. Advantages of VXIbus: VXIbus specification allows modular ATE to be developed, detailing both mechanical and electrical parameters to which instruments and racks must adhere. Longer system support -- through wider choice of product and inter-operability of manufacturer's devices. Standard VMEbus cards will operate within the VXIbus system. Accommodates different system hierarchy -- the user is not locked to one type of processor, operating system software or interface to host computer. As long as a system can 'drive' the protocol a user should be able to swap the VXIbus hardware from system to system. Shared system resources -- VXIbus uses a common backplane chassis between instruments, which also provides power supplies and cooling. Since the instrument manufacturer does not need to include these on the board(s), less components are required which should result in lowering of costs. Higher level of performance -- VXI instruments have significant improvements over more traditional instrument control by being able to pass commands and data between controller /

instruments at higher speeds, also higher degree of accuracy / synchronisation when one module needs to start / stop operations on another.