OTA000004 SDH Principle

Issue 2.0

Optical Network Curriculum Development Section

Objectives

Upon completion of this course, you will be able to:

Understand the basic of SDH multiplexing standard

Know the features, applications

and advantages of SDH based

equipment

Course Contents

Part 1 SDH Overview

i. ii. iii. iv. Emergence of SDH Disadvantages of PDH Advantages of SDH Disadvantages of SDH

Part 2 Frame Structure & Multiplexing Methods Part 3 Overhead & Pointers Part 4 Logical Functional Blocks

References

SDH Principle Manual

ITU-T G.701, G.702, G.707

Emergence of SDH
Synchronous Digital Hierarchy ---It defines frame structure, multiplexing method, digital rates hierarchy and interface code pattern.
----

What is SDH?

---- Need

Why did SDH emerge?

for a system to process increasing amounts of information. ---- New standard that allows mixing equipment from different suppliers.

BACK

Disadvantages of PDH

1. Interfaces
Electrical interfaces

Plesiochronous Digital Hierarchy

--Only regional standards. 3 PDH rate hierarchies for PDH: European (2.048 Mb/s), Japanese, North American (1.544 Mb/s). Optical interfaces --No standards for optical line equipment, manufacturers develop at their will.

Disadvantages of PDH

2. Multiplexing methods
Asynchronous Multiplexing for PDH The location of low-rate signals in high-rate signals is not regular nor predictable.

Disadvantages of PDH

140 Mb/s 34 Mb/s 34 Mb/s

140 Mb/s

8 Mb/s
de-multiplexer de-multiplexer de-multiplexer

8 Mb/s multiplexer multiplexer

multiplexer

2 Mb/s

level by level Not suitable for huge-volume transmission

Disadvantages of PDH

3. OAM function
--Weak Operation, Administration & Maintenance function. --Provisioning circuits is time consuming & laborintensive.

4. No universal network management interface

--Capabilities to setup a TMN is limited.
Telecommunications Management Network

Advantages of SDH

1. Interfaces
Electrical interfaces
--Can be connected to all existing PDH signals.

Optical interfaces
--Can be connected to multiple vendors optical transmission equipment.

BACK

Advantages of SDH

2. Multiplexing method
Synchronous Transport Module, level 1

--Basic rate is STM-1, other rates are multiples of the basic rate --PDH signal to/from SDH signal --Low level SDH to/from high level SDH
622 Mbit/s 622 Mbit/s Multiplexing
STM-1 STM-1 STM-1 STM-1

De-multiplexing 2 Mbit/s

STM-4

Low rate SDH High rate SDH

Advantages of SDH
Low rate SDH to higher rate SDH

4
STM-1 155 Mb/s

STM-64 10 Gb/s

STM-4 622 Mb/s

STM-16 2.5 Gb/s

WDM

10 Gb/s

Advantages of SDH
byte interleaved multiplexing method

STM-1

One Byte from STM-1 A

A
STM-1 B

4:1

STM-4

STM-1
C STM-1 D

Advantages of SDH
Optical Interface only scrambles the electrical signal The optical code pattern SDH uses is Scrambled NRZ PDH uses mBnB
Synchronous multiplexing method and flexible mapping structure Use multistage pointer to align PDH loads in SDH frame, thus, dynamic drop-and-insert capabilities

Advantages of SDH

General concept

P D Packing H

STM-1

PKG

Alignment
PKG PKG a b

Advantages of SDH

3. OAM function
--- Abundant overheads bytes for automation, network monitoring and maintenance --- About 5% of the total bytes are being used

Advantages of SDH

4. Compatibility
PDH, SDH, ATM, FDDI Signals

packing

package

STM-N transmit

SDH network receive

STM-N

package Processing

Processing

unpacking
PDH, SDH, ATM, FDDI Signals

BACK

Disadvantages of SDH
1. Low bandwidth utilization ratio.
Signal E0 E1 E2 E3 E4 Bit Rate 155.52 Mbit/s 622.08 Mbit/s 2488.32Mbit/s 9953.28Mbit/s Digital Bit Rate 64 kbit/s 2.048 Mbit/s 8.448 Mbit/s 34.368 Mbit/s 139.264 Mbit/s Abbreviated 155 Mbit/s 622 Mbit/s 2.5 Gbit/s 10 Gbit/s Channels One 64 kbit/s 32 E0 128 E0 16 E1 64 E1 SDH STM-1 STM-4 STM-16 STM-64 SDH Capacity 63 E1, 3 E3 or 1 E4 252 E1, 12 E3 or 4 E4 1008 E1, 48 E3 or 16 E4 4032 E1, 192 E3, 64 E4
BACK

Non-Synchronous, PDH Hierarchy

SDH Hierarchy

Disadvantages of SDH

2. Mechanism of pointer adjustment is complex. 3. Large-scale application of software makes SDH system vulnerable to viruses or malpractice.

Questions

1. Why did SDH emerge? 2. What are the advantages & disadvantages of SDH?

3. What is the basic transmission rate in SDH

and what are the other common ones?

Time to think
Soon Coffee Time!

Answers

1. Click to SDH Emergence 2. Click to Advantages and Disadvantages of SDH

3. STM-1. STM-4, STM-16, STM-64

Course Contents

Part 1 SDH Overview Part 2 Frame structure & Multiplexing Methods

i. Frame Structure of STM-N Part 3 Overheads & Pointers ii. Functions of each parts iii. SDH tributary multiplexing

Part 4 Logical functional Blocks

Part 2 SDH Frame Structure

From ITU-T G.707: Frame = 125 us

1.
2.

3.

4. 5.

STM-1 is the basic transmission format One frame lasts for 125 microseconds (8000 frames/s Rectangular block structure 9 rows and 270 columns Each unit is one byte (8 bits) Transmission mode: Byte by byte, row by row, from left to right, from top to bottom

1 2 3 4 5 6 7 8 9
270 Columns

9 rows

1 byte = One 64 kbit/s channel STM-N = 9 X 270 X N (N = 4, 16, 64)

SDH Frame Structure

Frame = 125 us

Three parts:
1. Information Payload 2. Section Overhead 3. Pointer

1 2 3 4 5 6 7 8 9

SOH PTR

Information
Payload
9 rows

SOH

9 270 Columns

Information Payload
Information Payload
Also known as Virtual Container level 4 (VC-4) Used to transport low speed tributary signals Contains low rate signals and Path Overhead (POH) Location: rows #1 ~ #9, columns #10 ~ #270

POH
SOH package PTR
9 rows

POH
1

Payload

loading and aligning

low rate signal

package

SOH

POH
9

270 Columns

Data package

SDH Overhead
Concept of Path and Section
one Path ( low rate signal) one Path ( low rate signal)

Section (SDH signal)

one Path ( low rate signal)

Two main types of overheads: 1. Section Overhead 2. Path Overhead

Section Overhead

Fulfills the section layer OAM functions

1 2 3 5 6 7 8 9

RSOH

Types of Section Overhead

Information
1.
9 rows

PTR

Payload
MSOH

2.

9
270 Columns

1.
2.

Regenerator Section Overhead (RSOH), monitors the whole STM-N Multiplex Section Overhead (MSOH), monitors STM-1 in STM-N Location: RSOH: rows #1 ~ #3, columns #1 ~ #9 MSOH: rows #5 ~ #9, columns #1 ~ #9

Pointer
Indicates the first byte of the payload container Pointers permit phase and frequency differences of the VCs
Location: row #4, columns #1 ~ #9 Two stage alignment operation: TU-PTR
1st alignment
2M
RSOH
4 AU-PTR

Information Payload
9 rows

MSOH

9 270 Columns

AU-PTR 2nd alignment

34 M

SDH Multiplexing
SDH Multiplexing includes:
Low to high rate SDH signals (STM-1 STM-N) PDH to SDH signals (2M, 34M & 140M STM-N) Other hierarchy signals to SDH Signals (ATM STM-N)

Some terms and definitions: Mapping Aligning Multiplexing Stuffing

Go to glossary

SDH Multiplexing Structure

1 STM-64 STM-16 STM-4 1 1

Mapping
AUG-64 4
AUG-16 4 AUG-4 4 AUG-1

Aligning Multiplexing Pointer processing

1
STM-1

1 AU-4
3 VC-4 C-4 139264 kbit/s

TUG-3 7

TU-3

VC-3

C-3

34368 kbit/s

TUG-2

Go to glossary

TU-12

VC-12

C-12

2048 kbit/s

SDH Tributary Multiplexing (140M)

140 Mbit/s to STM-N C4

1 1 Rate adaptation Add POH

VC4
1

140M

Packing
1
260 125 s

9 Mapping

P O H
1
125s 261

Next page 9

SDH Tributary Multiplexing (140M)

AU-4
10
Add Pointer 1
AU-PTR

AUG-1
1 1 Add SOH 9

STM-1
270

270

9 1

RSOH
AU-PTR

Info Payload

MSOH

Aligning

Multiplexing

STM-N
1
1

AUG-N
Multiplexing route: 1X140M 1XVC-4 1XSTM-1 One STM-1 frame can load only one 140Mbit/s Signal

270X N

Multiplexing

SDH Tributary Multiplexing (34M)

34 Mbit/s to STM-N
C3
1 1

VC3
1

34M

Rate Adaptation

Add POH

P O H
1 125s 85

Next page 9

Packing

84 125s

Mapping

SDH Tributary Multiplexing (34M)

TU-3
1 H1 H2 H3 86
1

TUG-3
1
1 H1 H2 H3

VC-4
86 1
P O R R H

261

1st align
9

Fill gap

3
R

Aligning

Stuffing

Multiplexing

Multiplexing route: 1X34M 1XTU-3 3XTUG-3 1XAU-4---One STM-1 can load three 34Mbit/s signals

Same as for C4

SDH Tributary Multiplexing (2M)

2 Mbit/s to STM-N
C12
1 4 1 Rate Adaptation 9 Packing 125s Add POH

VC12
POH 1 4 1 1

TU12
4 1 Next page 9

2M

Add Pointer
9

Mapping

Aligning

TU-PTR

SDH Tributary Multiplexing (2M)

TUG-2
1 12 1 7 R R 1

TUG-3
86 1

3
9

Multiplexing

Multiplexing

Multiplexing route: 1X2M 3XTU12 7XTUG-2 3XTUG-3 1XSTM-1--- One STM-1 can load 3X7X3 = 63X2M Signals Multiplexing structure: 3-7-3 structure

Same as for C3

Questions
1. What are the main parts of the SDH Frame structure? 2. What is the transmission speed of STM-1? Why is that so? 3. Why is multiframe used for the 2Mbit/s signal?

Answers

1. Three main parts: a. Information Payload b. SOH c. PTR 2. Transmission speed = 155.52 Mbit/s,

270X9X8000X8
3.

Glossary

Mapping - A process used when tributaries are

adapted into VCs by adding justification bits and POH information

Aligning - This process takes place when a pointer is

included in a Tributary Unit (TU) or an Administrative Unit (AU), to allow the 1st byte of the VC to be located

GO back to SDH Multiplexing

Glossary
Multiplexing - This process is used when multiple
low-order path signals are adapted into a higher-order

path signal, or when high-order path signals are adapted

into a Multiplex Section

Stuffing As the tributary signals are multiplexed

and aligned, some spare capacity has been designed into the SDH frame to provide enough space for all various tributary rates. Therefore, at certain points in the multiplexing hierarchy, this space capacity is filled with fixed stuffing bits that carry no information, but are required to fill up the particular frame GO back to SDH Multiplexing

Glossary
SDH Multiplexing Structure

C = Container
VC = Virtual Container TU = Tributary Unit

AU = Administrative Unit
TUG = Tributary Unit Group AUG = Administrative Unit Group

STM = Synchronous Transfer Module

Go back

Glossary
TU Multiframe

In the floating TU mode, four consecutive 125 microsecond frames

of the VC-4 are combined into one 500 microsecond structure, called a TU Multiframe. The occurrence or the TU Multiframe and its phase is indicated in the VC-N Path Overhead. Concatenation The linking together of various data structures. In SDH, a number (M) of TUs can be linked together to produce a concatenated container, M times the size of the TU.

Course Contents

Part 1 SDH Overview Part 2 Frame structure & Multiplexing Methods Part 3 Overheads & Pointers
i. SOH a. RSOH b. MSOH ii. POH a. H.O. POH b. L.O. POH iii. POINTERS a. AU-PTR b. TU-PTR

Part 4 Logical functional Blocks

Part 3 Section Overheads

R S O H 1
A1 B1 D1 A1 A1 A2 E1 D2 A2 A2 J0 F1 D3

2
3

S T M 1

AU-PTR 5 M S O H 6

B2
D4 D7 D10 S1

B2

B2

K1
D5 D8 D11 M1

K2
D6 D9 D12 E2

7
8 9

= Media dependent bytes

A1 and A2 Bytes
Framing Bytes Indicate the beginning of the STM-N frame The A1, A2 bytes are unscrambled A1 = f6H (11110110), A2 = 28H (00101000) In STM-N: (3XN) A1 bytes, (3XN) A2 bytes

stream
STM-N STM-N STM-N STM-N STM-N STM-N

Finding frame head

A1 and A2 Bytes
Framing

Find A1,A2 Y

OOF over 3ms LOF

Next process

AIS
Back

D1 ~ D12 Bytes
Data Communications Channels (DCC) Bytes Message-based Channel for OAM between NEs and NMS RS-DCC D1 ~ D3 192 kbit/s (3X64 kbit/s) MS-DCC D4 ~ D12 576 kbit/s (9X64kbit/s)

NE

NE DCC channel

NE

NE

TMN

OAM Information: Control, Maintenance, Remote Provisioning, Monitoring (Alarm & Performance), Administration

E1 and E2 Bytes
Orderwire Bytes Provides one 64 kbit/s each for voice communication E1 RS Orderwire Byte RSOH orderwire message E2 MS Orderwire Byte MSOH orderwire message

NE

NE E1 and E2

NE

NE

Digital telephone channel E1-RS, E2-MS

B1 Byte
Bit interleaved Parity Code (BIP-8) Byte A parity code (even parity), used to check the transmission errors over the RS B1 BBE is represented by RS-BBE

BIP-8

A1 A2 A3 A4

00110011 11001100 10101010 00001111

STM-N

Tx
Calculate B1, B2 Verify B1 B2

Rx

1#STM-N 2#STM-N

2#STM-N

B 01011010

1#STM-N

B2 Byte
Bit interleaved Parity Code (MS BIP-24) Byte This bit interleave parity NX24 code is used to determine transmission errors occurred over the MS B2 BBE is represented by MS-BBE
Insert B2 SDH Equipment Sending NE
STM-N

Detect B2 SDH Equipment Receiving NE

If error blocks occur MS-BBE performance event

M1 Byte
Multiplex Section Remote Error IndicationMS-REI Byte A return message from Rx to Tx ,when Rx find MSBBE A count of the number of BIP-24xN (B2) errors Tx generate corresponding performance event MSREI
Traffic

Tx
Return M1 Generate MS-REI

Rx

Find MS-BBE

K1 and K2 (b1 ~ b5)

Automatic Protection Switching (APS channel) bytes

Transmitting APS signaling Implement equipment self-healing function Used for network multiplex protection switch function

K2 (b6 ~ b8)
Multiplex Section Remote Defect Indication (MS-RDI): K2 (b6-b8)

Start

Rx detects K2 (b6-

b8)="111" generate MSAIS alarm after 5 consecutive frames Rx detects K2 (b6b8)="110" generate MSRDI alarm

Detect K2(b6b8) 111 Generate MS-AIS

110

Return MSRDI

Generate MS-RDI

S1 Byte
Synchronization Status Message Byte (SSMB): S1 (b5~ b8) Value indicates the sync. level Used to implement the clock source protection function
bits 5 ~ 8 Meaning
0000 0010 0100 1000 1011 1111 Quality unknown (existing sync. Network) G.811 PRC SSU-A (G.812 transit) SSU-B (G.812 local) G.813 (Sync. Equipment Timing Clock) Do not use for sync.

Path Overheads

1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 9
J1 B3 C2 G1 F2 H4 F3 K3

VC-n Path Trace Byte

Path BIP-8 Path Signal Label

Path Status
Path User Channel TU Multiframe Indi

Path User Channel

AP Switching Network Operator

N1

Higher Order Path Overhead

Path trace byte: J1

Detect J1

> The first byte of VC-4 > User-programmable > Required match
HP-TIM

Match

Next process

Insert AIS downward

Path BIP-8 Byte

> Path bit interleaved parity code byte (even parity code) > Used to detect transmission errors (Performance Monitoring) > Calculated over all bits of the previous VC before scrambling and placed in the B3 of the current frame
N
Verify B3

correct

HP-BBE

Next process

Signal label byte: C2

> Specifies the mapping type in the VC-N > 00 H Unequipped 02 H TUG structure 13 H ATM mapping > Requires matching
Next process HP-SLM

Detect C2

N Y N

00H

Match

HP-UNEQ

Insert AIS downward

Path Status Byte: G1

> Return performance message from Rx to Tx > HP-REI b1 ~ b4 > HP-RDI b5

N
HPBBE

Detect receiving VC4

HPUNEQ HP-TIM HP-SLM

Return HP-RDI

Next process

Return HP-REI

Path Overheads
Low Order Path Overhead 1 1 V5 4 J2 N2 K4

VC-12

VC-12

VC-12

VC-12

500s VC-12 multiframe

Path Overhead Bytes V5

> First byte of the multiframe > Indicated by TU-PTR > Functions: Error checking, Signal Label and Path Status of VC-12 b1 ~ b2 b3 b4 b5 ~ b7 b8 Error Performance Monitoring (BIP-2) Return Error detected in VC-12 (LP-REI) Return Failure declared in VC-12 (LP-RFI) Signal Label for VC-12 Indicate Defect in VC-12 path (LP-RDI)

Path Overhead Bytes

Detect V5
Detect b5-b7

Verify b1 b2

N
000

Y N

match
Y
Next process

Match

LP-UNEQ

LP-BBE
LP-SLM

Next process

Return LPRDI b8

Return LPREI b3

Pointers

Pointers

AU-PTR

TU-PTR

AU-PTR

RSOH

AU-PTR

MSOH

AU-PTR
> Payload pointers to permit differences in phase and frequency of the VC-N wrt the STM-N > Indicates the offset between VC payload & STM-N frame by pointing to the 1st byte in the VC > Consists of H1, H2 and H3 Bytes > Divide the VC-4 payload bytes into 3 783 units > Each unit is given an address 0 ~ 782

H1

H1

H1

H2

H2

H2

H3

H3

H3

3 x AU-3 1 x AU-4
H1 Y Y H2 1 1 H3 H3 H3

1 = All 1s Y = 1001ss11 (S bits unspecified)

AU-PTR
> H1 & H2 Bytes Pointer bytes:
VC pointer bytes specify the VC frame location Used to align the VC and STM-1 SOHs in an STM-N Perform frequency justification

> H3 Byte Pointer action byte

Used for frequency justification Depending on the pointer value, the bytes are used as buffers for positive or negative pointer justifications

> If receiver side cannot interpret the PTR value, AU-LOP then AIS alarms are inserted downwards > Receiving H1H2H3H3H3 all 1s, insert AU-AIS downwards

TU-PTR
1 4

VC-12

VC-12

VC-12

VC-12

V1

V2

V3

V4

500s VC-12 multiframe TU POINTERS

TU-PTR
> TU payload PTR allows dynamic alignment of the L-O VC-12 within the Multiframe > Payload PTR value is located in bits 7~ 16 of V1 & V2 Bytes > VC-12 Multiframe is divided into 140 units, each unit is 1 Byte. Each Byte has an address, Range 0~ 139, Unit 1 (Add = 0) is located after V2 Byte in the Multiframe > If receiver side cannot interpret the PTR value, TULOP then AIS alarms are inserted downwards > Receiving V1, V2, V3, V4 all 1s, insert TU-AIS downwards > Indication of Multiframe in H4 Byte

Questions
Which bytes in the Overhead are not scrambled for transmission? Which byte is used to monitor the MS-AIS and MS-RDI? What is the mechanism for R-LOF generation? What are the alarms generated when the receiver have detected that the AU-PTR is 800 or 1023? Which bytes implement the layered error monitoring?

Answers
A1, A2 & J0 K2 See Framing Bytes (Go To) After 8 consecutive frames AU-LOP then AU-AIS will be generated B1, B2 and B3

Summary

SOH consists of RSOH & MSOH

POH consists of L-O POH & H-O POH

PTR consists of AU-PTR & TU-PTR

Course Contents

Part 1 SDH Overview Part 2 Frame structure & Multiplexing Methods Part 3 Overheads & Pointers Part 4 Composition of SDH Equipment
i. ii. SDH Network Elements SDH Logical Functional Blocks

Part 4 Common SDH NE

TM (Terminal Multiplexer) Two ports device: Line Port (Optical Port), Tributary Port Used in the terminal station of a network Cross-connect function: TU LU

TM
STM-N W E1 E4 E3 STM-M

Hua Wei Default

Note: M<N

Common SDH NE
ADM (Add and Drop Multiplexer) Three ports device: Tributary Port, Line Port West (Left), Line Unit East (Right) Used as an intermediate station, the most important NE type Cross-connect function: TU LU (W/E), LU (W) LU (E)

ADM
STM-N W E1 E4 E STM-N

Note: M<N
STM-M

E3

Common SDH NE
Applications of TM & ADM
TM STM-N W E1 E3 E4 STM-M Note: M<N TM W STM-N

ADM

TM

ADM

ADM

TM

ADM

ADM

chain
ring
ADM

Common SDH NE
REG Two ports device: LU (W) & LU (E) Used due to the long distance between Multiplexers O/E, Signal regenerating (recovers timing, replaces RSOH bytes, MSOH, POH & payload are not altered) Equivalent to ADM

W REG
STM-N

E
STM-N

Common SDH NE
DXC Multi-port device Used to interconnect larger number of STM-N signals Can be used for the grooming (consolidating & segregating) of STM-Ns Used in complex & backbone network DXC m/n (m n) Input Line: n
equivalent to

DXC

n
Input Line: m

SDH Logical Functional Blocks

Purpose

SDH requires a unified Interface

Realized differently by different vendors

ITU-T recommends a unified basic functional block standard

Logical Functional Block for SDH Equipment

w STM TTF

SPI

RST

MST

MSP

MSA

HOI 140Mb/s G.703

PPI

LPA

HPT F

HPC

LOI 2Mb/s 34Mb/s

HOA

G.703 K

PPI

J LPA

LPT

H LPC H

HPA

F
HPT

Note: Taking 2Mb/s as example OHA OHA Interface

SEMF P D4D12 SETPI

MCF N D1D3

Q Interface F Interface

SETS

External Synchronous Signal Interface

SPI Functional Block

SPI: Synchronous Physical Interface SPI Implements interface function O/E, extracts timing signal from STM-N Monitors corresponding Transmitting alarm Receiving
AB BA

O/E
Extract Timing Signal

E/O
Receive Fail
R-LOS

RST Functional Block

Receiving

BC

R-LOS

Framing

Put all 1 at C

A1, A2

Fail R-OOF, R-LOF

Normal

Unscramble
Process E1, D1~D3

RST: Regenerator Section Termination Processes RS overhead Processes RSOH in Rx

direction Writes RSOH in Tx direction

All 1 at C

Verify B1

RS-BBE

RST Functional Block

Transmitting

CB

Writes
RSOH

Scrambles
STM-N frame

Calculates B1

Add E1 D1-D3

MST Functional Block

MST: Multiplex Section Termination Processes MSOH

Receiving

CD

Extract APS

Detect

Detect B2

K1, K2 (b1-b5)

K2 (b6-b8)

110 MS-RDI

111 MS-AIS All 1 at D

Abnormal

MS-BBE

Overflow MS-EXC (B2)

All 1 at D

MST Functional Block

Transmitting DC Write MSOH

Receiving MS-BBE
Return M1MS-REI

Receiving MS-AIS
Return K2110 MS-RDI

MST Functional Block

Signal frame structure at reference point D Concept of RS, MS

MST

RST

SPI
RS (regenerator section) MS (multiplex section)

SPI

RST

MST

MSP Functional Block

MSP: Multiplex Section Protection
Implements MS layer protection switch Switch conditions: R-LOS, R-LOF, MS-AIS alarm
Equipment Model
Main
TM Stand-by TM M S A M S P

Functional Block
Main Signal Path

MST

MST

M S P

M S A

MST

MST

Stand-by Signal Path

MSA Functional Block

Receiving
MSA: Multiplex Section Adaptation Implements AUG to VC-4 or VC-4 to AUG conversion

EF

De-interleaved AUG NAU-4

Read AU-PTR
H1H2H3 are all 1 AU-AIS All 1 at F

Invalid pointer or 8 NDF AU-LOP All 1 at F

MSA Functional Block

Transmitting FE

1 1

261

VC-4
Writes AU-PTR Byte interleaved NAU- 4 AUG
9

Signal frame structure at Point F

Functional Blocks

HPC: High-Order Path Cross-connect Cross-connect Matrix control & Implementation only for VC-4 Only chooses the route, does not process signals HPT: High-Order Path Termination Processes HO-POH in VC-4 VC-4 Real-Time monitoring

HPT Functional Block

Receiving FG

Verify B3
Invalid HP-BBE

Detect J1
Mismatch HP-TIM

Detect C2
Mismatch HP-SLM 00H: HP-UNEQ

Transmit H4
to HPA

All 1 at G

All 1 at G

HPT Functional Block

Transmitting
GF

Write HO-POH

Receiving HP-BBE
Return HP-REI (G1)

Receiving HP-TIM, HP-SLM, HP-UNEQ

Return HP-RDI (G1)

260

C4
9

G point

Functional Block

HOI: High-Order Interface (HPT, LPA, PPI) 140 M --- VC-4 HOA: High-Order Assemble (HPT, HPA) VC-12 --- VC-4 LPC: Low-Order Path Connection For VC-12 & VC-3 Cross-connect Matrix Only chooses route, does not process signals LPT: Low-Order Path Adaptation Real-Time Monitoring of Low-Order VC-12

Functional Block

LPA: Low-Order Path Adaptation Implements pack/unpack and restores original signal PDH <---> C PPI: PDH Physical Interface Extract PDH tributary signal timing Code pattern conversion Interface between device and PDH line

PPI Functional Block

PPI

Receiving LM JK

Transmitting ML KJ

Code pattern conversion

Code pattern conversion Extract timing

No input signal T-ALOS, EX-TLOS

HPA Functional Block

Receiving

HPA: High order Path Adaptation

Implements C4 to VC-12 conversion

GH

De-interleaved C4 63XTU-12

Read

TU-PTR

V1V2V3 are all 1 TU-AIS All 1 at H

Invalid pointer or 8 NDF TU-LOP All 1 at H

HPA Functional Block

Transmitting HG

Write Pointer
TU-PTR, VC-12TU12

Byte Interleave
TU12C-4

LPT Functional Block

LPT: Low-Order Path Termination Process LO-POH LPT

Receiving HI

Transmitting IH Write LO-POH Receive LP-BBE, Return LP-REI Receive LP-SLM, UNEQ, Return LP-RDI

Detect V5
LP-BBE LP-SLM, LP-UNEQ

Auxiliary Functional Blocks

SEMF: Function

Synchronous

Equipment

Management

Monitoring center of the whole equipment Implements OAM of local equipment and other equipment

MCF: Message Communication Function

Provides D1~D3 Interface for communication Implements network management termination interface to equipment: f/Qx

Auxiliary Functional Blocks

SETS: Synchronous Equipment Timing Source Provides local timing clock signal to other functional blocks Provides timing clock signal to other equipment SETPI: Synchronous Equipment Timing Physical Interface Provides external interface of SETS External timing clock signal and output timing clock signal OHA: Overhead Access Processes order wire messages E1, E2, F1

Alarm Flow Chart

R-LOS R-LOF

MS-EXC

MS-AIS

AU-LOP

AU-AIS

HP-UNEQ

HP-TIM

HP-SLM

TU-AIS