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1

Chapter 7
DC Biasing Transistor
Circuits
Pictures are redrawn (with some modifications) from
Introductory Electronic Devices and Circuits
By
Robert T. Paynter
2
Objectives
State the purpose of dc biasing circuits.
Plot the dc load line given the value of V
CC
and
the total collector-emitter circuit resistance.
Describe the Q-point of an amplifier.
Describe and analyze the operations of various
bias circuits:
base-bias circuits
voltage-divider bias circuits
emitter-bias circuits
collector-feedback bias circuits
emitter-feedback bias circuits
3
Fig 7.1 Typical amplifier operation.
R
B
R
C
Q
1
V
CC
V
B(ac)
I
B(ac)
V
CE(ac)
I
C(ac)
4
Fig 7.2 A generic dc load line.
I
C
V
CE
(sat)
CC
C
C
V
I
R
=
(off ) CE CC
V V =
CC CE
C
C
V V
I
R

=
5
Fig 7.3 Example 7.1.
R
B
R
C
2 kO
Q
1
+12 V
V
CE
2 4 6 8 10 12
2
4
6
8
I
C
I
C(sat)
V
CE(off)
Plot the dc load line for the circuit
shown in Fig. 7.3a.
6
Fig 7.4 Example 7.2.
Plot the dc load line for the circuit shown in
Fig. 7.4. Then, find the values of V
CE
for I
C
=
1, 2, 5 mA respectively.
R
B
R
C
1 kO
Q
1
+10 V
V
CE
2 4 6 8 10
2
4
6
8
I
C
10
I
C
(mA) V
CE
(V)
1 9
2 8
5 5
CE CC C C
V V I R =
7
Fig 7.6-8 Optimum Q-point with
amplifier operation.

C B
I I =
CE CC C C
V V I R =
V
CE
I
B
= 0 A
I
B
= 10 A
I
B
= 20 A
I
B
= 30 A
I
B
= 40 A
I
B
= 50 A
I
C
Q-Point
V
CC
V
CC
/2
I
C(sat)
I
C(sat)
/2
I
B
8
Fig 7.9 Base bias (fixed bias).
CC BE
B
B
V V
I
R

C B
I I =
CE CC C C
V V I R =
R
C
R
B
+0.7 V
I
C
I
B
I
E
Input
Output
V
BE
V
CC
Q
1
| = dc current gain = h
FE
9
Fig 7.10 Example 7.3.
R
C
2 kO
R
B
360 kO
+0.7 V
I
C
I
B
I
E
V
BE
+8 V
h
FE
= 100
0.7V 8V 0.7V
360k
20.28A
CC
B
B
V
I
R

= =
=
( )( )
100 20.28A
2.028mA
C FE B
I h I = =
=
( )( )
8V 2.028mA 2k
3.94V
CE CC C C
V V I R =
=
=
The circuit is midpoint biased.
10
Fig 7.11 Example 7.4.
Construct the dc load line for the circuit shown in Fig. 7.10,
and plot the Q-point from the values obtained in Example
7.3. Determine whether the circuit is midpoint biased.
V
CE
(V)
2 4 6 8 10
1
2
3
4
I
C
(mA)
Q
(sat )
8V
4mA
2k
CC
C
C
V
I
R
= = =
( ) off
8V
CC CE
V V = =
11
Fig 7.12 Example 7.6. (Q-point shift.)
The transistor in Fig. 7.12 has values of h
FE
= 100 when T =
25 C and h
FE
= 150 when T = 100 C. Determine the Q-
point values of I
C
and V
CE
at both of these temperatures.
R
C
2 kO
R
B
360 kO
+0.7 V
I
C
I
B
I
E
V
BE
+8 V
h
FE
= 100 (T = 25C)
h
FE
= 150 (T = 100C)
Temp(C) I
B
(A) I
C
(mA) V
CE
(V)
25 20.28 2.028 3.94
100 20.28 3.04 1.92
12
Fig 7.13 Base bias characteristics. (1)
R
C
R
B
+0.7 V
I
C
I
B
I
E
Input
Output
V
BE
V
CC
Q
1
Advantage: Circuit simplicity.
Disadvantage: Q-point shift with temp.
Applications: Switching circuits only.
Circuit recognition: A single resistor
(R
B
) between the base terminal and
V
CC
. No emitter resistor.
13
Fig 7.13 Base bias characteristics. (2)
R
C
R
B
+0.7 V
I
C
I
B
I
E
Input
Output
V
BE
V
CC
Q
1
(sat )
(off )
CC
C
C
CE CC
V
I
R
V V
~
=
Load line equations:
Q-point equations:
CC BE
B
B
C FE B
CE CC C C
V V
I
R
I h I
V V I R

=
=
=
14
Fig 7.14 Voltage divider bias. (1)
R
1
R
2
R
E
R
C
+V
CC
Input
Output
I
1
I
2
I
E
I
B
I
C
Assume that I
2
> 10I
B
.
2
1 2
B CC
R
V V
R R
=
+
0.7V
E B
V V =
E
E
E
V
I
R
=
Assume that I
CQ
~ I
E
(or
h
FE
>> 1). Then
( )
CEQ CC CQ C E
V V I R R = +
15
Fig 7.15 Example 7.7. (1)
Determine the values of I
CQ
and V
CEQ
for the circuit shown in Fig. 7.15.
R
1
18 kO
R
2
4.7 kO
R
E
1.1 kO
R
C
3 kO
+10 V
I
1
I
2
I
E
I
B
I
C
h
FE
= 50
( )
2
1 2
4.7k
10V 2.07V
22.7k
B CC
R
V V
R R
=
+
= =
0.7V
2.07V 0.7V 1.37V
E B
V V =
= =
Because I
CQ
~ I
E
(or h
FE
>> 1),
1.37V
1.25mA
1.1k
E
CQ
E
V
I
R
~ = =
( )
( )( )
10V 1.25mA 4.1k 4.87V
CEQ CC CQ C E
V V I R R = +
= =
16
Fig 7.15 Example 7.7. (2)
Verify that I
2
> 10 I
B
.
R
1
18 kO
R
2
4.7 kO
R
E
1.1 kO
R
C
3 kO
+10 V
I
1
I
2
I
E
I
B
I
C
h
FE
= 50
2
2
2.07V
440.4A
4.7k
B
V
I
R
= = =
1.25mA
1 50+1
24.51A
E
B
FE
I
I
h
= =
+
=
2
10
B
I I >
17
Which value of h
FE
do I use?
Transistor specification sheet may list any
combination of the following h
FE
: max. h
FE
,
min. h
FE
, or typ. h
FE
. Use typical value if
there is one. Otherwise, use
(ave) (min) (max) FE FE FE
h h h =
18
Example 7.9
A voltage-divider bias circuit has the following values:
R
1
= 1.5 kO, R
2
= 680 O, R
C
= 260 O, R
E
= 240 O and
V
CC
= 10 V. Assuming the transistor is a 2N3904,
determine the value of I
B
for the circuit.
( )
2
1 2
680
10V 3.12V
2180
B CC
R
V V
R R
= = =
+
0.7V 3.12V 0.7V 2.42V
E B
V V = = =
2.42V
10mA
240
E
CQ E
E
V
I I
R
~ = = =
( ) (min) (max)
100 300 173
FE ave FE FE
h h h = = =
(ave)
10mA
57.5A
1 174
E
B
FE
I
I
h
= = =
+
19
Stability of Voltage Divider
Bias Circuit
The Q-point of voltage divider bias circuit is less
dependent on h
FE
than that of the base bias (fixed
bias).
For example, if I
E
is exactly 10 mA, the range of h
FE
is
100 to 300. Then
10mA
At 100, 100A and 9.90mA
1 101
E
FE B CQ E B
FE
I
h I I I I
h
= = = ~ = ~
+
10mA
At 300, 33A and 9.97mA
1 301
E
FE B CQ E B
FE
I
h I I I I
h
= = = ~ = ~
+
I
CQ
hardly changes over the entire range of h
FE
.
20
Fig 7.18 Load line for voltage
divider bias circuit.
2 4 6 8 10 12
5
10
15
20
25
I
C
(mA)
V
CE
(V)
(sat )
10V
20mA
260+240
CC
C
C E
V
I
R R
= = =
+
(off )
10V
CE CC
V V = =
Circuit values are from
Example 7.9.
21
Fig 7.19-20 Base input resistance. (1)
R
1
R
2
R
E
R
C
V
CC
I
1
I
2
I
E
I
B
I
C
R
IN(base)
R
1
R
2
I
1
I
2
V
CC
0.7 V
I
B
R
IN(base)
( 1)
E E E B FE E
V I R I h R = = +
(base)
( 1)
E
IN FE E
B
FE E
V
R h R
I
h R
= = +
~
May be ignored.
22
Fig 7.19-20 Base input resistance. (2)
I
B
R
1
R
2
I
1
I
2
V
CC
I
B
R
IN(base)
V
B
( )
( )
( )
2 (base)
1 2 (base)
2
1 2
2
1
//
//
//
//
//
IN
B CC
IN
FE E
CC
FE E
EQ
CC
EQ FE E
EQ
R R
V V
R R R
R h R
V
R R h R
R
V
R R h R
R R
=
+
=
+
=
=
+
23
Fig 7.21 Example 7.11.
( )
( )
2
//
10k// 50 1.1k 8.46k
EQ FE E
R R h R =
= =
( )
1
8.46k
20V 2.21V
68k 8.46k
EQ
B CC
EQ
R
V V
R R
~
+
= =
+
0.7V
2.21V 0.7V
1.37mA
1.1k
E B
CQ E
E E
V V
I I
R R

~ = =

= =
( )
( )( )
20V 1.37mA 7.3k 9.99V
CEQ CC CQ C E
V V I R R = +
= =
R
1
68kO
R
2
10kO
R
E
1.1kO
R
C
6.2kO
V
CC
=20V
I
1
I
2
I
E
I
C
h
FE
= 50
24
Fig 7.24 Voltage-divider bias
characteristics. (1)
R
1
R
2
R
E
R
C
+V
CC
Input
Output
I
1
I
2
I
E
I
B
I
C
Circuit recognition: The
voltage divider in the base
circuit.
Advantages: The circuit Q-
point values are stable
against changes in h
FE
.
Disadvantages: Requires
more components than most
other biasing circuits.
Applications: Used primarily
to bias linear amplifier.
25
Fig 7.24 Voltage-divider bias
characteristics. (2)
R
1
R
2
R
E
R
C
+V
CC
Input
Output
I
1
I
2
I
E
I
B
I
C
Load line
equations:
(sat )
(off )
CC
C
C E
CE CC
V
I
R R
V V
=
+
=
Q-point equations (assume
that h
FE
R
E
> 10R
2
):
( )
2
1 2
0.7V
B CC
E B
E
CQ E
E
CEQ CC CQ C E
R
V V
R R
V V
V
I I
R
V V I R R
=
+
=
~ =
= +
26
Other Transistor Biasing
Circuits
Emitter-bias circuits
Feedback-bias circuits
Collector-feedback bias
Emitter-feedback bias
27
Fig 7.25-6 Emitter bias.
Assume that the transistor
operation is in active region.
R
C
R
E
R
B
I
C
I
E
I
B
Q
1
Input
Output
+V
CC
-V
EE
( )
0.7V
1
EE
B
B FE E
V
I
R h R

=
+ +
C FE B
I h I =
( )
1
E FE B
I h I = +
CE CC C C E E EE
V V I R I R V = +
Assume that h
FE
>> 1.
( )
CE CC C C E EE
V V I R R V ~ + +
28
Fig 7.27 Example 7.12.
R
C
750O
R
E
1.5kO
R
B
100O
I
C
I
E
I
B
Q
1
Input
Output
+12 V
-12 V
h
FE
= 200
Determine the
values of I
CQ
and
V
CEQ
for the
amplifier shown in
Fig.7.27.
12V 0.7V
( 1)
11.3V
37.47A
100+201 1.5k
B
B FE E
I
R h R

=
+ +
= =

200 37.47A
7.49mA
CQ FE B
I h I = =
=
( )
( )
( )
24V 7.49mA 750 1.5k
7.14V
CEQ CC C C E EE
V V I R R V ~ +
= +
=
29
Load Line for
Emitter-Bias Circuit
(sat )
( )
CC EE CC EE
C
C E C E
V V V V
I
R R R R
+
= =
+ +
( )
( ) CE off CC EE CC EE
V V V V V = = +
V
CE
I
C
I
C(sat)
V
CE(off)
30
Fig 7.28 Emitter-bias
characteristics. (1)
R
C
R
E
R
B
I
C
I
E
I
B
Q
1
Input
Output
+V
CC
-V
EE
Circuit recognition: A split (dual-
polairty) power supply and the base
resistor is connected to ground.
Advantage: The circuit Q-point
values are stable against changes in
h
FE
.
Disadvantage: Requires the use of
dual-polarity power supply.
Applications: Used primarily to bias
linear amplifiers.
31
Fig 7.28 Emitter-bias
characteristics. (2)
R
C
R
E
R
B
I
C
I
E
I
B
Q
1
Input
Output
+V
CC
-V
EE
Load line equations:
(sat )
(off )
CC EE
C
C E
CE CC EE
V V
I
R R
V V V
+
=
+
= +
Q-point equations:
( )
( )
( )
1
BE EE
CQ FE
B FE E
CEQ CC CQ C E EE
V V
I h
R h R
V V I R R V
+
=
+ +
~ + +
32
Fig 7.29 Collector-feedback
bias.
R
B
R
C
+V
CC
I
C
I
E
I
B
( )
CC C B C B B BE
V I I R I R V = + + +
( 1)
CC BE
B
FE C B
V V
I
h R R

=
+ +
CQ FE B
I h I =
( )
1
CEQ CC FE B C
CC CQ C
V V h I R
V I R
= +
~
33
Fig 7.30 Example 7.14.
Determine the values of I
CQ
and V
CEQ
for the
amplifier shown in Fig. 7.30.
R
B
R
C
1.5 kO
+10 V
180 kO
h
FE
= 100
( )
1
10V 0.7V
28.05A
180k 101 1.5k
CC BE
B
B FE C
V V
I
R h R

=
+ +

= =
+
100 28.05A
2.805mA
CQ FE B
I h I = =
=
( 1)
10V 101 28.05A 1.5k
5.75V
CEQ CC FE B C
V V h I R = +
=
=
34
Circuit Stability of
Collector-Feedback Bias
R
B
R
C
+V
CC
I
C
I
E
I
B
h
FE
increases

I
C
increases (if I
B
is the same)

V
CE
decreases

I
B
decreases

I
C
does not increase that much.
Good Stability. Less dependent
on h
FE
and temperature.
35
Collector-Feedback
Characteristics (1)
R
B
R
C
+V
CC
I
C
I
E
I
B
Circuit recognition: The base
resistor is connected between
the base and the collector
terminals of the transistor.
Advantage: A simple circuit
with relatively stable Q-point.
Disadvantage: Relatively poor
ac characteristics.
Applications: Used primarily to
bias linear amplifiers.
36
Collector-Feedback
Characteristics (2)
R
B
R
C
+V
CC
I
C
I
E
I
B
Q-point relationships:
( 1)
CC BE
B
FE C B
V V
I
h R R

=
+ +
CQ FE B
I h I =
CEQ CC CQ C
V V I R ~
37
Fig 7.31 Emitter-feedback bias.
R
B
R
C
+V
CC
R
E
I
B
I
E
I
C
( )
1
CC BE
B
B FE E
V V
I
R h R

=
+ +
CQ FE B
I h I =
( )
CEQ CC C C E E
CC CQ C E
V V I R I R
V I R R
=
~ +
( )
1
E FE B
I h I = +
38
Fig 7.32 Example 7.15.
R
B
680kO
R
C
6.2kO
+V
CC
R
E
1.6kO
h
FE
= 50
( )
16V 0.7V
1 680k 51 1.6k
20.09A
CC BE
B
B FE E
V V
I
R h R

= =
+ + +
=
50 20.09A 1mA
CQ FE B
I h I = = =
( )
( )( )
16V 1mA 7.8k 8.2V
CEQ CC CQ C E
V V I R R ~ +
= =
39
Circuit Stability of
Emitter-Feedback Bias
h
FE
increases

I
C
increases (if I
B
is the same)

V
E
increases

I
B
decreases

I
C
does not increase that much.
I
C
is less dependent on h
FE
and
temperature.
R
B
R
C
+V
CC
R
E
I
B
I
E
I
C
40
Emitter-Feedback
Characteristics (1)
Circuit recognition: Similar to
voltage divider bias with R
2

missing (or base bias with R
E

added).
Advantage: A simple circuit
with relatively stable Q-point.
Disadvantage: Requires more
components than collector-
feedback bias.
Applications: Used primarily to
bias linear amplifiers.
R
B
R
C
+V
CC
R
E
I
B
I
E
I
C
41
Emitter-Feedback
Characteristics (2)
R
B
R
C
+V
CC
R
E
I
B
I
E
I
C
Q-point relationships:
( 1)
CC BE
B
B FE E
V V
I
R h R

=
+ +
CQ FE B
I h I =
( )
CEQ CC CQ C E
V V I R R ~ +
42
Summary
DC Biasing and the dc load line
Base bias circuits
Voltage-divider bias circuits
Emitter-bias circuits
Feedback-bias circuits
Collector-feedback bias circuits
Emitter-feedback bias circuits