Вы находитесь на странице: 1из 101

Number System

Many number systems are in use in digital technology. The most common are the decimal, binary, octal, and hexadecimal systems. The decimal system is clearly the most familiar to us because it is a tool that we use every day. There are other systems, which we will look at briefly. Decimal Binary Octal Hexadecimal

Decimal System
The decimal system is composed of 10 numerals or symbols. These 10 symbols are 0, 1, 2, 3, 4, 5, 6, 7, 8, 9. Using these symbols as digits of a number, we can express any quantity. The decimal system is also called the base-10 system because it has 10 digits. Decimal Examples 3.1410 5210 102410 6400010

Binary System
In the binary system, there are only two symbols or possible digit values, 0 and 1. This base-2 system can be used to represent any quantity that can be represented in decimal or other base system.

Decimal Number 0 1 2

Binary Number 0000 0001 0010

3
4 5 6

0011
0100 0101 0110

7
8 9 10

0111
1000 1001 1010

11
12 13 14

1011
1100 1101 1110

15

1111

Octal System
The octal number system has a base of eight, meaning that it has eight possible digits: 0,1,2,3,4,5,6,7.

Decimal Number 0 1 2

Octal Numbers 0 0 0 0 1 2

3
4 5 6

0
0 0 0

3
4 5 6

7
8 9 10

0
1 1 1

7
0 1 2

11
12

1
1

3
4

Hexadecimal System
The hexadecimal system uses base 16. Thus, it has 16 possible digit symbols. It uses the digits 0 through 9 plus the letters A, B, C, D, E, and F as the 16 digit symbols.

Decimal Number 0 1 2

H.D Number 0 1 2

3
4 5 6

3
4 5 6

7
8 9 10

7
8 9 A

11
12 13 14

B
C D E

15

8421 Code/BCD Code


It is possible to assign weights to the binary bits according to their positions. The weights in the BCD code are 8,4,2,1. Example: The bit assignment 1001, can be seen by its weights to represent the decimal 9 because: 1x8+0x4+0x2+1x1 = 9

Excess-3 Code This code derives its name from the fact that each binary code is the corresponding 8421 code plus 0011(3). Example: 1000 of 8421 = 1011 in Excess-3

Gray Code The gray code belongs to a class of codes called minimum change codes, in which only one bit in the code changes when moving from one code to the next. The gray code is a reflective digital code which has the special property that any two subsequent numbers codes differ by only one bit. This is also called a unit-distance code.

Decimal

Binary

Gray

Excess-3

0 1
2 3 4 5 6 7 8 9 10 11 12

0000 0001
0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100

0000 0001
0011 0010 0110 0111 0101 0100 1100 1101 1111 1110 1010

0011 0100
0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111

13 14
15

1101 1110
1111

1011 1001
1000

10000 10001
10010

Boolean Algebra and Logic Circuits


George Boole introduced Boolean algebra. True is represented by the value 1. False is represented by the value 0. Variables are represented by letters and have one of two values, either 0 or 1. Operations are functions on one or more variables. AND is represented by X.Y OR is represented by X + Y NOT is represented by X' .

Precedence
As with any other branch of mathematics, these operators have an order of precedence. NOT operations have the highest precedence, followed by AND operations, followed by OR operations.

Function Definitions
The logic operations given previously are defined as follows :

Let X and Y are two binary variables-X.Y=1 if X = 1 and Y = 1 0 Otherwise X + Y =1 if X = 1 or Y = 1 0 Otherwise X=1 if X = 0 0 Otherwise

Truth Tables
Truth tables are a way of representing the results of a logic function. They are constructed by defining all possible combinations of the inputs, and then calculating the output for each combination. For exX 0 0 1 1 Y 0 1 0 1 (X.Y) 0 0 0 1

Boolean Switching Algebras (Axioms)

Boolean Switching Algebras (Axioms) (cont)


Closure If X S and Y S then X.Y S If X S and Y S then X+Y S Identity an identity 0 for + such that X + 0 = X an identity 1 for . such that X . 1 = X

Boolean Switching Algebras (Axioms) CONT.


Commutative Laws_________________________ X+Y=Y+X X.Y=Y.X Distributive Laws___________________________ X.(Y + Z ) = X.Y + X.Z X + Y.Z = (X + Y) . (X + Z) Complement_______________________________ For every X S there is a complement X such that X + X' = 1 X . X' = 0

Boolean Switching Algebras (Theorems)


A number of theorems may be proved for switching algebras Idempotent Law ______________________ 1. X + X = X 2. X . X = X DeMorgan's Law _______________________ 1. (X + Y)' = X' . Y 2. (X.Y) = X + Y'

Boolean Switching Algebras (Theorems) CONT.


Boundedness Law ______________________ X+1=1 X.0=0 Absorption Law _____________________ X + (X . Y) = X X . (X + Y ) = X Elimination Law _______________________ X + (X' . Y) = X + Y X.(X' + Y) = X.Y Unique Complement theorem _________________ If X + Y = 1 and X.Y = 0 then X = Y'

Boolean Switching Algebras (Theorems) CONT. Involution theorem _________________ X'' = X 0' = 1 Associative Properties X + (Y + Z) = (X + Y) + Z X.(Y.Z)=(X.Y).Z

Algebraic Manipulation
Minterms and Maxterms Any boolean expression may be expressed in terms of either minterms or maxterms. To do this we must first define the concept of a literal. A literal is a single variable within a term which may or may not be complemented. A minterm is the product of N distinct literals. A maxterm is the sum of N distinct literals. For a two-variable expression, the minterms and maxterms are as follows
Minterm X'.Y' X'.Y X.Y' X.Y Maxterm X+Y X+Y' X'+Y X'+Y'

SOP (Sum of Product) If we add n minterms then we get a boolean function in the form of SOP. POS(product of sum) If we multiply n maxterms then we get a boolean function in the form of POS.

Logic Circuits
Positive Logic In a positive logic system, a high voltage is used to represent logical true (1), and a low voltage for a logical false (0).

Negative Logic In a negative logic system, a low voltage is used to represent logical true (1), and a high voltage for a logical false (0).

In positive logic circuits it is normal to use +5V for true and 0V for false.

Switching Circuits
Switches are left open for logic 0 and closed for logic 1. Two variable AND circuit X.Y

Two variable OR circuit X + Y

Basic Logical Functions and Gates


For example, consider the logical statement: "If I move the switch on , the light will turn on." At first glance, this seems to be a correct statement. However, if we look at a few other factors, we realize that there's more to it than this. In this example, a more complete statement would be: "If I move the switch on the wall up and the light bulb is good and the power is on, the light will turn on." If we look at these two statements as logical expressions and use logical terminology, we can reduce the first statement to: Light = Switch Looking at the second version of the statement, we have a slightly more complex expression: Light = Switch and Bulb and PoweR

Basic Logic Gates


AND GATE:- An AND gate two or more inputs and gives single O/P (0 or 1). This operation is denoted by a dot(.) symbol. The symbol of AND gate is given below.
X1 X2 Xn

Y = X1 . X2.. Xn

AND gate (cont)


Truth table for two input and gate is given below
X1 X2
X1 0 0 1 1

Y = X1 . X2
X2 0 1 0 1 Y=X1.X2 0 0 0 1

Characteristic:- An AND gate O/P 1 when all I/Ps are 1. Otherwise it gives O/P 0

OR Gate
An OR gate two or more inputs and gives single O/P (0 or 1). This operation is denoted by a dot(+) symbol. The symbol of OR gate is given below.
X1 X2 Xn

Y = X1 + X2 +.. + Xn

OR gate (cont)
Truth table for two input and gate is given below
X1 X2
X1 0 0 1 1 X2 0 1 0 1

Y = X1 + X2
Y=X1+X2 0 1 1 1

Characteristic:- An OR gate gives O/P 1 when any one or more I/Ps are 1. otherwise it gives O/P 0.

NOT gate or Inverter gate


An NOT gate has single input and gives single O/P (complement of I/P). This operation is denoted by a dot( or ) symbol. The symbol of NOT gate is given below. Y = X
X

Its truth table is given belowX 0 1 Y =X 1 0

Characteristic:- A NOT gate gives complement of the I/P.

Derived Logical Functions and Gates


While the three basic functions AND, OR, and NOT are sufficient to accomplish all possible logical functions, some combinations are also used. The first is called NAND, and consists of an AND gate and a NOT Gate. The second is called NOR. This is a combination of OR gate and a NOT gate. The third is called the Exclusive-OR, or XOR function.

NAND Gate
A NAND GATE has two or more I/P and gives single O/P (0 or 1). The NAND gate implements exactly inverted from of the AND gate. For practical reasons, commercial NAND gates are most commonly manufactured with 2, 3, or 4 inputs, to fit in a 14-pin or 16-pin package. The symbol of NAND gate is given belowX1 X2 Xn Y = (X1 . X2.. Xn )

NAND gate (cont)


Truth table for two input NAND gate is given below
X1 X2
X1 0 0 1 1

Y = (X1 . X2)
X2 0 1 0 1 Y=(X1.X2) 1 1 1 0

Characteristic:- An NAND gate gives O/P 1 when any one more I/Ps are 0. it gives O/P 0 when all I/Ps are 1.

NOR Gate
The NOR gate is a combination of an OR gate nad a NOT gate. A NOR gate has two or more I/Ps and gives single O/P. The symbol of the NOR gate is given below practical commercial NOR gates are mostly limited to 2, 3, and 4 inputs, to fit in standard IC packages.
X1 X2
Xn

Y = (X1 + X2 +.. + Xn)

NOR gate (cont)


Truth table for two input and gate is given below
X1 X2
X1 0 X2 0 Y=(X1+X2) 1

Y = (X1 + X2 )

0
1 1

1
0 1

0
0 0

Characteristic:- A NOR gate gives O/P 1 when all I/Ps are 0. otherwise it gives O/P 0.

Exclusive-OR, or XOR Gate


The Exclusive-OR, or XOR function is a variation of the OR gate. Verbally, it can be stated as, "Either A or B, but not both. It consists of a plus (+) sign with a circle around it. The logic symbol is shown here
X1 X2

Y = (X1.X2

+ X1.X2)

The circuit required to implement this description is shown below:

.
+

X-NOR

X1 X2

Y = (X1 . X2

+ X1.X2)

The circuit required to implement this description is shown below:


A B Y= AB+AB

NAND as Universal gate


NAND as NOT gate

NAND as Universal gate


NAND as AND gate

A B

(AB)

((AB)) =AB

NAND as Universal gate


NAND as OR gate
((A.B) = A+B =A+B

A B

NAND as Universal gate


NAND as NOR gate

A B

((A.B) = A+B =A+B

(A+B)

NAND as Universal gate


NAND as X-OR gate
A
(AB) (AB) ((AB).(AB)) =AB)+(AB) =AB+AB

NAND as Universal gate


NAND as X-NOR gate
A B

(AB)

((AB). (AB))

A B (AB)

=(AB)+(AB)

= AB+ AB

NOR as Universal gate


NOR as NOT gate

NOR as Universal gate


NOR as OR gate

A B

(A+B)

((A+B)) =A+B

NOR as Universal gate


NOR as AND gate

A B

((A+B) = A. B =A.B

NOR as Universal gate


NOR as NAND gate
((A+B)

A B

= A.B =A.B

(A.B)

NOR as Universal gate


NOR as X-OR gate
(A+B) =AB
(AB+AB) B AB+AB

(A+B) =AB

NOR as Universal gate


NOR as X-NOR gate
A B
(A+B)= AB
=((AB).(AB)) = ((AB)+(AB) =AB + AB

A B
(A+B)= AB

((AB)+ (AB))
=(AB).(AB)

Implement following equation by using NOR gates only. F= ABC+ABC+ABC


A B C

(A+B+C) = ABC=P

(A+B+C) =ABC =Q

(P+Q+R) (P+Q+R) =P+Q+R =ABC+ABC+ ABC

(A+B+C) ABC = R

Implement following equation by using NOR gates only. F= (A+B+C).(A+B+C).(A+B+C)


A B C

(A+B+C) =P

(A+B+C) =Q

(P+Q+R) =P.Q.R = (A+B+C).(A+B+C).(A+B+C) = (A+B+C).(A+B+C).(A+B+C)

(A+B+C) =R

Implement following equation by using NAND gates only. F= ABC+ABC+ABC


A B C

(ABC) =P

(ABC) =Q

(P.Q.R) =P+Q +R = (ABC)+ (ABC)+ (ABC) = ABC+ABC+ABC

(ABC) =R

Implement following equation by using NAND gates only. F= (A+B+C).(A+B+C).(A+B+C)


A B C

(ABC) =P

(P.Q.R)

(ABC) =Q

(ABC) =R

(P.Q.R) =P.Q.R = (ABC). (ABC) . (ABC) =(A+B+C).(A+B+C).(A+B+C)

NOR as Universal gate


NOR as gate

Let's start by adding two binary bits. Since each bit has only two possible values, 0 or 1, there are only four possible combinations of inputs. These four possibilities, and the resulting sums, are: 0+0=0 0+1=1 1+0=1 1 + 1 = 0 (with one carry) For ex- (11011) + (11100)
11000
Carry

Adding Binary Numbers

11011 + 11100 110111

For example, 1) 1 1 carries 0 0 0 1 1 0 1 0 = 26(base 10) 0 0 0 0 1 1 0 0 = 12(base10) 0 0 1 0 0 1 1 0 = 38(base 10)

2)

1 0 0 +0 0 0 1

1 0 1 0

1 1 1 1

1 0 1 0

1 carries 0 1 1 = 19(base 10) 1 1 0 = 62(base 10) 0 0 1 = 81(base 10)

Binary Subtraction
The subtraction process is shown below---- 0-0=0 1-0=1 1-1=0 0 - 1 = 1, with a borrow bit. That borrow bit is just like a borrow in decimal subtraction. For ex- (11011) + (11100)
00110
Borrow

11101 + 10110 00111

Ex00100101 - 00010001 =00010100

0 0 1 0 0 1 0 1 = 37(base 10) - 0 0 0 1 0 0 0 1 = 17(base10) 0 0 0 1 0 1 0 0 = 20(base 10)


00110011 - 00010110 = 00011101 0 10 1 borrows 0 0 1 1 0 10 1 1 = 51(base 10) - 0 0 0 1 0 1 1 0 = 22(base10) 0 0 0 1 1 1 0 1 = 29(base 10)

Binary Multiplication
0x0=0 0x1=0 1x0=0 1x1=1

and no carry or borrow bits

Note: The rules of binary multiplication are the same as the truths of the AND gate.

0111

multiplicand multiplier
first partial product (0111 1) second partial product (0111 0)

0101
0111 0000 0111 0000 0100011

third partial product (0111 1)


fourth partial product (0111 0)

Total product.

Another Method: Binary multiplication is the same as repeated binary addition; add the multicand to itself the multiplier number of times. For example, 000010000000011=00011000 1 carries 0 0 0 0 1 0 0 0 = 8 0 0 0 0 1 0 0 0 = 8 0 0 0 0 1 0 0 0 = 8 0 0 0 1 1 0 0 0 = 24

Binary Division
Binary division is the repeated process of subtraction, just as in decimal division.

1000011100000101=00011011 1 1 0 1 1 1 0 1 ) 1 0 0 0 0 1 1 1 -1 0 1 1 1 0 -1 0 1 1 1 - 0 1 1 1 -1 0 1 1 0 1 -1 0 1 0 0 0

= 27 = 135

Tips
Binary Number System System Digits: 0 and 1 Bit (short for binary digit): A single binary digit LSB (least significant bit): The rightmost bit MSB (most significant bit): The leftmost bit Binary Equivalents 1 Nibble (or nibble) = 4 bits 1 Byte = 2 nibbles = 8 bits 1 Kilobyte (KB) = 1024 bytes 1 Megabyte (MB) = 1024 kilobytes = 1,048,576 bytes 1 Gigabyte (GB) = 1024 megabytes = 1,073,741,824 bytes

rs complement
The formula for this is rn - N Here r = base of number n= no. of Integer digits m= no of fractional digits N= actual Number

Example: find 1s complement of 1101


sol: here r=2=(10)2 n=4, m=0, N=1101

So 1s complement = rn - r-m - N 104 - 10-0 - 1101 = 10000 1 1101 = 10000 1110 = 0010

ExFind 10s complement of (224.34)10 Find 10s complement of (224.34)10

Ans here Ans here r = 10, n = 3, m =2, r = 10, n = 3, m =2, N=224.34 N=224.34 So 10s complement of 224.34 is--- So 10s complement of 224.34 is--= rn - r-m - N = 103 - 10-2 - 224.34 = 1000 - .01 -224.34 = 1000- 224.35 = 775.65 = rn - r-m - N = 103 - 10-2 - 224.34 = 1000 - .01 -224.34 = 1000- 224.35 = 775.65

a multiplexer or mux (occasionally the terms muldex or muldem are also found ) selects one of many analog or digital input signals and forwards the selected input into a single line. A multiplexer of 2n inputs has n select lines, which are used to select which input line to send to the output. An electronic multiplexer can be considered as a multiple-input, single-output switch.

Block Diagram

2 to 1 line Mux
A 2 to 1 line Mux has two I/P lines, one selection line and one O/P line. Its diagram is given below

I/P S
0 1 S

O/P Y
B A

4 to 1 line Mux

INPUT S0 0 0 S0 S1 1 1 S1 0 1 0 1

O/P Y C0 C1 C2 C3

Demultiplexer
A Demux functions opposite of Mux. It is also called Data distributor. It receives input from a single line and distribute it to a possible 2n lines. The block diagram of Demux is given below-D0 D1 D2 D3

14 DEMUX

S0

S1

S0

S1

14 Line Demux
D0

D1

D2
INPUT S0 0 0 1 1 S1 0 1 0 1 O/P Y D0 D1 D2 D3

D3

S0

S1

S2

18 Line Demux
D0 S0 D1 D2 D3 D4 D5 D6 D7 0 0 0 0 1 1 1 INPUT S1 0 0 1 1 0 0 1 S2 0 1 0 1 0 1 0 OUTPUT Y D0 D1 D2 D3 D4 D5 D6

D7

DECODER
A decoder is a device which does the reverse of an encoder, undoing the encoding so that the original information can be retrieved. In digital electronics, a decoder can take the form of a multiple-input, multiple-output logic circuit that converts coded inputs into coded outputs, where the input and output codes are different. e.g. binary-coded decimal decoders.

2 to 4 line Decoder
A0 0 0 1 1 A1 0 1 0 1 D0 1 0 0 0 D1 0 1 0 0 D2 0 0 1 0 D3 0 0 0 1

S0

S1

3 8 LINE DECODER S
2

D0 D1 D2 D3 D4 D5 D6 D7

ENCODER
An encoder is a device, circuit, software program, algorithm or person that converts information from one format or code to another, for the purposes of standardization, speed, secrecy, security, or saving space by shrinking size. A compressor encodes data (e.g., audio/video/images) into a smaller form. A video encoder may be capable of capturing, compressing and converting audio/video An email encoder secures online email addresses from email harvesters A device or person that encodes or encrypts military messages.

A0 A1 A2 A3 A4 A5 A6 A7

D2

D1

D0

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9

DECIMAL TO BINARY ENCODER

D3

D2

D1

D0

HALF ADDER

HALF ADDER
B S BLOCK DIAGRAM

HALF ADDER
A B
A B 0 1 0 1 S 0 1 1 0 C 0 0 0 1

C = A.B

0 0 1 1

S =A + B

Draw the truth table for it and find the equation for S (sum) and Carry (C)

S= AB + AB C= AB

FULL ADDER
X Y Z C

FULL ADDER
S BLOCK DIAGRAM

Full Adder (cont.)


X
Y C1
FULL ADDER

S1
FULL ADDER

C2

C
S

Z
S= X + Y+ Z

= (XY)Z +XYZ + XYZ + XYZ

C= (X

Y).Z + X.Y = YZ + XZ + XY

INPUT

OUTPUT

X
0 0 0 0 1 1 1 1

Y
0 0 1 1 0 0 1 1

Z
0 1 0 1 0 1 0 1

S
0 1 1 0 1 0 0 1

C
0 0 0 1 0 1 1 1

HALF SEBTRACTOR

HALF SEBTRACTOR
Y D BLOCK DIAGRAM

HALF SEBTRACTOR
X Y
A B 0 1 0 1 D 0 1 1 0 B 0 1 0 0

B = X.Y

0 0 1 1

D =X + Y

Draw the truth table for it and find the equation for B (borrow) and d(difference)

S= XY + XY C= XY

FULL SEBTRACTOR
B

X
Y

FULL SEBTRACTOR
D

BLOCK DIAGRAM

Full Subtractor (cont.)


X
Y
H.S.

B1 D1
H.S.

B2

B
D

INPUT

OUTPUT

X
0 0 0 0 1 1 1 1

Y
0 0 1 1 0 0 1 1

Z
0 1 0 1 0 1 0 1

S
0 1 1 0 1 0 0 1

C
0 0 0 1 0 1 1 1

4- bit binary parallel adder


B 4 A4 C5
FULL ADDER

B 3 A3 C4
FULL ADDER

B 2 A2 C3
FULL ADDER

B 1 A1 C2
FULL ADDER

C1

S4 C5

S3

S2

S1

BCD Addition
Q: Write 75 in BCD. Q: Add 50 and 25 in BCD. Q: Write 60 in BCD. Q: Add 39 and 21 in BCD. Ans: 0111 0101 Ans: 0111 0101 Ans: 0110 0000

39 0011 1001 21 0010 0001 0101 1010

To remove this problem we add 6 in the sum when sum is greater than 9.

39 0011 1001 21 0010 0001 0110 0000

9 1001 1 0001 1010 0110 10000

BCD Adder
Carry out

B3 B2 B1 B 0 A3 A2 A1 A 0 K 4- Bit Binary Adder Z8 Z4 Z2 Z 1

Carry in

Output Carry

0
0 1 1 0 Z8 Z4 Z2 Z1
4-Bit Binary Adder

S4

S3

S2

S1

BINARY SUM K Z8 Z4 Z2 Z1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 1 0

BCD SUM C S4 S3 S2 S1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 1 0

DECIMAL NUMBER 0 1 2 3 4 5 6 7 8

0 1 1 1 0 0 1 0 1 1 1 0 1 0 1 1 0 0

0 1 1 1 0 0 1 0 1 1 1 0 1 0 1 1 0 0

0
0 0 0 0 0 0 1 1 1 1

1
1 1 1 1 1 1

0
0 0 1 1 1 1

0
1 0 0 1 1 0 0

1
0 0 1 0 1 0 1

0
1 1 1 1 1 1 1 1 1 1

1
0 0 0 0 0 0 0 0 1 1

0
0 0 0 0 1 1 1 1 0 0

0
0

1
0

9
10 11 12 13 14 15 16 17 18 19

1 1

0 1 1 0 1 1 0 0 0 1 1 0 1 1 0 0 0 1

0 0 0 0 0 0

0 0 1 0 1 1