PERIPHERAL INTERFACING

Dr.P.Yogesh, Senior Lecturer, DCSE, CEG Campus, Anna University, Chennai-25.

I/O Basics

The microprocessor communicates with the peripherals in either of the two formats: asynchronous or synchronous In synchronous mode the sender and the receiver are synchronized with the same clock. In asynchronous mode, the communication takes place at irregular intervals The communication between the microprocessor and the peripherals is by and large asynchronous

I/O Basics

The microprocessor receives or sends the data in either of the two modes: parallel and serial In parallel mode entire word is transferred at a time In serial mode, one bit is transferred at a time over a single line between the microprocessor and the peripheral

I/O Basics

The microprocessor uses two types of mappings to identify the I/O devices

Memory mapped I/O Direct I/O

The microprocessor uses a common bus to transfer information between the processor and the memory as well as the I/O devices

I/O Basics

The distinction between a memory transfer and an I/O transfer is made through the control signals Moreover the I/O devices and the memory use separate address spaces Such a mapping is called I/O mapped I/O

I/O Basics

The other type of mapping used by the microprocessors is Memory-Mapped I/O in which the I/O devices are treated alike memory Same address space is shared between the memory and I/O devices and a common set of control signals are used In this arrangement an address will refer to memory, if a memory device is connected there; it will refer to an I/O location, if an I/O device is connected there In memory-mapped I/O no separate instructions are needed to differentiate between the memory and I/O devices

I/O Basics

Data transfer between the microprocessor and the peripherals can be controlled either by the microprocessor or by the peripherals Most peripherals are slower than the microprocessor and hence the conditions for the data transfer are to be set up In this case, conditions are set up by the microprocessor and this type of transfer is called microprocessor controlled data transfer If the peripheral is faster than the microprocessor then the conditions are set up by the peripheral and this type of data transfer is called peripheral controlled data transfer

Programmable Interfacing Devices

I/O functions can be done with the help of either simple integrated circuits or programmable devices Latches and tri-state buffers are simple integrated circuits whose capabilities are limited The major limitation of these devices is they are hard-wired and hence each device can perform only one function On the other hand, a programmable interfacing device is capable of performing various input/output functions according to the way in which we program the device

Programmable Interfacing Devices

This type of device can be set up to perform specific functions by writing an instruction (or instructions) in its internal register The internal register is called control register The particular function the device will perform depends on the instruction we write into the control register Hence it is possible to change the function at any time In general, programmable interfacing devices are flexible, versatile and economical They are widely used in microprocessor based products

Programmable Interfacing Devices

Matrix Keyboard and Multiplexed Display Interface

A matrix keyboard is a commonly used input device when more than eight keys are necessary A matrix keyboard reduces the number of connections and hence reduces the number of interfacing devices The rows and columns do not have any connection and the connection occurs when a key is pressed In other words, we can say that pressing a key shorts one row and column The interfacing of a matrix keyboard requires one input port and one output port Rows are connected to the output port and columns are connected to the input port

Matrix Keyboard and Multiplexed Display Interface

Matrix Keyboard and Multiplexed Display Interface

The steps involved in this process are

Check whether all keys are open Check a key closure Identify the key Find the binary key code for the key

Matrix Keyboard and Multiplexed Display Interface

Intel 8279 Keyboard/Display Controller

Intel 8279 is the keyboard/display controller that is used to interface the keyboard and the display of a system to the microprocessor The advantage of 8279 is that it is able to drive the signals for both the keyboard and display and hence it is possible for the microprocessor to concentrate in its routine tasks The 8279 has two sections: keyboard and display

Intel 8279 Keyboard/Display Controller

The 8279 chip provides a set of four scan lines and eight return lines for interfacing keyboards and a set of eight output lines for interfacing display The keyboard portion can provide a scanned interface to a 64-contact key matrix The keyboard portion interfaces an array of sensors or a strobed interface keyboard

Intel 8279 Keyboard Section

Keyboard depressions can be 2-key lockout or N-key rollover Keyboard entries are debounced and strobed in an 8-charcter FIFO If more than 8 characters are entered, overrun status is set Key entries set the interrupt output line to the CPU

Intel 8279 Display Section

The display portion provides a scanned display interface for LED, incandescent and other popular display technologies Both numeric and alphanumeric segment displays may be used as well as simple indicators The 8279 has 16*8 display RAM which can be organized into dual 16*4 The RAM can be loaded or interrogated by the CPU Both right entry, calculator and left entry typewriter display formats are possible Both read and write of the display RAM can be done with auto-increment of the display RAM address

Functional Block Diagram

Signal description 8279 pins

Pin diagram and Signal description of 8279

2 Key Lockout

In scanned keyboard mode with 2 key lockout, when a key is pressed, a debounce logic comes into operation During the next two scans, the other keys are checked for closure and if no other is pressed the first pressed key is identified The key code of the identified key is entered into the FIFO with SHIFT and CNTL status, provided that FIFO is not full, that is it has at least one byte free If the FIFO does not have any free byte, naturally the key data will not be entered and the error flag is set

N-Key Rollover

In scanned keyboard with N-key rollover each key depression is treated independently When a key is pressed the debounce circuit waits for two keyboard scans and then checks whether the key is still depressed If it is still depressed, the code is entered in FIFO RAM Any number of keys can be pressed simultaneously and recognized in the order, the keyboard scan recorded them All the codes of such keys are entered into FIFO

Keyboard/Display Mode Set

DD is the display mode and KKK is the keyboard mode

Keyboard/Display Mode Set

Keyboard/Display Mode Set

Programmable Clock

PPPPP is a 5-bit binary constant. The input frequency is divided by a decimal constant ranging from 3 to 31, decided by the bits of an internal prescalar PPPPP

Read FIFO/Sensor RAM

X Dont Care AI Auto Increment flag AAA Address pointer to 8-bit FIFO RAM

Read Display RAM

AI is auto increment flag and AAAA, the 4-bit address, points to the 16-byte display RAM that is to be read. If AI=1, the address will be automatically, incremented after each read or write to the display RAM.

Write Display RAM

Clear Display RAM

1 1 1

0 1 1

X All zeros (X dont care) AB = 00 0 A1-A2 = 2 (0010) and B3-B0 = 00 (0000) 1 All ones (AB=FF), i.e. clear RAM

End Interrupt/Error Mode Set

For N-key rollover mode, if the E bit is programmed to be 1, the 8279 operates in special error mode

Interfacing Keyboard/Display to the Microprocessor Using Intel 8279

CRT Fundamentals

It is the oldest and most popular display technology Advantages of CRT are as follows

Low cost because of volume of production Speed of updating and the retention of image is good Colour display is available Text and graphics display modes

CRT Fundamentals

Disadvantages of CRT are as follows

Large size and weight: Typical CRT displays are at least as deep as they are wide High voltage and power consumption Also generate a lot of heat CRT displays are glass vacuum tubes, and are therefore relatively fragile The microprocessor interface is relatively complex

Basic Components of CRT

Major Interface Signals of CRT

Horizontal and Vertical sync Pulses

Horizontal and Vertical sync Pulses

Horizontal sync: Retraces beam to the left edge of the screen Horizontal oscillator: Saw-tooth signal that sweeps the beam horizontally across the screen Vertical sync: Causes beam to retrace to the top of the screen Vertical oscillator: Saw-tooth signal applied to the vertical deflection amplifier to move the beam down the screen Video signal: Determines the intensity of the beam that will strike the screen. The signal is amplified and applied as the accelerating voltage in the CRT

Internal Architecture of 8275

Read/Write Control Logic

CS 0 0 0 0 A0 0 0 1 1 RD 0 1 0 1 WR 1 0 1 0 Operations Read 8275 parameter Reg Write 8275 parameter Reg Read 8275 status Reg Write 8275 command Reg

Pin Diagram of 8275

Interfacing Schematic of 8275 with an 8257 DMAC

Coprocessors

Some applications require extremely fast and complex math functions which are not provided by a general purpose processor Such functions as square root, sine, cosine, and logarithms are not directly available in a general purpose processor

Coprocessors

Software routines required to implement these functions tend to be slow and not very accurate Integer data types and their arithmetic operations (i.e., add, subtract, multiply and divide) which are directly available on general purpose processors, still may not meet the needs for accuracy, speed and ease of use

Coprocessors

Providing fast, accurate, complex math can be quite complicated, requiring large areas of silicon on integrated circuits A general data processor does not provide these features due to the extra cost burden that less complex general applications must take on For such features, a special numeric data processor is required one which is easy to use and has a high level of support in hardware and software

8087 Coprocessor

The 8087 is a numeric data coprocessor which is capable of performing complex mathematical functions while the host processor (i.e. the main CPU) performs more general tasks It supports the necessary data types and operations and allows use of all the current hardware and software support for the 8086/8 and 80186/8 microprocessors

8087 Coprocessor

The fact that the 8087 is a coprocessor means it is capable of operating in parallel with the host CPU, which greatly improves the processing power of the system The 8087 can increase the performance of floating point calculations by 50 to 100 times, providing the performance and precision required for small business and graphics applications as well as scientific data processing

CU & NEU

The 8087 is divided into two sections internally namely the Control Unit (CU) and the Numeric Extension Unit (NEU) The numeric extension unit executes all the numeric processor instructions while the control unit receives, decodes instructions, reads and writes memory operands and executes the 8087 control instructions These two units may work asynchronously with each other The control unit is mainly responsible for establishing communication between the CPU and memory and also for coordinating the internal coprocessor execution

Internal Architecture of 8087

Status Word

Status Word

Tag Word

Instruction and Data Pointer

Control Word

Control Word

Communication between Microprocessor and Coprocessor