Академический Документы
Профессиональный Документы
Культура Документы
PENDAHULUAN
ALU 1 - Bit
Representasi ALU
ALU 1-bit
ALU 1-bit
ALU 1-bit
ALU 1-bit
ALU 1-bit
ALU 1-bit
ALU 1-bit
ALU 1-bit
Simbol ALU
ALU
MQ
Main Memory
IBR
PC MAR
IR
Control Circuits
Computer Components
Top Level View
Model Instruksi
Two Step
CODE CACHE
Data Bus
INSTRUCTION POINTER
INSTRUCTION DECODER
Memory
CODE
CONTROL UNIT
Register Set
DATA
ALU
DATA CACHE
Addres Bus d-CACHE
Model Instruksi
Multi Step
Instruction Fetch
Operand Fetch
Operand Store
MEMORY CPU
Instruction Address Calculation Instruction Operation Decoding Multiple Operand Multiple Operand
Data Operation
ALU Instruction
Instruction MULF A, B, C nabs r3, r1 ori $2, $1, 255 DEC R2 SHL AX, 4 Meaning multiply the 32-bit floating point values at mem locns. A and B, store at C Store abs value of r1 in r3 Store logical OR of reg $ 1 with 255 into reg $2 Decrement the 16-bit value stored in reg R2 Shift the 16-bit value in reg AX left by 4 bit posns. Machine VAX11 PPC601 MIPS R3000 DEC PDP11 Intel 8086
Branch Instruction
Instruction BLSS A, Tgt bun r2 beq $2, $1, 32 SOB R4, Loop JCXZ Addr Meaning Branch to address Tgt if the least significant bit of mem locn. A is set (i.e. = 1) Branch to location in R2 if result of previous floating point computation was Not a Number (NAN) Branch to location (PC + 4 + 32) if contents of $1 and $2 are equal Decrement R4 and branch to Loop if R4 0 Jump to Addr if contents of register CX 0. Machine VAX11 PPC601 MIPS R3000 DEC PDP11 Intel 8086
Format dan pseudo code Instruksi, BERBEDA antar masing-masing mesin prosessor. Namun beberapa pabrikan Processor yang berbeda kadang-kadang menyepakati satu model ISA tertentu.
CODE CACHE
Data Bus
INSTRUCTION POINTER
INSTRUCTION DECODER
CONTROL UNIT
Register Set
Memory
CODE
ALU
DATA
DATA CACHE
Addres Bus d-CACHE
Format ISA
n bit m bit ; n < m
opcode
Operand Address
Opcode : jenis instruksi operasi processor Operand Address : Alamat Operand ( Register atau Memory ) Jumlah operand address ISA yang dikenal adalah :
4 Address 3 Address 2 Address 1 Address 0 Address
4 Address ISA
n bit 4 x m bit
OpAdd1
OpAdd2
OpAdd3
OpAdd4
artinya : R3 R1 + R2
R1, R2, R3, dan R4 adalah Register Biasanya digunakan dengan urutan sebagai berikut : R3 R1 + R2 R4 berisi alamat instruksi berikutnya (PC PC + 1)
3 Address ISA
n bit 3 x m bit
OpAdd1
OpAdd2
OpAdd3
R3, R1, R2
artinya : R3 R1 R2
2 Address ISA
n bit 2 x m bit
OpAdd1
OpAdd2
Untuk menghtung : R3 R1 * R2, digunakan dengan urutan sebagai berikut : MOV R3, R1 MUL R3, R2 jika diperhatikan perintahnya menjadi 2 baris .!
1 Address ISA
n bit 4 x m bit
Operand Address
Bagaimana dengan : R3 R1 + R2 LOAD R1 ADD R2 STORE R3 perhatikan jumlah instruksi menjadi 3 baris
0 Address ISA
n bit
opcode
Contoh : C A + B
PUSH A PUSH B ADD POP C
Reg. Set
Reg. Set
ALU
ALU
ALU
ALU
ALU
Memory
Memory
Memory
Memory
Memory
Add C,A,B
Y = (A-B)/(C+D*E)
3 Op Address
SUB Y,A,B MUL T,D,E ADD T,T,C DIV Y,Y,T
2 Op Address
MOV Y,A SUB Y,B MOV T,D MUL T,E ADD T,C DIV Y,T
1 Op Address
LOAD D MUL E ADD C STORE Y LOAD A SUB B DIV Y STORE Y
0 Op Address
PUSH A PUSH B SUB PUSH C PUSH D PUSH E MUL ADD DIV POP Y