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April 9, 2013
Recap
S = 2s sets
valid bit
B = 2b bytes per cache block (the data)
Cache Read
E = 2e lines per set
Locate set Check if any line in set has matching tag Yes + line valid: hit Locate data starting at offset Address of word:
t bits s bits b bits
S = 2s sets
tag
tag
0 1 2
B-1
Address trace (reads, one byte per read): miss 0 [00002], hit 1 [00012], miss 7 [01112], miss 8 [10002], hit 0 [00002]
v 0 1 0 1 0 1 0 Tag ? 00 10 01 Block ? M[0-1] M[8-9] M[6-7]
Set 0
Set 1
If the capacity is C bytes and the block size is B bytes, what would be the number of lines?
E = C/B
tag
Cache block
tag
Cache block
tag
Cache block
Cache must maintain a dirty bit to keep track of which blocks must be written back when evicted
Loading cache may take longer because eviction is more complex
What to do on a write-hit?
Write-through (write immediately to memory) Write-back (defer write to memory until replacement of line)
Need a dirty bit (line different from memory or not)
What to do on a write-miss?
Write-allocate (load into cache, update line in cache)
Good if more writes to the location follow
Typical
Write-through + No-write-allocate Write-back + Write-allocate
Types of Caches
Modern CPUS use separate caches for data and instructions:
d-cache: for program data
Should handle a wide variety of access patterns Handles reads/writes
Unified cache: a single cache is used for both instructions and data
Regs
L1 L1 d-cache i-cache L2 unified cache
Regs
L1 L1 d-cache i-cache L2 unified cache
Main memory
Key idea: Our qualitative notion of locality is quantified through our understanding of cache memories.