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Emergence of SDH
What is SDH? ---- Synchronous Digital Hierarchy ---It defines frame structure, multiplexing method, digital rates hierarchy and interface code pattern. Why did SDH emerge? ---- Need for a system to process increasing amounts of information. ---- New standard that allows mixing equipment from different suppliers.
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Electrical interfaces --- Only regional standards. 3 PDH rate hierarchies for PDH: European (2.048 Mb/s), Japanese, North American (1.544 Mb/s). Optical interfaces --- No standards for optical line equipments, manufacturers develop at their will.
Optical interfaces --- Can be connected to multiple vendors optical transmission equipments.
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140 Mb/s 34 Mb/s 8 Mb/s de-multiplexer de-multiplexer de-multiplexer multiplexer multiplexer 8 Mb/s 34 Mb/s
140 Mb/s
multiplexer
2 Mb/s
STM-1 B
B
4:1
STM-4
C STM-1
D STM-1
--- Use multistage pointer to align PDH loads in SDH frame, thus, dynamic dropand-insert capabilities
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PDH
SDH
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package
STM-N
STM-N
Processing
receive
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PDH Hierarchy
E2
E3 E4 Bit Rate 155.52 Mbit/s 622.08 Mbit/s 2488.32Mbit/s 9953.28Mbit/s
8.448 Mbit/s
34.368 Mbit/s 139.264 Mbit/s Abbreviated 155 Mbit/s 622 Mbit/s 2.5 Gbit/s 10 Gbit/s
128 E0
16 E1 64 E1 SDH STM-1 STM-4 STM-16 STM-64 SDH Capacity 63 E1, 3 E3 or 1 E4 252 E1, 12 E3 or 4 E4 1008 E1, 48 E3 or 16 E4 4032 E1, 192 E3, 64 E4
SDH Hierarchy
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Glossary
Mapping - A process used when tributaries are adapted into VCs by
Tributary Unit (TU) or an Administrative Unit (AU), to allow the 1st byte of the VC to be located
are adapted into a higher-order path signal, or when high-order path signals are adapted into a Multiplexing Section Back
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Low to high rate SDH signals ( STM-1 STM-N ) PDH to SDH signals ( 2M, 34M & 140M STM-N )
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Glossary
C = Container VC = Virtual Container TU = Tributary Unit AU = Administrative Unit
Back
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2.
3. 4.
1 2 3 4 5 6 7 8 9
270 Columns
9 rows
Three parts
1 2 3 4 5 6 7 8 9
RSOH AU-PTR
Information Payload
9 rows
MSOH
9 270 Columns
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LPOH, TU-PTR
RSOH
package
AU-PTR
9 rows
HPOH
1
Payload
MSOH
LPOH, TU-PTR
9 270 Columns
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Data package
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1.
AU-PTR
Information Payload
9 rows
MSOH
9 270 Columns
RSOH monitors the regenerator section 2. MSOH monitors the multiplexing section Location: 1. RSOH: rows #1 ~ #3, columns #1 ~ #9 2. MSOH: rows #5 ~ #9, columns #1 ~ #9
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Information Payload
9 rows
MSOH
J1
9 270 Columns
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AU-4-16c AU-4-4c
VC-4-16c
C-4-16c C-4-4c
AUG-4
4
VC-4-4c
STM-1
AUG-1
TUG-3
VC-3
C-3
34368 kbit/s
Pointer processing
Go to glossary
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C-12
2048 kbit/s
149.76Mbps
VC4
150.34Mbps
1
Add HPOH
9 Mapping
1 125s 260 1
H P O H 125s 261
Next page 9
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MSOH
1 STM-N
270X N
Add SOH 9
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48.38Mbps
34.37Mbps Rate Adaptation 1 Add HPOH
9 1 84 125s
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148.608Mbps
3 26 1
49.152Mbps
49.1536Mbps
Multiplexing
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9
125s 2.176Mbps Mapping
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9
2.240Mbps Aligning
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9
TU-PTR
12
1
Multiplexing
Multiplexing
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Section Overheads
R S O H A1 B1 D1 A1 A1 A2 E1 D2 A2 A2 J0 F1 D3
AU-PTR
B2 M S O H D4 B2 B2 K1 D5 K2 D6
D7
D10 S1 STM-1
D8
D11 M1
D9
D12 E2
A1 and A2 Bytes
Framing Bytes Indicate the beginning of theSTM-N frame A1 = f6H (11110110), A2 = 28H (00101000) In STM-N: (3XN) A1 bytes, (3XN) A2 bytes
STM-N
STM-N
STM-N
STM-N
STM-N
STM-N
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A1 and A2 Bytes
Framing
Find A1,A2 Y
Next process
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AIS
D1 ~ D12 Bytes
Data Communications Channels (DCC) Bytes
RS-DCC D1 ~ D3 192 kbit/s ( 3X64 kbit/s ) MS-DCC D4 ~ D12 576 kbit/s ( 9X64kbit/s )
NE
NE DCC channel
NE
NE
TMN
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E1 and E2 Bytes
Orderwire Bytes E1 RS Orderwire Byte RSOH orderwire message E2 MS Orderwire Byte MSOH orderwire message
NE
NE E1 and E2
NE
NE
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B1 Byte
Bit interleaved Parity Code (BIP-8) Byte
A parity code (even parity), used to check the transmission errors over the RS B1 BBE is represented by RS-BBE( performance event)
B1 STM-N B1 STM-N
Rx
BIP-8
1#STM-N 2#STM-N
2#STM-N
B 01011010
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B2 Byte
Bit interleaved Parity Code (MS BIP-24) Byte
BIP-24 is used to check the bit errors over the MS B2 BBE is represented by MS-BBE( performance event) The mechanism of B2 is same as B1
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M1 Byte
Multiplexing Section Remote Error Indication Byte
Tx
Rx
Return M1
K1 and K2 (b1-b5)
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K2 (b6 ~ b8)
Rx detects K2 (b6-
Start
110
Return MS-RDI
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S1 Byte
Synchronization Status Message Byte (SSMB): S1
bit 5 ~ 8
0000
Description
Quality unknown (existing sync. Network)
0010 0100
1000 1011 1111
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Path Overheads
1
2 3 4 5 6 7
8 9
10
J1 B3 C2 G1 F2 H4 F3
K3 N1
Detect J1
Match
HP-TIM
Next process
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B3 Byte
Path bit parity code byte (even parity code) Used to detect bit errors Mechanism is same as B1and B2
Verify B3
correct
HP-BBE
Next process
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the VC-n
> 00 H Unequipped
N Y N
00H
02 H TUG structure 13 H ATM mapping The received C2 should match with the expected C2
Next process HP-SLM Match
HP-UNEQ
Path Overheads
Low Order Path Overhead
1
1 V5
4
J2 N2 K4
VC-12
VC-12
VC-12
VC-12
b1- b2 b3 b4 b5 ~ b7 b8
Error Performance Monitoring (BIP-2) Return Error detected in VC-12 (LP-REI) Return Failure declared in VC-12 (LP-RFI) Signal Label for VC-12 Indicate Defect in VC-12 path (LP-RDI)
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Pointers
Pointers
AU-PTR
TU-PTR
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AU-PTR
1 RSOH
Negative justification Positive justification
------ 86
9 1
RSOH
435 436 ------ 521 522 523 -----608 696 697 ------782
125us
H1YYH2FFH3H3H3 MSOH
------ 86
9 1
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250us 270
TU-PTR
1 4 J2 N2 K4
V5
VC-12
VC-12
VC-12
VC-12
V1
V3
V4
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Summary
SDH Overview
SDH Frame Structure & Multiplexing
Methods
Overhead & Pointers
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Thank You
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