• For example, consider a 4-bit counter (one can apply
similar logic to n-bit counter) • The basic computational elements are JK flip-flops. • JK flip-flop is based on RS master slave flip-flop with clear and set. Note: This is
What is the basic component of JK
basically made up of 9 NAND gates. Now our search for basic components of a master-slave flip-flop? counter reduces to find out the simplest way to construct NAND gates.
RS master-slave flip-flop. Connecting to one of the S inputs and Q
to one of the R inputs results in a toggle action. The remaining S inputs are renamed to J and the remaining R inputs are renamed to K. The resulting configuration is then called a JK master-slave flip-flop . How to make a NAND gate?
Transistor-transistor logic implementation of a NAND
gate. Note: It uses two transistors only. Problem: We have shown that we have to use transistor to construct a NAND MOSFET gate. But what kind of transistor we will use to • A single crystal of construct the NAND gate if we silicon can have have to use the regions with NAND gate in a chip? different conductivity • Diffusing or implanting Phosphorous in Si ➜n-type region • P-type bulk is Boron rich. Problem: How can you use this MOSFET as a switch? MOSFET • To modulate the flow of electrons from the Source to Drain by applying a signal to Gate. • A negative potential on Gate ➔ repel electrons just under the oxide ➔ no current. • High Positive potential on Gate ➔ attract electrons to the region just under the oxide Typical dimensions in a MOSFET • Question: What do you understand if I say, we have 0.18 micron technology? Answer: Tiniest details that can be produced on a wafer (Si) are 0.18µm wide. • Usually we use 0.28 micron or 0.30 micron technology but IBM 1 GHz Coppermine chip has featured 0.18 µm interconnects. • In 0.18 micron technology length of the channel that links the source to drain is of the order of 35 µm and the thickness of SiO2 is .02 µm = 200 Angstrom. Why can’t we farther decrease the thickness of the Silicon dioxide layer? • If the oxide is too thin, electrons may tunnel through it, thus shortcircuiting the gate. • The thinner the oxide, the slower the device. Problem: Explain the above statements and prove the second statement. Hints: A gate in a MOSFET is an example of a capacitor and the time taken for the capacitor to discharge is proportional to the square root of the capacitance. From the beginning to the present
An early computing machine built from mechanical
gears(Left),a state-of-the art IBM chip with 0.25 micron features. The production version will contain 200 million transistors. Transition from micro technology to nanotechnology
A single-electron transistor (SET) is carved by the tip of a scanning
tunneling microscope (STM). According to classical physics, there is no way that electrons can get from the 'source' to the 'drain', because of the two barrier walls either side of the 'island'. But the structure is too small and electrons can, under certain circumstances, tunnel through the barriers (but only one electron at a time can do this!). Thus the SET wouldn't work without quantum mechanics. Recent observations
• In 1999 Bell lab researcher demonestrated a MOSFET
with a 500 Angstrom gate. Ballistic effects were visible and transistors performance was better than would be the case of wih diffusive electron transport only. • If the gate shrinks by yet another order of magnitude (50 Angstrom). The device ends up leaking in every direction and ceases to operate as a switch. • The physical limits of MOSFET technology can be overcome by switching to a different technology (say carbon nanotube based flip-flop (IBM August 2001).